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    • 55. 发明授权
    • Process for selectively etching dielectric layers
    • 用于选择性地蚀刻介电层的工艺
    • US06905968B2
    • 2005-06-14
    • US10016562
    • 2001-12-12
    • Chang-Lin HsiehJie YuanHui ChenTheodoros PanagopoulosYan Ye
    • Chang-Lin HsiehJie YuanHui ChenTheodoros PanagopoulosYan Ye
    • H01L21/311H01L21/316H01L21/768H01L21/302H01L21/461
    • H01L21/31116H01L21/31629H01L21/31633H01L21/76808H01L21/76835
    • A method is provided for etching a dielectric structure. The dielectric structure comprises: (a) a layer of undoped silicon oxide or F-doped silicon oxide; and (b) a layer of C,H-doped silicon oxide. The dielectric structure is etched in a plasma-etching step, which plasma-etching step is conducted using a plasma source gas that comprises nitrogen atoms and fluorine atoms. As one example, the plasma source gas can comprise a gaseous species that comprises one or more nitrogen atoms and one or more fluorine atoms (e.g., NF3). As another example, the plasma source gas can comprise (a) a gaseous species that comprises one or more nitrogen atoms (e.g., N2) and (b) a gaseous species that comprises one or more fluorine atoms (e.g., a fluorocarbon gas such as CF4). In this etching step, the layer of C,H-doped silicon oxide is preferentially etched relative to the layer of undoped silicon oxide or F-doped silicon oxide. The method of the present invention is applicable, for example, to dual damascene structures.
    • 提供了蚀刻电介质结构的方法。 电介质结构包括:(a)一层未掺杂的氧化硅或掺杂F的氧化硅; 和(b)C,H掺杂的氧化硅层。 在等离子体蚀刻步骤中蚀刻电介质结构,使用包含氮原子和氟原子的等离子体源气体进行等离子体蚀刻步骤。 作为一个示例,等离子体源气体可以包括包含一个或多个氮原子和一个或多个氟原子(例如,NF 3 N)的气态物质。 作为另一示例,等离子体源气体可以包括(a)包含一个或多个氮原子(例如,N 2)的气态物质和(b)包含一个或多个氟原子的气态物质 (例如碳氟化合物气体,例如CF 4)。 在该蚀刻步骤中,相对于未掺杂的氧化硅层或掺杂F的氧化硅层优先蚀刻C,H掺杂的氧化硅层。 本发明的方法例如适用于双镶嵌结构。
    • 56. 发明授权
    • Fixing structure for input keys
    • 输入键固定结构
    • US06882865B2
    • 2005-04-19
    • US09952204
    • 2001-09-10
    • Jie YuanChengshing Lai
    • Jie YuanChengshing Lai
    • H01H13/702H04M1/23H04M1/725H04M1/00
    • H04M1/23H01H13/702H01H2213/01H01H2219/04H01H2229/026H01H2229/034H04M1/725
    • The present invention offers a fixing structure for input keys, applied in personal digital assistant provided with function of a mobile telephone. On the backside of the case of a framework are provided a plurality of positioning elements and a plurality of thermomeltable elements respectively. On said positioning elements and thermomeltable elements are sheathed consecutively with elastic sheet, plate, circuit board and fixing plate. Each end of said thermomeltable elements is accommodated in corresponding recessed hole provided in said fixing plate to avoid interference with other parts. Pressing keys set up on elastic sheet can be just protruded from the case respectively, and by means of a bottom plate kept flat against the whole bottom, the fixing structure is completed. In this way, not only is the aim to decrease thickness of PDA achieved, but also it is convenient for users to carry.
    • 本发明提供一种应用于具有移动电话功能的个人数字助理中的输入键的固定结构。 在框架的壳体的背面分别设置有多个定位元件和多个热熔性元件。 在所述定位元件和热熔性元件上连续地用弹性片,板,电路板和固定板包覆。 所述热熔性元件的每个端部容纳在设置在所述固定板中的相应的凹孔中,以避免与其它部件的干涉。 弹性片上设置的按键可以分别从壳体突出,并且通过保持平坦的底板抵住整个底部,完成固定结构。 这样做不仅可以达到减轻PDA厚度的目的,而且可以方便用户携带。
    • 59. 发明授权
    • Method of etching patterned layers useful as masking during subsequent
etching or for damascene structures
    • 在随后的蚀刻或镶嵌结构期间蚀刻用作掩模的图案化层的方法
    • US6080529A
    • 2000-06-27
    • US174763
    • 1998-10-19
    • Yan YePavel IonovAllen ZhaoPeter Chang-Lin HsiehDiana Xiaobing MaChun YanJie Yuan
    • Yan YePavel IonovAllen ZhaoPeter Chang-Lin HsiehDiana Xiaobing MaChun YanJie Yuan
    • H01L21/302H01L21/027H01L21/311H01L21/312H01L21/314H01L21/316H01L21/3213G03C5/58
    • H01L21/0274H01L21/31138H01L21/31144H01L21/32139H01L21/31116H01L21/3127H01L21/3146H01L21/31612H01L21/32136
    • A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures. A second embodiment of the present invention pertains to a specialized etch chemistry useful in the patterning of organic polymeric layers such as low k dielectrics, or other organic polymeric interfacial layers. This etch chemistry is useful for mask opening during the etch of a conductive layer or is useful in etching damascene structures where a metal fill layer is applied over the surface of a patterned organic-based dielectric layer. The etch chemistry provides for the use of etchant plasma species which minimize oxygen, fluorine, chlorine, and bromine content.
    • 本发明的第一实施例涉及一种图案化半导体器件导电特征的方法,同时允许容易地去除在蚀刻工艺完成之后保留的任何残留掩模层。 使用多层掩模结构,其包括由无机掩模材料的图案化层或由图案化的高温可成像有机掩蔽材料层覆盖的高温有机基掩蔽材料层。 无机掩模材料用于将图案转印到高温有机基掩蔽材料上,然后除去。 高温有机基掩蔽材料用于转移图案,然后如果需要可以去除。 这种方法在铝的图案蚀刻中也是有用的,即使在较低温度下可以蚀刻铝。 本发明的第二个实施方案涉及可用于图案化有机聚合物层如低k电介质或其它有机聚合物界面层的专用蚀刻化学物质。 该蚀刻化学物质可用于在导电层的蚀刻过程中的掩模开口,或者可用于蚀刻镶嵌结构,其中金属填充层施加在图案化有机基介质层的表面上。 蚀刻化学提供了使氧化物,氟,氯和溴含量最小化的蚀刻剂等离子体物质的使用。
    • 60. 发明授权
    • Apparatus and method for improving dynamic range and linearity of CMOS image sensor
    • 提高CMOS图像传感器动态范围和线性度的装置和方法
    • US08625012B2
    • 2014-01-07
    • US12697061
    • 2010-01-29
    • Jie YuanHo Yeung Chan
    • Jie YuanHo Yeung Chan
    • H04N3/14H04N5/335H01L27/00
    • H04N5/37455H04N5/35527H04N5/365H04N5/3658
    • Described herein is a circuit and related method for improving the dynamic range and the linearity characteristic of a CMOS image sensor. In various embodiments of the CMOS image sensor, a current sampler, a comparator, and a 1-bit memory are incorporated in each pixel circuit. In the image sensor, pixels are arranged in columns and a column slice is used to read the digital and analog singles from each column. In addition, a calibration circuit is incorporated in the sensor circuit for providing calibration current, which is used to generate calibration parameter. The image sensor operates in three non-overlapping modes: the difference mode, the WDR mode, and the calibration mode. The image sensor is switched among the three modes by control signals, which are provided to the image sensor by various control circuits. The image sensor normally operates in the difference mode and switches to the WDR mode when the difference between consecutive frames is over a threshold. The calibration mode allows the image sensor generate calibration parameters which are used to improve the linearity of the sensor through a interpolation method.
    • 这里描述了一种用于改善CMOS图像传感器的动态范围和线性特性的电路和相关方法。 在CMOS图像传感器的各种实施例中,电流采样器,比较器和1位存储器被并入每个像素电路中。 在图像传感器中,像素按列排列,列切片用于从每列读取数字和模拟单声道。 此外,校准电路被并入传感器电路中,用于提供用于产生校准参数的校准电流。 图像传感器以三种不重叠的模式操作:差模式,WDR模式和校准模式。 通过控制信号在三种模式之间切换图像传感器,控制信号由各种控制电路提供给图像传感器。 图像传感器通常在差模式下工作,当连续帧之间的差超过阈值时,图像传感器切换到WDR模式。 校准模式允许图像传感器生成用于通过插值方法提高传感器线性度的校准参数。