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51. 发明授权

US08603890B2 Air gap isolation in non-volatile memory 有权
标题翻译：非易失性存储器中的气隙隔离
公开(公告)号：US08603890B2
公开(公告)日：2013-12-10
申请号：US13162475
申请日：2011-06-16
申请人： Vinod Robert Purayath , George Matamis , Eli Harari , Hiroyuki Kinoshita , Tuan Pham
发明人： Vinod Robert Purayath , George Matamis , Eli Harari , Hiroyuki Kinoshita , Tuan Pham
IPC分类号： H01L21/76
CPC分类号： H01L21/764 , H01L27/11521 , H01L27/11524 , H01L27/11568
摘要： Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation between adjacent active areas of a substrate can be provided, at least in part, by bit line air gaps that are elongated in a column direction between the active areas. At least one cap is formed over each isolation region, at least partially overlying air to provide an upper endpoint for the corresponding air gap. The caps may be formed at least partially along the sidewalls of adjacent charge storage regions. In various embodiments, selective growth processes are used to form capping strips over the isolation regions to define the air gaps. Word line air gaps that are elongated in a row direction between adjacent rows of storage elements are also provided.
摘要翻译：提供了非易失性存储器阵列中的气隙隔离和相关制造工艺。至少部分地可以通过在活动区域之间沿列方向延伸的位线空气间隙来提供衬底的相邻有源区域之间的电隔离。在每个隔离区域上形成至少一个盖，至少部分地覆盖空气以提供相应气隙的上端点。帽可以至少部分地沿着相邻的电荷存储区域的侧壁形成。在各种实施方案中，选择性生长过程用于在隔离区域上形成封盖条以限定气隙。还提供了在相邻行存储元件之间沿行方向延伸的字线气隙。

52. 发明授权

US08598645B2 System and method for improving mesa width in a semiconductor device 有权
标题翻译：用于改善半导体器件中的台面宽度的系统和方法
公开(公告)号：US08598645B2
公开(公告)日：2013-12-03
申请号：US12910331
申请日：2010-10-22
申请人： Unsoon Kim , Angela T. Hui , Yider Wu , Kuo-Tung Chang , Hiroyuki Kinoshita
发明人： Unsoon Kim , Angela T. Hui , Yider Wu , Kuo-Tung Chang , Hiroyuki Kinoshita
IPC分类号： H01L29/788
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/11521 , H01L27/11531
摘要： A method for forming a memory device is provided. A nitride layer is formed over a substrate. The nitride layer and the substrate are etched to form a trench. The nitride layer is trimmed on opposite sides of the trench to widen the trench within the nitride layer. The trench is filled with an oxide material. The nitride layer is stripped from the memory device, forming a mesa above the trench.
摘要翻译：提供了一种用于形成存储器件的方法。在衬底上形成氮化物层。蚀刻氮化物层和衬底以形成沟槽。在沟槽的相对侧上修整氮化物层，以加宽氮化物层内的沟槽。沟槽填充有氧化物材料。从存储器件剥离氮化物层，在沟槽上方形成台面。

53. 发明授权

US08564042B2 Dual storage node memory 有权
标题翻译：双存储节点存储器
公开(公告)号：US08564042B2
公开(公告)日：2013-10-22
申请号：US11702845
申请日：2007-02-05
申请人： Fred Cheung , Hiroyuki Kinoshita , Chungho Lee , Yu Sun , Chi Chang
发明人： Fred Cheung , Hiroyuki Kinoshita , Chungho Lee , Yu Sun , Chi Chang
IPC分类号： H01L29/94
CPC分类号： H01L29/66833 , G11C16/0475 , G11C16/3418 , G11C16/3427 , H01L27/115 , H01L27/11521
摘要： An embodiment of the present invention is directed to a memory cell. The memory cell includes a first charge storage element and a second charge storage element, wherein the first and second charge storage elements include nitrides. The memory cell further includes an insulating layer formed between the first and second charge storage elements. The insulating layer provides insulation between the first and second charge storage elements.
摘要翻译：本发明的实施例涉及存储单元。存储单元包括第一电荷存储元件和第二电荷存储元件，其中第一和第二电荷存储元件包括氮化物。存储单元还包括形成在第一和第二电荷存储元件之间的绝缘层。绝缘层提供第一和第二电荷存储元件之间的绝缘。

54. 发明授权

US08395677B2 Aberration correction apparatus, aberration correction method, and program 失效
标题翻译：畸变校正装置，像差校正方法和程序
公开(公告)号：US08395677B2
公开(公告)日：2013-03-12
申请号：US13226978
申请日：2011-09-07
申请人： Atsuo Kikuchi , Gentaro Irisawa , Atsuo Minato , Kenichi Nishio , Hyongmyong Kang , Hiroyuki Kinoshita , Tsukasa Hashino
发明人： Atsuo Kikuchi , Gentaro Irisawa , Atsuo Minato , Kenichi Nishio , Hyongmyong Kang , Hiroyuki Kinoshita , Tsukasa Hashino
IPC分类号： H04N5/228 , H04N9/73 , H04N5/262 , H04N9/64 , H04N9/74 , G06K9/00
CPC分类号： H04N9/045
摘要： An aberration correction apparatus includes: a correction data holding section that holds correction data on a correction level used to correct chromatic aberration of magnification; a center position discrepancy data holding section that holds center position discrepancy data on the discrepancy between the center of an image area and the position of an aberration center of the chromatic aberration of magnification; an aberration center calculating section that selects one of the center position discrepancy data that corresponds to a combination of the discrepancy variation conditions in an imaging apparatus and calculates the position of the aberration center based on the selected center position discrepancy data; an image height calculating section; a magnification chromatic aberration correction level calculating section; and a pixel value correcting section.
摘要翻译：像差校正装置包括：校正数据保持部，其保持用于校正倍率色像差的校正水平的校正数据; 中心位置偏差数据保持部分，其保持关于图像区域的中心与色像差的像差中心的位置之间的偏差的中心位置差异数据; 像差中心计算部分，选择与成像装置中的差异变化条件的组合相对应的中心位置差异数据之一，并基于所选择的中心位置差异数据计算像差中心的位置; 图像高度计算部; 倍率色像差校正电平计算部分; 和像素值校正部。

55. 发明申请

US20110309426A1 Metal Control Gate Structures And Air Gap Isolation In Non-Volatile Memory 有权
标题翻译：金属控制门结构和非易失性存储器中的空气间隙隔离
公开(公告)号：US20110309426A1
公开(公告)日：2011-12-22
申请号：US13163538
申请日：2011-06-17
申请人： Vinod Robert Purayath , Tuan Pham , Hiroyuki Kinoshita , Yuan Zhang , Henry Chin , James K. Kai , Takashi W. Orimoto , George Matamis , Henry Chien
发明人： Vinod Robert Purayath , Tuan Pham , Hiroyuki Kinoshita , Yuan Zhang , Henry Chin , James K. Kai , Takashi W. Orimoto , George Matamis , Henry Chien
IPC分类号： H01L29/788 , H01L21/336 , H01L21/764
CPC分类号： H01L27/11517 , H01L21/28273 , H01L21/764 , H01L21/7682 , H01L27/11519 , H01L27/11521 , H01L29/66825
摘要： High-density semiconductor memory utilizing metal control gate structures and air gap electrical isolation between discrete devices in these types of structures are provided. During gate formation and definition, etching the metal control gate layer(s) is separated from etching the charge storage layer to form protective sidewall spacers along the vertical sidewalls of the metal control gate layer(s). The sidewall spacers encapsulate the metal control gate layer(s) while etching the charge storage material to avoid contamination of the charge storage and tunnel dielectric materials. Electrical isolation is provided, at least in part, by air gaps that are formed in the row direction and/or air gaps that are formed in the column direction.
摘要翻译：提供了利用这些类型结构中的分立器件之间的金属控制栅极结构和气隙电隔离的高密度半导体存储器。在栅极形成和定义期间，蚀刻金属控制栅极层与蚀刻电荷存储层分离，以形成沿着金属控制栅极层的垂直侧壁的保护性侧壁间隔物。侧壁间隔物在蚀刻电荷存储材料时封装金属控制栅极层，以避免电荷存储和隧道介电材料的污染。至少部分地通过在行方向上形成的气隙和/或沿列方向形成的气隙提供电隔离。

56. 发明申请

US20110309425A1 Air Gap Isolation In Non-Volatile Memory 有权
标题翻译：非易失性存储器中的空气间隙隔离
公开(公告)号：US20110309425A1
公开(公告)日：2011-12-22
申请号：US13162475
申请日：2011-06-16
申请人： Vinod Robert Purayath , George Matamis , Eli Harari , Hiroyuki Kinoshita , Tuan Pham
发明人： Vinod Robert Purayath , George Matamis , Eli Harari , Hiroyuki Kinoshita , Tuan Pham
IPC分类号： H01L29/788 , H01L21/764
CPC分类号： H01L21/764 , H01L27/11521 , H01L27/11524 , H01L27/11568
摘要： Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation between adjacent active areas of a substrate can be provided, at least in part, by bit line air gaps that are elongated in a column direction between the active areas. At least one cap is formed over each isolation region, at least partially overlying air to provide an upper endpoint for the corresponding air gap. The caps may be formed at least partially along the sidewalls of adjacent charge storage regions. In various embodiments, selective growth processes are used to form capping strips over the isolation regions to define the air gaps. Word line air gaps that are elongated in a row direction between adjacent rows of storage elements are also provided.
摘要翻译：提供了非易失性存储器阵列中的气隙隔离和相关制造工艺。至少部分地可以通过在活动区域之间沿列方向延伸的位线空气间隙来提供衬底的相邻有源区域之间的电隔离。在每个隔离区域上形成至少一个盖，至少部分地覆盖空气以提供相应气隙的上端点。帽可以至少部分地沿着相邻的电荷存储区域的侧壁形成。在各种实施方案中，选择性生长过程用于在隔离区域上形成封盖条以限定气隙。还提供了在相邻行存储元件之间沿行方向延伸的字线气隙。

57. 发明授权

US08013343B2 Silicon carbide single crystal, silicon carbide substrate and manufacturing method for silicon carbide single crystal 有权
标题翻译：碳化硅单晶，碳化硅基板和碳化硅单晶的制造方法
公开(公告)号：US08013343B2
公开(公告)日：2011-09-06
申请号：US11258998
申请日：2005-10-27
申请人： Hiromu Shiomi , Hiroyuki Kinoshita
发明人： Hiromu Shiomi , Hiroyuki Kinoshita
IPC分类号： H01L29/36 , C30B23/02 , C01B31/36
CPC分类号： C30B29/36 , C30B23/00 , Y10S438/931
摘要： SiC single crystal that includes a first dopant functioning as an acceptor, and a second dopant functioning as a donor is provided, where the content of the first dopant is no less than 5×1015 atoms/cm3, the content of the second dopant is no less than 5×1015 atoms/cm3, and the content of the first dopant is greater than the content of the second dopant. A manufacturing method for silicon carbide single crystal is provided with the steps of: fabricating a raw material by mixing a metal boride with a material that includes carbon and silicon; vaporizing the raw material; generating a mixed gas that includes carbon, silicon, boron and nitride; and growing silicon carbide single crystal that includes boron and nitrogen on a surface of a seed crystal substrate by re-crystallizing the mixed gas on the surface of the seed crystal substrate.
摘要翻译：提供了包含作为受体发挥作用的第一掺杂剂的SiC单晶和作为供体的第二掺杂剂，其中第一掺杂剂的含量不小于5×1015原子/ cm3，第二掺杂剂的含量不为小于5×1015原子/ cm3，第一掺杂剂的含量大于第二掺杂剂的含量。提供了一种碳化硅单晶的制造方法，其特征在于：通过将金属硼化物与包含碳和硅的材料混合来制造原料; 蒸发原料; 产生包括碳，硅，硼和氮化物的混合气体; 以及通过使晶种基板的表面上的混合气体再结晶，在晶种基板的表面上生长包含硼和氮的碳化硅单晶。

58. 发明授权

US07842618B2 System and method for improving mesa width in a semiconductor device 有权
标题翻译：用于改善半导体器件中的台面宽度的系统和方法
公开(公告)号：US07842618B2
公开(公告)日：2010-11-30
申请号：US11193409
申请日：2005-08-01
申请人： Unsoon Kim , Angela T. Hui , Yider Wu , Kuo-Tung Chang , Hiroyuki Kinoshita
发明人： Unsoon Kim , Angela T. Hui , Yider Wu , Kuo-Tung Chang , Hiroyuki Kinoshita
IPC分类号： H01L21/302 , B44C1/22
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/11521 , H01L27/11531
摘要： A method for forming a memory device is provided. A nitride layer is formed over a substrate. The nitride layer and the substrate are etched to form a trench. The nitride layer is trimmed on opposite sides of the trench to widen the trench within the nitride layer. The trench is filled with an oxide material. The nitride layer is stripped from the memory device, forming a mesa above the trench.
摘要翻译：提供了一种用于形成存储器件的方法。在衬底上形成氮化物层。蚀刻氮化物层和衬底以形成沟槽。在沟槽的相对侧上修整氮化物层，以加宽氮化物层内的沟槽。沟槽填充有氧化物材料。从存储器件剥离氮化物层，在沟槽上方形成台面。

59. 发明授权

US07834917B2 Imaging apparatus, noise reduction apparatus, noise reduction method, and noise reduction program 失效
标题翻译：成像装置，降噪装置，降噪方法和降噪程序
公开(公告)号：US07834917B2
公开(公告)日：2010-11-16
申请号：US11665037
申请日：2006-08-09
申请人： Hiroyuki Kinoshita , Jing Zhang , Masahiro Ito , Akira Matsui
发明人： Hiroyuki Kinoshita , Jing Zhang , Masahiro Ito , Akira Matsui
IPC分类号： H04N5/217
CPC分类号： H04N5/21 , G06T3/4023 , G06T5/002 , G06T5/005 , G06T5/20 , G06T7/13 , G06T2207/10024 , G06T2207/20012 , G06T2207/20032 , G06T2207/20192 , H04N5/213
摘要： Noise reduction is performed on the basis of characteristics of an image in a detection range. A noise reduction block 4′ performs a second-order differentiation process and a symmetry process to decide adjacent pixels with which noise reduction is preformed for an attention pixel. With the pixel level of the attention pixel in the detection range and the pixel levels of adjacent pixels used for noise reduction, an arithmetic mean processing section 16 calculates a mean value. A median filter 17 selects a median value. With the number of pixels used for noise reduction, it is determined whether the image in the detection range contains a flat portion, a ramp portion, or an edge. The mean value and the median value are weight-added with a weighted coefficient that are changed on the basis of characteristics of the image. The result is substituted for the level of the attention pixel. When the attention pixel is an isolated point, an all-pixel median filter section 31 selects a medium value of the levels of all the pixels in the detection range including the attention pixel and substitutes the median value for the level of the attention pixel.
摘要翻译：基于检测范围内的图像的特性进行降噪。降噪块4'执行二阶微分处理和对称处理，以确定针对注意像素执行降噪的相邻像素。利用检测范围内的关注像素的像素级和用于降噪的相邻像素的像素级，算术平均处理部16计算平均值。中值滤波器17选择中值。利用用于降噪的像素数量，确定检测范围内的图像是否包含平坦部分，斜坡部分或边缘。平均值和中值是加权系数，加权系数根据图像的特性而改变。结果代替注意像素的级别。当注意像素是孤立点时，全像素中值滤波器部分31选择包括关注像素在内的检测范围内的所有像素的电平的中值，并代入关注像素的电平的中值。

60. 发明授权

US07679129B1 System and method for improving oxide-nitride-oxide (ONO) coupling in a semiconductor device 有权
标题翻译：用于改善半导体器件中的氧化物 - 氧化物 - 氧化物（ONO）耦合的系统和方法
公开(公告)号：US07679129B1
公开(公告)日：2010-03-16
申请号：US11128389
申请日：2005-05-13
申请人： Angela T. Hui , Unsoon Kim , Hiroyuki Kinoshita , Kuo-Tung Chang
发明人： Angela T. Hui , Unsoon Kim , Hiroyuki Kinoshita , Kuo-Tung Chang
IPC分类号： H01L29/94
CPC分类号： H01L21/28273 , H01L27/11521 , H01L29/66825
摘要： A memory device includes a substrate and a first dielectric layer formed over the substrate. At least two charge storage elements are formed over the first dielectric layer. The substrate and the first dielectric layer include a shallow trench filled with an oxide material. The oxide material formed in a center portion of the shallow trench is removed to provide a region with a substantially rectangular cross-section.
摘要翻译：存储器件包括衬底和形成在衬底上的第一电介质层。在第一电介质层上形成至少两个电荷存储元件。衬底和第一介电层包括填充有氧化物材料的浅沟槽。形成在浅沟槽的中心部分的氧化物材料被去除以提供具有基本上矩形横截面的区域。

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