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    • 53. 发明申请
    • Fluid valve assembly
    • 流体阀组件
    • US20050098164A1
    • 2005-05-12
    • US10937744
    • 2004-09-09
    • Yoshiyuki AkaoShigeru Matsuo
    • Yoshiyuki AkaoShigeru Matsuo
    • F02M25/07F16K31/06F16K41/12F16K31/44
    • F16K31/0655F02M26/54F02M26/55F02M26/67F02M26/74F16K31/0665F16K41/12
    • To protect a drive unit in a fluid valve assembly from impurities over a long term by preventing entrance of such impurities to the drive unit, a seal structure the sealing performance of which is hardly reduced is adopted around a moving part of the fluid valve assembly. The fluid valve assembly is provided with a valve member displaceably arranged in a flow passage through which a fluid is allowed to pass, a drive unit arranged outside the flow passage, a connecting member extending through a bore formed in a wall of the flow passage and connected at its end thereof to the valve member and at its opposite end to the drive unit, and a seal member arranged in gas- or water-tight relations with the wall of the flow passage and the connecting member and made of a flexible material such that the seal member does not interfere with a displacement of the valve member when the valve member is driven by the drive unit.
    • 为了通过防止这种杂质进入到驱动单元来长期保护流体阀组件中的驱动单元免于杂质,在流体阀组件的运动部分周围采用密封结构几乎不降低的密封结构。 流体阀组件设置有可移动地布置在允许流体通过的流动通道中的阀构件,布置在流动通道外侧的驱动单元,延伸穿过形成在流动通道的壁中的孔的连接构件,以及 在其端部处连接到阀构件并且在其相对端连接到驱动单元,以及密封构件,其与流动通道的壁和连接构件以气密或不透水的关系布置,并且由柔性材料制成 当阀构件被驱动单元驱动时,密封构件不干扰阀构件的位移。
    • 57. 发明授权
    • Graphic processing system having bus connection control functions
    • 具有总线连接控制功能的图形处理系统
    • US06781590B2
    • 2004-08-24
    • US09988157
    • 2001-11-19
    • Koyo KatsuraShigeru MatsuoJun SatoTakashi SoneYoshikazu YokotaMasahiko Kikuchi
    • Koyo KatsuraShigeru MatsuoJun SatoTakashi SoneYoshikazu YokotaMasahiko Kikuchi
    • G06F1300
    • G06T11/203G06T1/20G09G5/024G09G5/393G09G5/399
    • A graphic processing system having a main memory for storing a program and information corresponding to pixels, a main processor for executing a program transferred from the main memory or from external to control the system, display/output devices for outputting graphic information attained by a control of pixels arranged in a plurality of dimensions, a frame buffer for storing information corresponding to pixels output to the display/output devices, and a graphic processor for receiving a command and parameter information from the main memory and/or the main processor, for generating character and graphic data in accordance with a predetermined processing procedure, and for performing a transfer control including an execution of a drawing processing to transfer generated data through first and second address buses and first and second data buses to the main memory and/or frame buffer.
    • 一种图形处理系统,具有用于存储程序的主存储器和对应于像素的信息,用于执行从主存储器传送或从外部传送的程序的主处理器来控制系统,用于输出通过控制获得的图形信息的显示/输出装置 用于存储对应于输出到显示/输出设备的像素的信息的帧缓冲器,以及用于从主存储器和/或主处理器接收命令和参数信息的图形处理器,用于生成 字符和图形数据,并且用于执行包括执行绘图处理的传送控制,以通过第一和第二地址总线以及第一和第二数据总线将生成的数据传送到主存储器和/或帧缓冲器 。
    • 58. 发明授权
    • Picture processing apparatus and picture processing method
    • 图像处理装置和图像处理方法
    • US06600492B1
    • 2003-07-29
    • US09292375
    • 1999-04-15
    • Tetsuya ShimomuraShigeru MatsuoKazuyoshi KogaKoyo KatsuraYasuhiro NakatsukaKazushige Yamagishi
    • Tetsuya ShimomuraShigeru MatsuoKazuyoshi KogaKoyo KatsuraYasuhiro NakatsukaKazushige Yamagishi
    • G06T1500
    • G06T1/60
    • In order to assure that a plurality of circuits such as a CPU I/F circuit, a rendering circuit, a video input circuit and a display circuit, which are each required to always complete a processing within a prescribed time, are each assured the ability to make as many accesses to a memory as required to complete the processing within the prescribed time, it is necessary to arbitrate a contention for an access to the memory through an internal bus among the circuits by employing a bus control circuit wherein priority levels assigned to the circuits to make an access to the internal bus are dynamically changed by comparing degrees of access urgency among the circuits. In this way, circuits that each have to always complete theirs processing within a prescribed time are assured the ability to make as many accesses to the memory as required to complete the processing within the prescribed time even if a plurality of such circuits do exist.
    • 为了确保在规定时间内需要总是完成处理的多个电路,例如CPU I / F电路,再现电路,视频输入电路和显示电路,都能确保能力 为了在规定的时间内对存储器进行尽可能多的访问以完成处理,有必要通过使用总线控制电路来通过内部总线来仲裁访问存储器的争用,其中优先级分配给 通过比较电路之间的访问紧急程度来动态地改变访问内部总线的电路。 以这种方式,每个必须总是在规定时间内完成它们的处理的电路确保了即使存在多个这样的电路,也可以在规定的时间内完成处理所需的存储器的访问的能力。
    • 60. 发明授权
    • Unsaturated carboxylic acid polymer, biodegradable builder, and detergent composition
    • 不饱和羧酸聚合物,可生物降解的助洗剂和洗涤剂组合物
    • US06310030B1
    • 2001-10-30
    • US09622917
    • 2000-09-07
    • Shigeru MatsuoYoshikatsu Seino
    • Shigeru MatsuoYoshikatsu Seino
    • C11D337
    • C08F22/02C08F20/04C11D3/3757
    • Provided are an unsaturated carboxylic acid polymer having a degree of calcium-sequestering ability of at least 150 mg CaCO3/g, a degree of 28-day biodegradability of at least 40%, and a number-average molecular weight of from 500 to 1,000,000; a process for producing the unsaturated carboxylic acid polymer by copolymerizing an unsaturated carboxylic acid or its salt with a quinone in the presence of a polymerization initiator; a builder comprising the polymer; a detergent composition comprising the builder and a surfactant; and a dispersant comprising the polymer. The polymer has good calcium ion-sequestering ability and good biodegradability, and is highly useful as a material for builders.
    • 提供具有至少150mg CaCO 3 / g,28天生物降解度至少40%,数均分子量为500至1,000,000的钙螯合能力程度的不饱和羧酸聚合物; 通过在聚合引发剂的存在下使不饱和羧酸或其盐与醌进行共聚来制造不饱和羧酸聚合物的方法; 包含所述聚合物的助洗剂; 包含助洗剂和表面活性剂的洗涤剂组合物; 和包含聚合物的分散剂。 该聚合物具有良好的钙离子螯合能力和良好的生物降解性,并且作为助洗剂的材料非常有用。