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51. 发明授权

US08996958B2 Method, device and computer program product for decoding a codeword 有权
标题翻译：用于解码码字的方法，设备和计算机程序产品
公开(公告)号：US08996958B2
公开(公告)日：2015-03-31
申请号：US13574368
申请日：2011-01-27
申请人： Roy D. Cideciyan , Ilias Iliadis , Roman Pletka
发明人： Roy D. Cideciyan , Ilias Iliadis , Roman Pletka
IPC分类号： G11C29/00 , G06F11/10
CPC分类号： G06F11/1072
摘要： A method and apparatus for decoding a codeword received from a flash memory. The flash memory comprises multi-level flash memory cells, wherein each multi-level flash memory cell stores one symbol of the codeword. An ECC decoder is arranged for decoding the codeword into a decoded codeword and correcting a maximum number of errors. The method determines the number of errors in the codeword. If the number of errors is more than the maximum number of errors that the ECC decoder can correct, the method generates modified codewords, calculates a corrective effect of a modified codeword, and determines a decoded codeword based on the corrective effect.
摘要翻译：一种用于对从闪速存储器接收的码字进行解码的方法和装置。闪速存储器包括多级闪存单元，其中每个多级闪存单元存储码字的一个符号。 ECC解码器被布置为用于将码字解码为解码码字并校正最大数量的错误。该方法确定码字中的错误数。如果错误数量大于ECC解码器可以纠正的最大错误数量，则该方法生成修改后的码字，计算修正码字的校正效果，并根据校正效果确定解码码字。

52. 发明申请

US20120072683A1 Managing Write Operations in a Computerized Memory 有权
标题翻译：在电脑内存中管理写入操作
公开(公告)号：US20120072683A1
公开(公告)日：2012-03-22
申请号：US13231996
申请日：2011-09-14
申请人： Ilias Iliadis
发明人： Ilias Iliadis
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/02 , G06F12/023 , G06F12/0253 , G06F12/0269 , G06F2212/7201 , G06F2212/7205
摘要： A method and apparatus for managing write operations in memory. The method includes a memory including units, each of the units including subunits. Data updates are written “out-of-place”, in that new data does not overwrite the memory locations (subunits) where the data is currently stored. The at least one subunit containing the outdated data is marked as invalid. As a result, a subunit can contain up to date data in a valid subunit next to invalid subunits. For reclaiming units for erasure, it is searched amongst the units to identify a unit or units that match a predetermined criterion. The data of valid subunits of such identified unit is rewritten to another unit or units.
摘要翻译：一种用于管理存储器中的写入操作的方法和装置。该方法包括包括单元的存储器，每个单元包括子单元。数据更新被写入“不在位”，因为新数据不会覆盖当前存储数据的存储单元（子单元）。包含过时数据的至少一个子单元被标记为无效。因此，子单元可以包含无效子单元旁边的有效子单元中的最新数据。对于用于擦除的回收单元，在单元之间搜索以识别符合预定标准的单位或单位。这种识别单元的有效子单元的数据被重写为另一单元。

53. 发明申请

US20080069113A1 METHOD AND SYSTEM FOR CONTROLLING ATM TRAFFIC USING BANDWIDTH ALLOCATION TECHNOLOGY 失效
标题翻译：使用带宽分配技术控制ATM交通的方法和系统
公开(公告)号：US20080069113A1
公开(公告)日：2008-03-20
申请号：US11946057
申请日：2007-11-28
申请人： Patrick Droz , Ilias Iliadis , Clark Jeffries , Andreas Kind , Joseph Logan
发明人： Patrick Droz , Ilias Iliadis , Clark Jeffries , Andreas Kind , Joseph Logan
IPC分类号： H04L12/28
CPC分类号： H04L47/32 , H04L12/5602 , H04L47/2408 , H04L47/2416 , H04L47/50 , H04L47/525 , H04L47/621 , H04L2012/5631 , H04L2012/5679
摘要： A method and system for managing asynchronous transfer mode (ATM) traffic in a computer system is disclosed. The computer system is used in sending, receiving, or sending and receiving a plurality of ATM flows. Each ATM flow has a plurality of ATM cells, a minimum ATM bandwidth guarantee, and a maximum ATM bandwidth. The method and system include determining whether excess bandwidth exists for the ATM flows. The method and system also include gracefully increasing a portion of the ATM cells transmitted for each ATM flow during periods of excess bandwidth. The portion of the ATM cells transmitted is not more than the maximum ATM bandwidth limit. If an ATM flow presents a sufficient offered load, the portion of the ATM cells transmitted in the flow is not less than a minimum ATM bandwidth guarantee.
摘要翻译：公开了一种在计算机系统中管理异步传输模式（ATM）流量的方法和系统。计算机系统用于发送，接收或发送和接收多个ATM流。每个ATM流具有多个ATM信元，最小ATM带宽保证和最大ATM带宽。该方法和系统包括确定ATM流是否存在过量带宽。该方法和系统还包括在超额带宽周期期间适度地增加为每个ATM流发送的ATM信元的一部分。发送的ATM信元的部分不超过最大ATM带宽限制。如果ATM流提供足够的提供负载，则在流中发送的ATM信元的部分不小于最小ATM带宽保证。

54. 发明授权

US07120681B2 Cluster control in network systems 有权
公开(公告)号：US07120681B2
公开(公告)日：2006-10-10
申请号：US10059638
申请日：2002-01-29
申请人： Laurent Frelechoux , Michael Osborne , Paolo Scotton , Ilias Iliadis
发明人： Laurent Frelechoux , Michael Osborne , Paolo Scotton , Ilias Iliadis
IPC分类号： G06F15/177 , H04Q7/00
CPC分类号： H04W40/246 , H04L45/04 , H04L45/46 , H04W4/06 , H04W8/24 , H04W40/32 , H04W84/18
摘要： Methods and apparatus are provided for controlling the clustering of nodes which implement a cluster-based routing protocol in a data communications network system where the system comprises a plurality of such nodes which are interconnectable to form a plurality of ad hoc networks. For each node which is a member of a cluster, cluster control information (CCMs) is maintained, this cluster control information being dependent on the size of at least the cluster of which that node is a member. On connection of two nodes which are members of two respective clusters, each of the two nodes transmits its cluster control information to the other node, and then determines whether a clustering condition is satisfied. In each node, the clustering condition is dependent on the cluster control information maintained for that node and the cluster control information received from the other node. In each node, if the clustering condition is satisfied, the node then communicates a clustering agreement to the other node. If the clustering conditions of both nodes are satisfied for the two clusters, the two nodes exchange routing information to merge the two clusters.

55. 发明申请

US20050047405A1 Switching device for controlling data packet flow 审中-公开
标题翻译：用于控制数据包流的切换设备
公开(公告)号：US20050047405A1
公开(公告)日：2005-03-03
申请号：US10923238
申请日：2004-08-20
申请人： Wolfgang Denzel , Ilias Iliadis
发明人： Wolfgang Denzel , Ilias Iliadis
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L49/1515 , H04L49/552
摘要： Methods for controlling a data packet flow through a switch having first, second and third stage switch modules. Each switch module has a number of data inputs, a number of data outputs, and a data packet buffer. The data outputs of the first stage switch modules are connected to data inputs of the second stage switch modules, and data outputs of the second stage switch modules are connected to the data inputs of the third stage switch modules. A data packet received at one of the first stage switch modules is forwarded to a specific data output of one of the third stage switch modules. A method for controlling a data packet flow comprises: A storing credit information associated to each of the second stage switch modules indicating a number of free data packet buffer locations in the respective second stage switch module; selecting one of the second stage switch modules in dependence on the credit information; forwarding the received data packet from the first stage switch module to the selected second stage switch module; forwarding the received data packet from the selected second stage switch module to the respective third stage switch module, from which the received data packet is to be sent; after sending the data packet from the respective third stage switch module, delivering a credit information about the freed data packet buffer location from the third stage switch module to the second stage switch module, wherein the respective second stage switch module is chosen by a credit return strategy.
摘要翻译：用于通过具有第一，第二和第三级交换机模块的交换机来控制数据分组流的方法。每个开关模块具有多个数据输入，多个数据输出和数据分组缓冲器。第一级开关模块的数据输出连接到第二级开关模块的数据输入，第二级开关模块的数据输出连接到第三级开关模块的数据输入端。在第一级交换机模块之一处接收的数据分组被转发到第三级交换机模块之一的特定数据输出。一种用于控制数据分组流的方法包括：存储与每个第二级交换机模块相关联的信用信息，指示相应的第二级交换机模块中的空闲数据分组缓冲器位置的数量; 根据信用信息选择第二级交换机模块之一; 将接收的数据分组从第一级切换模块转发到所选择的第二级交换机模块; 将接收的数据分组从所选择的第二级交换机模块转发到相应的第三级交换机模块，接收的数据分组将从该第三级交换机模块发送; 在从相应的第三级交换机模块发送数据分组之后，从第三级交换机模块向第二级交换机模块发送关于释放的数据分组缓冲器位置的信用信息，其中相应的第二级交换机模块由信用回报战略。

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