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51. 发明授权

US5162263A Semiconductor device having salicide structure, method of manufacturing the same, and heating apparatus 失效
标题翻译：具有硅化物结构的半导体器件及其制造方法以及加热装置
公开(公告)号：US5162263A
公开(公告)日：1992-11-10
申请号：US755820
申请日：1991-09-06
申请人： Iwao Kunishima , Tomonori Aoyama , Kyoichi Suguro
发明人： Iwao Kunishima , Tomonori Aoyama , Kyoichi Suguro
IPC分类号： H01L29/78 , H01L21/225 , H01L21/28 , H01L21/331 , H01L21/336 , H01L29/41 , H01L29/43 , H01L29/45 , H01L29/49
CPC分类号： H01L29/66272 , H01L21/2257 , H01L29/41 , H01L29/45 , H01L29/456 , H01L29/4933 , H01L29/665 , H01L29/66575 , Y10S148/019 , Y10S257/90
摘要： A semiconductor device comprises a semiconductor substrate of a first conductivity type. An insulative film and metal films are sequentially formed on the main top surface of the semiconductor substrate. Impurity diffusion layers of a second conductivity type are selectively formed on the main top surface of the semiconductor substrate. The semiconductor device further comprises metal compound layers consisting of constituting elements of the semiconductor substrate and a metal element. The metal compound layers are formed in the impurity diffusion layers in such a manner that they do not contact the insulative film, and the metal compound layers on the main back surface side of the semiconductor substrate have faces formed in parallel to the top surface of the semiconductor substrate. The method also includes cooling the top of the substrate to form a temperature gradient that results in increased dopant concentration at the bottom of a silicide layer.
摘要翻译：半导体器件包括第一导电类型的半导体衬底。绝缘膜和金属膜依次形成在半导体衬底的主顶表面上。第二导电类型的杂质扩散层选择性地形成在半导体衬底的主顶表面上。半导体器件还包括由半导体衬底的构成元件和金属元素组成的金属化合物层。金属化合物层以不与绝缘膜接触的方式形成在杂质扩散层中，并且半导体衬底的主背面侧上的金属化合物层具有平行于该半导体衬底的顶表面形成的面半导体衬底。该方法还包括冷却衬底的顶部以形成导致硅化物层底部的掺杂剂浓度增加的温度梯度。

52. 发明授权

US08435872B2 Method and apparatus for manufacturing semiconductor device 失效
标题翻译：用于制造半导体器件的方法和装置
公开(公告)号：US08435872B2
公开(公告)日：2013-05-07
申请号：US12831604
申请日：2010-07-07
申请人： Tomonori Aoyama
发明人： Tomonori Aoyama
IPC分类号： H01L21/26
CPC分类号： H01L21/268 , H01L21/26506 , H01L21/26586 , H01L21/324 , H01L21/67017 , H01L21/823814 , H01L21/823821 , H01L29/6659 , H01L29/66795 , H01L29/66803 , H01L29/7833
摘要： According to one embodiment, in a method for manufacturing a semiconductor device, a surface region of a semiconductor substrate is modified into an amorphous layer. A microwave is irradiated to the semiconductor substrate in which the amorphous layer is formed in a dopant-containing gas atmosphere so as to form a diffusion layer in the semiconductor substrate. The dopant is diffused into the amorphous layer and is activated.
摘要翻译：根据一个实施例，在半导体器件的制造方法中，将半导体衬底的表面区域修改为非晶层。在含有掺杂剂的气体气氛中对形成非晶层的半导体衬底照射微波，以在半导体衬底中形成扩散层。掺杂剂扩散到非晶层中并被激活。

53. 发明授权

US08383452B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08383452B2
公开(公告)日：2013-02-26
申请号：US13017498
申请日：2011-01-31
申请人： Tomonori Aoyama , Kiyotaka Miyano , Yusuke Oshiki
发明人： Tomonori Aoyama , Kiyotaka Miyano , Yusuke Oshiki
IPC分类号： H01L21/00 , H01L31/0376
CPC分类号： H01L29/04 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02592 , H01L21/0262 , H01L21/02667
摘要： In one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include depositing a first amorphous film having a first impurity, depositing a third amorphous lower-layer film on the first amorphous film, forming microcrystals on the third amorphous lower-layer film, depositing a third amorphous upper-layer film on the third amorphous lower-layer film to cover the microcrystals, depositing a second amorphous film having a second impurity on the third amorphous upper-layer film, and radiating microwaves to crystallize the third amorphous lower-layer film and the third amorphous upper-layer film to form a third crystal layer, and crystallize the first amorphous film and the second amorphous film to form a first crystal layer and a second crystal layer.
摘要翻译：在一个实施例中，公开了一种用于制造半导体器件的方法。该方法可以包括沉积具有第一杂质的第一非晶膜，在第一非晶膜上沉积第三非晶下层膜，在第三非晶下层膜上形成微晶，在第三非晶下层膜上沉积第三非晶上层膜非晶下层膜覆盖微晶，在第三非晶上层膜上沉积具有第二杂质的第二非晶膜，并且辐射微波以使第三非晶下层膜和第三非晶上层膜结晶以形成第三晶体层，并且使第一非晶膜和第二非晶膜结晶以形成第一晶体层和第二晶体层。

54. 发明申请

US20130023102A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20130023102A1
公开(公告)日：2013-01-24
申请号：US13415628
申请日：2012-03-08
申请人： Tomonori Aoyama , Kiyotaka Miyano , Hiroshi Nakazawa
发明人： Tomonori Aoyama , Kiyotaka Miyano , Hiroshi Nakazawa
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L21/823418 , H01L21/324 , H01L21/823431 , H01L29/665 , H01L29/6659
摘要： According to one embodiment, a method of manufacturing a semiconductor device includes forming a gate electrode on a channel region in a silicon substrate via a gate insulation film; forming a source region and a drain region in the silicon substrate so as to sandwich the channel region along a channel direction by injecting desired impurities to the silicon substrate; forming amorphous regions containing the impurities on surfaces of the source region and the drain region by amorphousizing the surfaces of the source region and the drain region; forming nickel films on the amorphous regions; and forming crystal layers containing the activated impurities and forming nickel silicide films on the crystal layers at low temperature by radiating microwaves to the amorphous regions and the nickel films.
摘要翻译：根据一个实施例，制造半导体器件的方法包括通过栅极绝缘膜在硅衬底的沟道区上形成栅电极; 在所述硅衬底中形成源极区域和漏极区域，以便通过将期望的杂质注入所述硅衬底而沿着沟道方向夹持所述沟道区域; 通过使源极区域和漏极区域的表面非晶化，在源区域和漏极区域的表面上形成含有杂质的非晶区域; 在非晶区上形成镍膜; 并且通过向非晶区域和镍膜辐射微波，形成含有活性杂质的晶体层，并在低温下在晶体层上形成硅化镍膜。

55. 发明授权

US08093141B2 Method of fabricating a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08093141B2
公开(公告)日：2012-01-10
申请号：US12878780
申请日：2010-09-09
申请人： Tomonori Aoyama , Kiyotaka Miyano
发明人： Tomonori Aoyama , Kiyotaka Miyano
IPC分类号： H01L21/00
CPC分类号： H01L21/02532 , H01L21/02667 , H01L21/324 , H01L21/823807 , H01L21/84 , H01L29/045
摘要： According to one embodiment, a method of fabricating a semiconductor device is disclosed. The method can include forming an amorphous layer on a portion of a first silicon substrate having a first plane orientation, and irradiating with micro wave on the amorphous layer to transform from the amorphous layer into a crystalline layer having the first plane orientation.
摘要翻译：根据一个实施例，公开了制造半导体器件的方法。该方法可以包括在具有第一平面取向的第一硅衬底的一部分上形成非晶层，并且在非晶层上照射微波以从非晶层转变为具有第一平面取向的晶体层。

56. 发明申请

US20110076842A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110076842A1
公开(公告)日：2011-03-31
申请号：US12894424
申请日：2010-09-30
申请人： Kenichi YOSHINO , Kiyotaka Miyano , Tomonori Aoyama
发明人： Kenichi YOSHINO , Kiyotaka Miyano , Tomonori Aoyama
IPC分类号： H01L21/26
CPC分类号： H01L29/6659 , H01L21/2686 , H01L21/324 , H01L29/7833
摘要： An ion implantation is performed to implant ions into a silicon substrate, and a microwave irradiation is performed to irradiate the silicon substrate with microwaves after the ion implantation. After the microwave irradiation, the silicon substrate is transferred to a heat-treatment apparatus, where the silicon substrate is treated with heat by being irradiated with light having a pulse width ranging from 0.1 milliseconds to 100 milliseconds, both inclusive.
摘要翻译：执行离子注入以将离子注入到硅衬底中，并且在离子注入之后进行微波照射以对微硅进行照射。在微波照射之后，将硅衬底转移到热处理装置中，其中通过用脉冲宽度为0.1毫秒至100毫秒的光照射硅衬底，其中热处理。

57. 发明申请

US20110062528A1 Semiconductor device and semiconductor device manufacturing method 失效
标题翻译：半导体器件和半导体器件制造方法
公开(公告)号：US20110062528A1
公开(公告)日：2011-03-17
申请号：US12926430
申请日：2010-11-17
申请人： Tomonori Aoyama
发明人： Tomonori Aoyama
IPC分类号： H01L27/092
CPC分类号： H01L21/823835 , H01L29/1033
摘要： A semiconductor device includes a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a silicide gate electrode of an n-type MISFET formed on the gate insulation film; and a silicide gate electrode of a p-type MISFET formed on the gate insulation film and having a thickness smaller than that of the silicide gate electrode of the n-type MISFET, the silicide gate electrode of the p-type MISFET having a ratio of metal content higher than that of the silicide gate electrode of the n-type MISFET.
摘要翻译：半导体器件包括半导体衬底; 形成在所述半导体基板上的栅极绝缘膜; 形成在栅极绝缘膜上的n型MISFET的硅化物栅电极; 以及形成在栅极绝缘膜上并且具有比n型MISFET的硅化物栅电极的厚度小的p型MISFET的硅化物栅电极，p型MISFET的硅化物栅电极的比例为金属含量高于n型MISFET的硅化物栅电极。

58. 发明授权

US07695371B2 Constant velocity joint 失效
标题翻译：恒速接头
公开(公告)号：US07695371B2
公开(公告)日：2010-04-13
申请号：US11795713
申请日：2006-01-19
申请人： Tsutomu Kawakatsu , Naoto Shibata , Masato Saika , Tomonori Aoyama
发明人： Tsutomu Kawakatsu , Naoto Shibata , Masato Saika , Tomonori Aoyama
IPC分类号： F16D3/205
CPC分类号： F16D3/2055 , F16D2003/2026 , Y10S464/905
摘要： A constant velocity joint, where the tilt angle of a first trunnion relative to a plane crossing perpendicularly to the axis of a second shaft is set to be different from the tilt angle of a second trunnion and the tilt angle of a third trunnion. The tilt angle of the second trunnion and the tilt angle of the third trunnion are set to be equal to or different from each other, and three axes of the first to third trunnions are set to be included on a same plane.
摘要翻译：等速万向节，其中第一耳轴相对于垂直于第二轴的轴线交叉的平面的倾斜角被设定为不同于第二耳轴的倾斜角度和第三耳轴的倾斜角度。第二耳轴的倾斜角度和第三耳轴的倾斜角度被设定为彼此相等或不同，并且第一至第三耳轴的三个轴被设置为包括在同一平面上。

59. 发明申请

US20100030679A1 Transreceiver, commodity and service trading system, and transmitter and receiver used therein 审中-公开
标题翻译：收发器，商品和服务交易系统以及其中使用的发送器和接收器
公开(公告)号：US20100030679A1
公开(公告)日：2010-02-04
申请号：US11920112
申请日：2006-05-09
申请人： Hiroyuki Morikawa , Tomonori Aoyama , Shunsuke Saruwatari , Pavel Poupyrev
发明人： Hiroyuki Morikawa , Tomonori Aoyama , Shunsuke Saruwatari , Pavel Poupyrev
IPC分类号： G06Q40/00 , G06F15/16
CPC分类号： G06Q30/06 , G06Q40/04 , H04L69/18
摘要： In a commodity and service trading system, a client computer 60 receives an input window from a Web server 70 connected via the Internet 72 for the user's entry of transaction data regarding a trade of commodity or service. The user's entry of transaction data on the input window is registered in the form of a user data table into a memory 33 of a transreceiver 20 (transreceiver main body 30). The transreceiver 20 enables delivery of the transaction data registered in the user data table, in parallel with reception of transaction data from another transreceiver 20B or 20C. When a commodity or service option set as an object trade and transaction conditions required for the object trade in the received transaction data match with the commodity or service option and the transaction conditions in the transaction data registered in the user data table, the received transaction data is registered in the form of a receiving data table into the memory 33. In response to the registry in the receiving data table, an alert is output in a specific alert pattern to an alert device 40 or a cellular phone 80 connected to the transreceiver 20.
摘要翻译：在商品和服务交易系统中，客户端计算机60从经由因特网72连接的Web服务器70接收输入窗口，以便用户输入关于商品或服务的交易的交易数据。用户将输入窗口上的交易数据输入以用户数据表的形式登记到收发信机20（收发信机主体30）的存储器33中。与来自另一个收发器20B或20C的交易数据的接收并行地，收发器20能够传送登记在用户数据表中的交易数据。当设置为对象交易的商品或服务选项和接收到的交易数据中的对象交易所需的交易条件与商品或服务选项和登记在用户数据表中的交易数据中的交易条件匹配时，接收到的交易数据以接收数据表的形式登记到存储器33中。响应于接收数据表中的注册表，以特定的警报模式将警报输出到连接到收发器20的警报装置40或蜂窝电话80 。

60. 发明申请

US20090057739A1 Ge channel device and method for fabricating ge channel device 审中-公开
标题翻译： Ge通道器件及其制造方法
公开(公告)号：US20090057739A1
公开(公告)日：2009-03-05
申请号：US12230448
申请日：2008-08-28
申请人： Hiroshi Iwai , Takeo Hattori , Kazuo Tsutsui , Kuniyuki Kakushima , Parhat Ahmet , Jaeyeol Song , Masaki Yoshimaru , Yasuyoshi Mishima , Tomonori Aoyama , Hiroshi Oji , Yoshitake Kato
发明人： Hiroshi Iwai , Takeo Hattori , Kazuo Tsutsui , Kuniyuki Kakushima , Parhat Ahmet , Jaeyeol Song , Masaki Yoshimaru , Yasuyoshi Mishima , Tomonori Aoyama , Hiroshi Oji , Yoshitake Kato
IPC分类号： H01L29/78 , H01L21/3205
CPC分类号： H01L29/517 , C23C14/021 , C23C14/024 , C23C14/08 , C23C14/18 , C23C14/30 , H01L21/28158 , H01L21/28255 , H01L21/31604 , H01L29/78
摘要： The Ge channel device comprises: a Ge channel layer (2); a Si-containing interface layer (4) formed on the Ge channel layer (2); a La2O3 layer (6) formed on the interface layer (4); and an electrically conductive layer (8) formed on the La2O3 layer (6). In this device, the Si-containing interface layer (4) functions to suppress the diffusion of Ge atoms into the La2O3 layer (6) and thereby prevents the formation of Ge oxide in the La2O3 layer (6); accordingly, a Ge channel device whose C-V characteristic exhibits only a small hysteresis can be achieved.
摘要翻译： Ge沟道器件包括：Ge沟道层（2）; 形成在所述Ge沟道层（2）上的含Si界面层（4）; 在所述界面层（4）上形成的La 2 O 3层（6）; 和形成在La 2 O 3层（6）上的导电层（8）。在该器件中，含Si界面层（4）用于抑制Ge原子扩散到La2O3层（6）中，从而防止La2O3层（6）中Ge氧化物的形成; 因此，可以实现其C-V特性仅具有小滞后的Ge通道器件。

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