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51. 发明申请

US20090058489A1 Spread spectrum clock generator 失效
标题翻译：扩频时钟发生器
公开(公告)号：US20090058489A1
公开(公告)日：2009-03-05
申请号：US12005500
申请日：2007-12-26
申请人： Young-Hoon Oh
发明人： Young-Hoon Oh
IPC分类号： G06F1/04
CPC分类号： G06F1/08 , G06F1/04
摘要： A spread spectrum clock generator for sequentially modulating a source clock of a fixed frequency with a predetermined frequency range, including: a plurality of first loading units configured to delay clock edges of the source clock by a delay time corresponding to the number of unit delay steps determined by delay step control signals, wherein each of the first loading units comprises a plurality of second loading units each of which is configured to vary a delay value of each unit delay step by changing an inner interconnection configuration thereof in response to unit delay step control signals.
摘要翻译：一种扩展频谱时钟发生器，用于以预定的频率范围顺序地调制固定频率的源时钟，包括：多个第一加载单元，被配置为将源时钟的时钟沿延迟与单元延迟步骤的数目对应的延迟时间由延迟步进控制信号确定，其中每个第一加载单元包括多个第二加载单元，每个第二加载单元被配置为通过响应于单元延迟步长控制来改变其内部互连配置来改变每个单位延迟步骤的延迟值信号。

52. 发明申请

US20070296473A1 Semiconductor integrated circuit including delay line of delay locked loop and method of controlling delay time using the same 有权
标题翻译：半导体集成电路包括延迟锁定回路的延迟线和使用其延迟时间的控制方法
公开(公告)号：US20070296473A1
公开(公告)日：2007-12-27
申请号：US11647467
申请日：2006-12-29
申请人： Young-Hoon Oh
发明人： Young-Hoon Oh
IPC分类号： H03L7/06
CPC分类号： H03L7/0814
摘要： A semiconductor integrated circuit includes a delay line of a delay locked loop. The delay line of the delay locked loop includes a delay variation detecting unit that outputs a detection signal according to a variation in delay time using a reference clock signal, and a plurality of delay units that change a delay time according to the detection signal and delay the output of an input signal by the changed delay time.
摘要翻译：半导体集成电路包括延迟锁定环路的延迟线。延迟锁定环路的延迟线包括延迟变化检测单元，其使用参考时钟信号根据延迟时间的变化输出检测信号，以及多个延迟单元，其根据检测信号和延迟来改变延迟时间通过改变的延迟时间输出一个输入信号。

53. 发明申请

US20070285443A1 Apparatus and method for generating internal signal with variable pulse length according to period of external clock signal 有权
标题翻译：根据外部时钟信号的周期产生具有可变脉冲长度的内部信号的装置和方法
公开(公告)号：US20070285443A1
公开(公告)日：2007-12-13
申请号：US11646343
申请日：2006-12-28
申请人： Young Hoon Oh
发明人： Young Hoon Oh
IPC分类号： G09G5/10
CPC分类号： H03K5/135 , H03K5/19
摘要： An apparatus for generating a pulse which generates an internal signal. The apparatus includes a latch circuit latching an input signal to output a first signal. A clock period detector detects a period of an external clock signal to output a period detecting signal and a delay controller adjusts a delay time of the first signal to output a second signal in response to the period detecting signal. A signal generator receives the first signal and the second signal to output a pulse signal.
摘要翻译：一种用于产生产生内部信号的脉冲的装置。该装置包括锁存输入信号以输出第一信号的锁存电路。时钟周期检测器检测外部时钟信号的周期以输出周期检测信号，并且延迟控制器响应于周期检测信号调整第一信号的延迟时间以输出第二信号。信号发生器接收第一信号和第二信号以输出脉冲信号。

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