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51. 发明申请

US20090062542A1 Novel red electroluminescent compounds and organic electroluminescent device using the same 有权
公开(公告)号：US20090062542A1
公开(公告)日：2009-03-05
申请号：US12220367
申请日：2008-07-24
申请人： Hyun Kim , Young Jun Cho , Hyuck Joo Kwon , Bong Ok Kim , Sung Min Kim , Seung Soo Yoon
发明人： Hyun Kim , Young Jun Cho , Hyuck Joo Kwon , Bong Ok Kim , Sung Min Kim , Seung Soo Yoon
IPC分类号： C07F15/00
CPC分类号： C09K11/06 , C07F15/0033 , C09K2211/1007 , C09K2211/1011 , C09K2211/1029 , C09K2211/185 , H01L51/006 , H01L51/0081 , H01L51/0085 , H01L51/5016 , Y10S428/917
摘要： The present invention relates to novel red phosphorescent compounds exhibiting high luminous efficiency, and organic electroluminescent devices comprising the same.

52. 发明申请

US20080318361A1 METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE 失效
标题翻译：制造半导体封装的方法
公开(公告)号：US20080318361A1
公开(公告)日：2008-12-25
申请号：US11777388
申请日：2007-07-13
申请人： Kwon Whan HAN , Chang Jun PARK , Min Suk SUH , Seong Cheol KIM , Sung Min KIM , Seung Taek YANG , Seung Hyun LEE , Jong Hoon KIM , Ha Na LEE
发明人： Kwon Whan HAN , Chang Jun PARK , Min Suk SUH , Seong Cheol KIM , Sung Min KIM , Seung Taek YANG , Seung Hyun LEE , Jong Hoon KIM , Ha Na LEE
IPC分类号： H01L21/44 , H01L21/02
CPC分类号： H01L21/76898 , H01L25/0657 , H01L25/50 , H01L2224/04042 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/16145 , H01L2224/274 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83191 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/00014 , H01L2924/00 , H01L2924/013
摘要： A method for manufacturing a semiconductor package includes forming a groove in the portion outside of the bonding pad of a semiconductor chip provided with the bonding pad on an upper surface thereof; forming an insulation layer on the side wall of the groove; forming a metal layer over the semiconductor chip so as to fill the groove formed with the insulation layer; etching the metal layer to simultaneously form a through silicon via for filling the groove and a distribution layer for connecting the through silicon via and the bonding pad; and removing a rear surface of the semiconductor chip such that the lower surface of the through silicon via protrudes from the semiconductor chip.
摘要翻译：一种半导体封装的制造方法，其特征在于，在设置有所述接合焊盘的半导体芯片的焊盘的外侧的部分的外表面形成有槽，在所述槽的侧壁上形成绝缘层; 在半导体芯片上形成金属层，以填充形成有绝缘层的槽; 蚀刻金属层以同时形成用于填充槽的通过硅通孔和用于连接通过硅通孔和接合焊盘的分布层; 以及去除所述半导体芯片的后表面，使得所述贯穿硅通孔的下表面从所述半导体芯片突出。

53. 发明授权

US07453716B2 Semiconductor memory device with stacked control transistors 有权
标题翻译：具有堆叠控制晶体管的半导体存储器件
公开(公告)号：US07453716B2
公开(公告)日：2008-11-18
申请号：US11238381
申请日：2005-09-29
申请人： Sung-min Kim , Eun-jung Yun , Jong-soo Seo , Du-eung Kim , Beak-hyung Cho , Byung-seo Kim
发明人： Sung-min Kim , Eun-jung Yun , Jong-soo Seo , Du-eung Kim , Beak-hyung Cho , Byung-seo Kim
IPC分类号： G11C11/00
CPC分类号： H01L27/2436 , G11C13/0004 , G11C13/003 , G11C2213/74 , G11C2213/79
摘要： In a semiconductor memory device and method, phase-change memory cells are provided, each including a plurality of control transistors formed on different layers and variable resistance devices formed of a phase-change material. Each phase-change memory cell includes a plurality of control transistors formed on different layers, and a variable resistance device formed of a phase-change material. In one example, the number of the control transistors is two. The semiconductor memory device includes a global bit line; a plurality of local bit lines connected to or disconnected from the global bit line via local bit line selection circuits which correspond to the local bit lines, respectively; and a plurality of phase-change memory cell groups storing data while being connected to the local bit lines, respectively. Each of the phase-change memory cells of each of the phase-change memory cell groups comprises a plurality of control transistors formed on different layers, and a variable resistance device formed of a phase-change material. In addition, the semiconductor memory device has a hierarchical bit line structure that uses a global bit line and local bit lines. Accordingly, it is possible to increase both the integration density of the semiconductor memory device and the amount of current flowing through each of the phase-change memory cells.
摘要翻译：在半导体存储器件和方法中，提供了相变存储单元，每个都包括形成在不同层上的多个控制晶体管和由相变材料形成的可变电阻器件。每个相变存储单元包括形成在不同层上的多个控制晶体管和由相变材料形成的可变电阻器件。在一个示例中，控制晶体管的数量是两个。半导体存储器件包括全局位线; 通过分别对应于本地位线的本地位线选择电路分别连接到全局位线或与全局位线断开的多个局部位线; 以及分别在连接到本地位线时存储数据的多个相变存储单元组。每个相变存储单元组的每个相变存储单元包括形成在不同层上的多个控制晶体管和由相变材料形成的可变电阻器件。此外，半导体存储器件具有使用全局位线和局部位线的分层位线结构。因此，可以增加半导体存储器件的集成密度和流过每个相变存储单元的电流量。

54. 发明申请

US20080262591A1 Stent inserting device 有权
标题翻译：支架插入装置
公开(公告)号：US20080262591A1
公开(公告)日：2008-10-23
申请号：US12070095
申请日：2008-02-14
申请人： Kyong-Min Shin , Sung-Min Kim
发明人： Kyong-Min Shin , Sung-Min Kim
IPC分类号： A61F2/06
CPC分类号： A61F2/95 , A61F2/90 , A61F2002/9505 , A61F2002/9665
摘要： A stent inserting device is used in inserting a self-expandable stent with leading and trailing ends into a tubular organ of a living body. The stent inserting device includes a grip body, an external tube attached to a front end of the grip body, a push member movably inserted into the external tube from a rear end of the grip body, and a tubular cap for removably receiving the stent in a compressed state. The tubular cap has a front end operatively connected to the push member and a rear end slidably fitted to a front end of the external tube. The stent inserting device is designed to hold the stent within the tubular cap in such a manner that the stent is first expanded at the trailing end and then gradually expanded toward the leading end when the tubular cap is pushed away from the external tube.
摘要翻译：支架插入装置用于将具有前端和后端的自扩张支架插入活体的管状器官中。所述支架插入装置包括握持体，附接到所述把手本体的前端的外部管，从所述把手主体的后端可移动地插入到所述外部管中的推动构件，以及用于将所述支架可拆卸地接收的管状帽压缩状态。管状帽具有可操作地连接到推动构件的前端和可滑动地装配到外部管的前端的后端。支架插入装置被设计成将支架保持在管状帽内，使得支架首先在后端膨胀，然后当管状帽被推离外管时朝向前端逐渐膨胀。

55. 发明申请

US20080157357A1 STACK PACKAGE HAVING REDUCED ELECTRICAL CONNECTION LENGTH SUITABLE FOR HIGH SPEED OPERATIONS AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：具有适用于高速操作的减少电连接长度的堆叠包及其制造方法
公开(公告)号：US20080157357A1
公开(公告)日：2008-07-03
申请号：US11754555
申请日：2007-05-29
申请人： Sung Min Kim , Min Suk Suh
发明人： Sung Min Kim , Min Suk Suh
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L25/0657 , H01L21/563 , H01L21/76898 , H01L24/11 , H01L24/83 , H01L24/90 , H01L2224/05001 , H01L2224/05022 , H01L2224/05572 , H01L2224/05624 , H01L2224/05647 , H01L2224/1147 , H01L2224/13099 , H01L2224/13124 , H01L2224/13147 , H01L2224/16235 , H01L2224/2929 , H01L2224/293 , H01L2224/73203 , H01L2224/90 , H01L2225/06513 , H01L2225/06544 , H01L2225/06565 , H01L2924/00011 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01082 , H01L2224/29075 , H01L2224/83851 , H01L2224/05099
摘要： A stack package includes an upper semiconductor chip having a plurality of first bonding pads which are formed on an upper surface of the upper semiconductor chip and via-holes which are defined in the upper semiconductor chip under the respective first bonding pads; and a lower semiconductor chip attached to a lower surface of the upper semiconductor chip and having a plurality of second bonding pads which are formed on an upper surface of the lower semiconductor chip and bumps which are formed on the respective second bonding pads and are inserted into the respective via-holes to be come into the respective first bonding pads.
摘要翻译：堆叠封装包括上半导体芯片，其具有形成在上半导体芯片的上表面上的多个第一焊盘和在相应的第一焊盘下方的上半导体芯片中限定的通孔; 以及下半导体芯片，其安装在上半导体芯片的下表面，并且具有多个第二焊盘，其形成在下半导体芯片的上表面上，并且形成在各个第二焊盘上并被插入各个通孔将进入相应的第一接合焊盘。

56. 发明授权

US07361956B2 Semiconductor device having partially insulated field effect transistor (PiFET) and method of fabricating the same 有权
标题翻译：具有部分绝缘的场效应晶体管（PiFET）的半导体器件及其制造方法
公开(公告)号：US07361956B2
公开(公告)日：2008-04-22
申请号：US10982554
申请日：2004-11-05
申请人： Chang-Woo Oh , Dong-Gun Park , Jeong-Dong Choe , Min-Sang Kim , Sung-Min Kim
发明人： Chang-Woo Oh , Dong-Gun Park , Jeong-Dong Choe , Min-Sang Kim , Sung-Min Kim
IPC分类号： H01L27/01 , H01L27/12 , H01L31/0392
CPC分类号： H01L21/823481 , H01L21/76283 , H01L29/1079 , H01L29/78
摘要： Embodiments of the invention include a partially insulated field effect transistor and a method of fabricating the same. According to some embodiments, a semiconductor substrate is formed by sequentially stacking a bottom semiconductor layer, a sacrificial layer, and a top semiconductor layer. The sacrificial layer may be removed to form a buried gap region between the bottom semiconductor layer and the top semiconductor layer. Then, a transistor may be formed on the semiconductor substrate. The sacrificial layer may be a crystalline semiconductor formed by an epitaxial growth technology.
摘要翻译：本发明的实施例包括部分绝缘的场效应晶体管及其制造方法。根据一些实施例，通过顺序堆叠底部半导体层，牺牲层和顶部半导体层来形成半导体衬底。可以去除牺牲层以在底部半导体层和顶部半导体层之间形成掩埋间隙区域。然后，可以在半导体衬底上形成晶体管。牺牲层可以是通过外延生长技术形成的晶体半导体。

57. 发明申请

US20080087941A1 Nonvolatile Memory Devices Having Stacked Structures and Methods of Fabricating the Same 有权
标题翻译：具有堆叠结构的非易失性存储器件及其制造方法
公开(公告)号：US20080087941A1
公开(公告)日：2008-04-17
申请号：US11668115
申请日：2007-01-29
申请人： Eun-Jung Yun , Sung-Young Lee , Min-Sang Kim , Sung-Min Kim , Kyoung-Hwan Yeo
发明人： Eun-Jung Yun , Sung-Young Lee , Min-Sang Kim , Sung-Min Kim , Kyoung-Hwan Yeo
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L27/115 , H01L27/11568 , H01L29/66833 , H01L29/7851 , H01L29/78648 , H01L29/78696 , H01L29/7926
摘要： A memory device includes a first active region on a substrate and first and second source/drain regions on the substrate abutting respective first and second sidewalls of the first active region. A first gate structure is disposed on the first active region between the first and second source/drain regions. A second active region is disposed on the first gate structure between and abutting the first and second source/drain regions. A second gate structure is disposed on the second active region overlying the first gate structure.
摘要翻译：存储器件包括衬底上的第一有源区和衬底上的第一和第二源极/漏极区，邻接第一有源区的相应的第一和第二侧壁。第一栅极结构设置在第一和第二源/漏区之间的第一有源区上。第二有源区域设置在第一栅极结构之间并邻接第一和第二源极/漏极区域。第二栅极结构设置在覆盖第一栅极结构的第二有源区上。

58. 发明申请

US20080081442A1 Methods of forming a pattern and methods of manufacturing a memory device using the same 有权
标题翻译：形成图案的方法和使用该图案的存储器件的制造方法
公开(公告)号：US20080081442A1
公开(公告)日：2008-04-03
申请号：US11605266
申请日：2006-11-29
申请人： Min-Sang Kim , Sung-Young Lee , Sung-Min Kim , Eun-Jung Yun , In-Hyuk Choi
发明人： Min-Sang Kim , Sung-Young Lee , Sung-Min Kim , Eun-Jung Yun , In-Hyuk Choi
IPC分类号： H01L21/20
CPC分类号： H01L27/115 , H01L21/02381 , H01L21/02532 , H01L21/02587 , H01L21/0262 , H01L21/02639 , H01L21/02664 , H01L21/28282 , H01L27/11568 , H01L29/66795 , H01L29/66833 , H01L29/785 , H01L29/792
摘要： In a method of forming a pattern, a sacrificial layer pattern and a stop layer pattern for preventing or reducing an epitaxial growth may be formed on a substrate. The sacrificial layer pattern may have a first hole therethrough, and the first hole partially exposes a top surface of the substrate. At least one active pattern may be formed on a bottom and a sidewall of the first hole by performing a selective epitaxial growth process on the top surface of the substrate and a sidewall of the sacrificial layer pattern. The sacrificial layer pattern and the stop layer pattern for preventing or reducing the epitaxial growth may be removed from the substrate. The at least one active pattern formed by the above method may have a finer size and an improved shaped compared to a conventional active pattern formed by directly patterning layers using a photoresist pattern. Damages in a photolithography process may be prevented or reduced from being generated.
摘要翻译：在形成图案的方法中，可以在基板上形成用于防止或减少外延生长的牺牲层图案和停止层图案。牺牲层图案可以具有穿过其的第一孔，并且第一孔部分地暴露衬底的顶表面。通过在衬底的顶表面和牺牲层图案的侧壁上执行选择性外延生长工艺，可以在第一孔的底部和侧壁上形成至少一个活性图案。可以从衬底去除用于防止或减少外延生长的牺牲层图案和停止层图案。与通过使用光致抗蚀剂图案直接图案化图案形成的常规有源图案相比，通过上述方法形成的至少一个有源图案可以具有更细的尺寸和改进的形状。可以防止或减少光刻工艺中的损伤。

59. 发明申请

US20080075973A1 Red Electroluminescent Compounds And Organic Electroluminescent Device Using The Same 审中-公开
标题翻译：红色电致发光化合物和使用它的有机电致发光器件
公开(公告)号：US20080075973A1
公开(公告)日：2008-03-27
申请号：US11628679
申请日：2005-02-04
申请人： Bong-Ok Kim , Chi-Sik Kim , Hoon Han , Seong-Min Kim , Jung-Yeon Kim , Kyu-Sung Cho , So-Young Jung , Seung-Soo Yun , Hyuck-Joo Kwon , Young-Jun Cho , Young-Kwon Kim , Sung-Min Kim
发明人： Bong-Ok Kim , Chi-Sik Kim , Hoon Han , Seong-Min Kim , Jung-Yeon Kim , Kyu-Sung Cho , So-Young Jung , Seung-Soo Yun , Hyuck-Joo Kwon , Young-Jun Cho , Young-Kwon Kim , Sung-Min Kim
IPC分类号： B32B9/04 , C07D471/06 , C07D471/10
CPC分类号： H05B33/14 , C07D471/06 , C07F7/0812 , C07F7/0816 , C09K11/06 , C09K2211/1007 , C09K2211/1011 , C09K2211/1014 , C09K2211/1029 , C09K2211/1088 , C09K2211/181 , C09K2211/186 , H01L51/0051 , H01L51/0059 , H01L51/006 , H01L51/0064 , H01L51/0065 , H01L51/0077 , H01L51/0081 , H01L51/0094 , H01L51/5012 , H01L2251/308
摘要： The present invention is related to organic electroluminescent compounds, methods of their preparation, and electroluminescent devices adopting them as electroluminescent materials.
摘要翻译：本发明涉及有机电致发光化合物，其制备方法以及将其用作电致发光材料的电致发光器件。

60. 发明申请

US20080019083A1 Portable electronic device 有权
标题翻译：便携式电子设备
公开(公告)号：US20080019083A1
公开(公告)日：2008-01-24
申请号：US11723912
申请日：2007-03-22
申请人： Seung-Geun Lim , Won-Seok Joo , Sung-Min Kim
发明人： Seung-Geun Lim , Won-Seok Joo , Sung-Min Kim
IPC分类号： H05K5/00 , H04M1/00
CPC分类号： H04M1/0283 , B29C45/1671 , B29L2031/3437
摘要： A portable electronic device having a front cover, a rear cover, and wherein one of the front cover and the rear cover is metallic and has a pattern portion with a predetermined pattern. In addition, a portable electronic device having a front cover, a rear cover, and a metallic pattern layer provided on at least one of the covers, the metallic pattern layer having a predetermined pattern.
摘要翻译：一种具有前盖，后盖的便携式电子设备，其中前盖和后盖中的一个是金属的并且具有预定图案的图案部分。此外，具有设置在至少一个盖上的前盖，后盖和金属图案层的便携式电子装置，金属图案层具有预定图案。

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