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51. 发明申请

US20110031550A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20110031550A1
公开(公告)日：2011-02-10
申请号：US12727712
申请日：2010-03-19
申请人： Yosuke Komori , Hideaki Aochi , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Tomoko Fujiwara , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
发明人： Yosuke Komori , Hideaki Aochi , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Tomoko Fujiwara , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/792 , H01L27/11573 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： A nonvolatile semiconductor memory device includes: a stacked structural unit including a plurality of electrode films and a plurality of inter-electrode insulating films alternately stacked in a first direction; a first selection gate electrode stacked on the stacked structural unit in the first direction; a first semiconductor pillar piercing the stacked structural unit and the first selection gate electrode in the first direction; a first memory unit provided at an intersection of each of the electrode films and the first semiconductor pillar; and a first selection gate insulating film provided between the first semiconductor pillar and the first selection gate electrode, the first selection gate electrode including a first silicide layer provided on a face of the first selection gate electrode perpendicular to the first direction.
摘要翻译：非易失性半导体存储器件包括：堆叠结构单元，包括多个电极膜和沿第一方向交替堆叠的多个电极间绝缘膜; 第一选择栅电极，沿第一方向堆叠在层叠结构单元上; 第一半导体柱在第一方向上穿透层叠结构单元和第一选择栅电极; 设置在每个电极膜和第一半导体柱的交点处的第一存储单元; 以及设置在所述第一半导体柱和所述第一选择栅极之间的第一选择栅极绝缘膜，所述第一选择栅电极包括设置在所述第一选择栅电极的与所述第一方向垂直的面上的第一硅化物层。

52. 发明申请

US20110012188A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20110012188A1
公开(公告)日：2011-01-20
申请号：US12728658
申请日：2010-03-22
申请人： Masaru KITO , Ryota Katsumata , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Tomoko Fujiwara , Hideaki Aochi
发明人： Masaru KITO , Ryota Katsumata , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Tomoko Fujiwara , Hideaki Aochi
IPC分类号： H01L27/105
CPC分类号： H01L27/11578 , H01L27/11582
摘要： A semiconductor memory device includes: a stacked body formed of a plurality of inter-layer insulating films and a plurality of electrode films alternately stacked and having a through-hole formed in the stacking direction; an electrode-side insulating film of a film thickness of 4 nm or more provided on an inner surface of the through-hole; a charge storage film provided on the electrode-side insulating film; a semiconductor-side insulating film of a film thickness of 4 nm or more provided on the charge storage film; and a semiconductor pillar buried in the through-hole.
摘要翻译：半导体存储器件包括：由多个层间绝缘膜和交替层叠并具有沿堆叠方向形成的通孔的多个电极膜形成的层叠体; 设置在通孔的内表面上的膜厚度为4nm以上的电极侧绝缘膜; 设置在电极侧绝缘膜上的电荷存储膜; 设置在电荷存储膜上的膜厚度为4nm以上的半导体侧绝缘膜; 以及埋在通孔中的半导体柱。

53. 发明授权

US07847342B2 Non-volatile semiconductor storage device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储装置及其制造方法
公开(公告)号：US07847342B2
公开(公告)日：2010-12-07
申请号：US12325023
申请日：2008-11-28
申请人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L27/115 , H01L21/336 , H01L29/792 , H01L21/8247
CPC分类号： H01L27/11578 , G11C16/0483 , H01L21/8221 , H01L27/115 , H01L27/11556
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a first columnar semiconductor layer extending in a direction perpendicular to a substrate and having a first hollow extending downward from its upper end; a first insulation layer formed in contact with the outer wall of the first columnar semiconductor layer; a second insulation layer formed on the inner wall of the first columnar semiconductor layer so as to leave the first hollow; and a plurality of first conductive layers formed to sandwich the first insulation layer with the first columnar semiconductor layer and functioning as control electrodes of the memory cells.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：第一柱状半导体层，其在垂直于衬底的方向上延伸并具有从其上端向下延伸的第一中空; 形成为与第一柱状半导体层的外壁接触的第一绝缘层; 第二绝缘层，形成在第一柱状半导体层的内壁上以离开第一中空部; 以及形成为将第一绝缘层与第一柱状半导体层夹在中间并用作存储单元的控制电极的多个第一导电层。

54. 发明申请

US20100224928A1 METHOD FOR MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：用于制造非易失性半导体存储器件和非易失性半导体存储器件的方法
公开(公告)号：US20100224928A1
公开(公告)日：2010-09-09
申请号：US12714905
申请日：2010-03-01
申请人： Yoshiaki FUKUZUMI , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Tomoko Fujiwara , Hideaki Aochi , Ryouhei Kirisawa
发明人： Yoshiaki FUKUZUMI , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Tomoko Fujiwara , Hideaki Aochi , Ryouhei Kirisawa
IPC分类号： H01L29/792 , H01L21/8239
CPC分类号： H01L27/11578 , H01L21/28282 , H01L27/11582
摘要： A method for manufacturing a nonvolatile semiconductor memory device, the device including a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction and a semiconductor pillar piercing the stacked structural unit in the first direction, the method includes: forming a stacked unit including a core material film alternately stacked with a sacrificial film on a major surface of a substrate perpendicular to the first direction; making a trench in the stacked unit, the trench extending in the first direction and a second direction in a plane perpendicular to the first direction; filling a filling material into the trench; removing the sacrificial film to form a hollow structural unit, the hollow structural unit including a post unit supporting the core material film on the substrate, the post unit being made of the filling material; and forming the stacked structural unit by stacking one of the insulating films and one of the electrode films on a surface of the core material film exposed by removing the sacrificial film.
摘要翻译：一种用于制造非易失性半导体存储器件的方法，该器件包括层叠结构单元，该堆叠结构单元包括在第一方向上交替堆叠多个电极膜的多个绝缘膜，以及沿第一方向穿透层叠结构单元的半导体柱，方法包括：在垂直于第一方向的基板的主表面上形成包括交替堆叠有牺牲膜的芯材膜的堆叠单元; 在所述堆叠单元中形成沟槽，所述沟槽在垂直于所述第一方向的平面中沿所述第一方向延伸并且沿第二方向延伸; 将填充材料填充到沟槽中; 去除所述牺牲膜以形成中空结构单元，所述中空结构单元包括支撑所述芯材膜的柱单元，所述柱单元由所述填充材料制成; 以及通过将绝缘膜和其中一个电极膜层叠在通过去除牺牲膜而暴露的芯材膜的表面上来形成层叠结构单元。

55. 发明申请

US20100200906A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100200906A1
公开(公告)日：2010-08-12
申请号：US12696544
申请日：2010-01-29
申请人： Masaru KIDOH , Hiroyasu Tanaka , Tomoko Fujiwara , Megumi Ishiduki , Yosuke Komori , Masaru Kito , Yoshiaki Fukuzumi , Ryota Katsumata , Ryouhei Kirisawa , Junya Matsunami , Hideaki Aochi
发明人： Masaru KIDOH , Hiroyasu Tanaka , Tomoko Fujiwara , Megumi Ishiduki , Yosuke Komori , Masaru Kito , Yoshiaki Fukuzumi , Ryota Katsumata , Ryouhei Kirisawa , Junya Matsunami , Hideaki Aochi
IPC分类号： H01L27/112 , H01L21/8246
CPC分类号： H01L27/11578 , H01L27/11551 , H01L27/11556
摘要： A nonvolatile semiconductor memory device includes: a semiconductor substrate; a multilayer structure; a semiconductor pillar; a third insulating film; and a fourth insulating film layer. The a multilayer structure is provided on the semiconductor substrate and including a plurality of constituent multilayer bodies stacked in a first direction perpendicular to a major surface of the semiconductor substrate. Each of the plurality of constituent multilayer bodies includes an electrode film provided parallel to the major surface, a first insulating film, a charge storage layer provided between the electrode film and the first insulating film, and a second insulating film provided between the charge storage layer and the electrode film. The semiconductor pillar penetrates through the multilayer structure in the first direction. The third insulating film is provided between the semiconductor pillar and the electrode film. The fourth insulating film is provided between the semiconductor pillar and the charge storage layer.
摘要翻译：非易失性半导体存储器件包括：半导体衬底; 多层结构; 半导体柱; 第三绝缘膜; 和第四绝缘膜层。多层结构设置在半导体衬底上，并且包括沿垂直于半导体衬底的主表面的第一方向堆叠的多个构成层叠体。多个构成多层体中的每一个包括平行于主表面设置的电极膜，第一绝缘膜，设置在电极膜和第一绝缘膜之间的电荷存储层，以及设置在电荷存储层电极膜。半导体柱沿第一方向穿透多层结构。第三绝缘膜设置在半导体柱和电极膜之间。第四绝缘膜设置在半导体柱和电荷存储层之间。

56. 发明授权

US07755134B2 Nonvolatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US07755134B2
公开(公告)日：2010-07-13
申请号：US11765881
申请日：2007-06-20
申请人： Masaru Kito , Nobutoshi Aoki , Masaru Kidoh , Ryota Katsumata , Masaki Kondo , Naoki Kusunoki , Toshiyuki Enda , Sanae Ito , Hiroyoshi Tanimoto , Hideaki Aochi , Akihiro Nitayama , Riichiro Shirota
发明人： Masaru Kito , Nobutoshi Aoki , Masaru Kidoh , Ryota Katsumata , Masaki Kondo , Naoki Kusunoki , Toshiyuki Enda , Sanae Ito , Hiroyoshi Tanimoto , Hideaki Aochi , Akihiro Nitayama , Riichiro Shirota
IPC分类号： H01L27/115
CPC分类号： H01L29/7881 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L27/1203 , H01L29/42336
摘要： A nonvolatile semiconductor memory device includes: a semiconductor region; device isolation regions placed in the semiconductor region and extending in a column direction; a semiconductor layer placed on the semiconductor region and between the device isolation regions, and having a convex shape in cross section along a row direction; source/drain regions placed in the semiconductor layer and spaced from each other; a gate insulating film placed on the semiconductor layer between the source/drain regions; a floating gate electrode layer placed on the gate insulating film; an intergate insulating film placed on the floating gate electrode layer and upper surfaces of the device isolation regions; and a control gate electrode layer placed on the intergate insulating film and extending in the row direction.
摘要翻译：非易失性半导体存储器件包括：半导体区域; 器件隔离区域放置在半导体区域中并沿列方向延伸; 放置在半导体区域和器件隔离区之间的半导体层，沿着行方向具有凸形的横截面; 源极/漏极区域放置在半导体层中并彼此间隔开; 位于源极/漏极区之间的半导体层上的栅极绝缘膜; 放置在栅极绝缘膜上的浮栅电极层; 布置在浮栅电极层和器件隔离区的上表面上的隔间绝缘膜; 以及控制栅极电极层，其设置在所述隔间绝缘膜上并沿行方向延伸。

57. 发明申请

US20100072538A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100072538A1
公开(公告)日：2010-03-25
申请号：US12534576
申请日：2009-08-03
申请人： Masaru KITO , Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
发明人： Masaru KITO , Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： A nonvolatile semiconductor memory device includes a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors, one of which is connected to each of ends of each of the memory strings. Each of the memory strings is provided with a first semiconductor layer having a pair of columnar portions extending in a perpendicular direction with respect to a substrate, and a joining portion formed so as to join lower ends of the pair of columnar portions; a charge storage layer formed so as to surround a side surface of the columnar portions; and a first conductive layer formed so as to surround the side surface of the columnar portions and the charge storage layer, and configured to function as a control electrode of the memory cells. Each of the select transistors is provided with a second semiconductor layer extending upwardly from an upper surface of the columnar portions; and a second conductive layer formed so as to surround a side surface of the second semiconductor layer with a gap interposed, and configured to function as a control electrode of the select transistors.
摘要翻译：非易失性半导体存储器件包括多个存储串，每个存储串具有串联连接的多个电可重写存储单元; 并选择晶体管，其中一个连接到每个存储器串的每一端。每个存储器串都具有第一半导体层，该第一半导体层具有相对于基板在垂直方向上延伸的一对柱状部分，以及形成为连接该一对柱状部分的下端的接合部分; 形成为围绕所述柱状部的侧面的电荷存储层; 以及形成为围绕柱状部分的侧面和电荷存储层的第一导电层，并且被配置为用作存储单元的控制电极。每个选择晶体管设置有从柱状部分的上表面向上延伸的第二半导体层; 以及第二导电层，其被形成为以间隔开的方式围绕所述第二半导体层的侧表面，并且被配置为用作所述选择晶体管的控制电极。

58. 发明申请

US20090321813A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20090321813A1
公开(公告)日：2009-12-31
申请号：US12405522
申请日：2009-03-17
申请人： Masaru KIDOH , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Hideaki Aochi
发明人： Masaru KIDOH , Hiroyasu Tanaka , Yosuke Komori , Megumi Ishiduki , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Hideaki Aochi
IPC分类号： H01L29/792 , H01L21/336 , H01L21/20
CPC分类号： H01L27/11578 , H01L27/11568 , H01L27/11582 , H01L29/42348
摘要： A nonvolatile semiconductor memory device includes: a stacked body with a plurality of insulating films and electrode films alternately stacked therein, through which a through hole extending in the stacking direction is formed; a semiconductor pillar buried inside the through hole; and a charge storage layer located on both sides of each of the electrode films in the stacking direction and insulated from the electrode film and the semiconductor pillar.
摘要翻译：非易失性半导体存储器件包括：具有交替堆叠的多个绝缘膜和电极膜的堆叠体，通过该堆叠体形成沿层叠方向延伸的通孔; 埋在通孔内的半导体柱; 以及电荷存储层，其位于层叠方向上的每个电极膜的两侧，并与电极膜和半导体柱绝缘。

59. 发明申请

US20090146206A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20090146206A1
公开(公告)日：2009-06-11
申请号：US12325023
申请日：2008-11-28
申请人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L27/115 , H01L21/336 , H01L29/792 , H01L21/8247
CPC分类号： H01L27/11578 , G11C16/0483 , H01L21/8221 , H01L27/115 , H01L27/11556
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a first columnar semiconductor layer extending in a direction perpendicular to a substrate and having a first hollow extending downward from its upper end; a first insulation layer formed in contact with the outer wall of the first columnar semiconductor layer; a second insulation layer formed on the inner wall of the first columnar semiconductor layer so as to leave the first hollow; and a plurality of first conductive layers formed to sandwich the first insulation layer with the first columnar semiconductor layer and functioning as control electrodes of the memory cells.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：第一柱状半导体层，其在垂直于衬底的方向上延伸并具有从其上端向下延伸的第一中空; 形成为与第一柱状半导体层的外壁接触的第一绝缘层; 第二绝缘层，形成在第一柱状半导体层的内壁上以离开第一中空部; 以及形成为将第一绝缘层与第一柱状半导体层夹在中间并用作存储单元的控制电极的多个第一导电层。

60. 发明申请

US20090090965A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20090090965A1
公开(公告)日：2009-04-09
申请号：US12244989
申请日：2008-10-03
申请人： Masaru KITO , Ryota Katsumata , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Masaru KITO , Ryota Katsumata , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L27/11578 , H01L21/8221 , H01L27/0688 , H01L27/11573 , H01L27/11582 , H01L29/66833 , H01L29/7923 , H01L29/7926
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a memory columnar semiconductor extending in a direction perpendicular to a substrate; a tunnel insulation layer contacting the memory columnar semiconductor; a charge accumulation layer contacting the tunnel insulation layer and accumulating charges; a block insulation layer contacting the charge accumulation layer; and a plurality of memory conductive layers contacting the block insulation layer. The lower portion of the charge accumulation layer is covered by the tunnel insulation layer and the block insulation layer.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：在垂直于衬底的方向上延伸的存储器柱状半导体; 与记录柱状半导体接触的隧道绝缘层; 与隧道绝缘层接触并积累电荷的电荷累积层; 与电荷累积层接触的块绝缘层; 以及与块绝缘层接触的多个存储器导电层。电荷累积层的下部被隧道绝缘层和块绝缘层覆盖。

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