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    • 54. 发明授权
    • Apparatus for creating an animation program and method for creating the
same
    • 用于创建动画程序的装置及其创建方法
    • US6167562A
    • 2000-12-26
    • US852425
    • 1997-05-08
    • Hiroshi Kaneko
    • Hiroshi Kaneko
    • G06T13/00G06F9/445
    • G06T13/00G06T2213/08
    • The apparatus for creating an animation program can create animation programs for use with game software and presentations with high efficiency, without requirements for a high degree of programming techniques. The animation program creating apparatus has a moving image drawing device with a program storing circuit for storing animation programs, a character image drawing circuit for drawing character images, and a background image drawing circuit for drawing background images, which is further provided with an image input unit for entering animating image information, an image editing unit for editing the animating image information entered by the image input unit, an animation management circuit for managing multiple pieces of the entered image information by creating an animation program in an image-drawing unit of drawing an image by sorting the multiple pieces of the entered image information in a time series and by providing the animation program with an animation number, and an operating unit for operating the moving image drawing device to reproduce the animation program created.
    • 用于创建动画程序的装置可以以高效率创建用于游戏软件和演示文稿的动画程序,而不需要高度的编程技术。 动画程序创建装置具有运动图像绘制装置,其具有用于存储动画程序的程序存储电路,用于绘制人物图像的字符图像绘制电路和用于绘制背景图像的背景图像绘制电路,还提供有图像输入 用于输入动画图像信息的单元,用于编辑由图像输入单元输入的动画图像信息的图像编辑单元,用于通过在绘图的图像绘制单元中创建动画程序来管理输入的图像信息的动画管理电路的动画管理电路 通过以时间序列对输入的多个图像信息进行排序并且通过向动画程序提供动画编号来生成图像,以及操作单元,用于操作运动图像绘制装置以再现所创建的动画程序。
    • 55. 发明授权
    • Error correction device
    • 纠错装置
    • US6017146A
    • 2000-01-25
    • US654859
    • 1996-05-29
    • Takahiko MasumotoSyugo YamashitaKazuhiro KimuraHiroshi Kaneko
    • Takahiko MasumotoSyugo YamashitaKazuhiro KimuraHiroshi Kaneko
    • H04H40/18H03M13/00
    • H04H40/18H04H2201/13
    • A demodulating circuit demodulates a received signal, and outputs patterns of demodulated data and reliability information bits indicating correctness of the demodulated data. These are supplied to first and second shift registers (4 and 5), respectively. When the number of reliability information bits of Level 1 in the second shift register is a predetermined value or less, a shift operation is repeated a plurality of times. When a reliability information bit of Level 1 is outputted, an error correction control circuit (7) successively outputs all possible bit patterns of the demodulated data An EXOR gate (10) generates all possible patterns of demodulated data An error correcting circuit (11) carries out error correction for all the patterns. When the number is larger than the predetermined value, the error correction is carried out only for the demodulated data supplied from the demodulating circuit in a conventional manner.
    • 解调电路对接收到的信号进行解调,并且输出解调数据的模式和指示解调数据的正确性的可靠性信息比特。 这些分别被提供给第一和第二移位寄存器(4和5)。 当第二移位寄存器中的级别1的可靠性信息位的数量是预定值或更小时,多次重复移位操作。 当输出级别1的可靠性信息位时,纠错控制电路(7)连续地输出解调数据的所有可能的位模式。EXOR门(10)产生解调数据的所有可能的模式。纠错电路(11) 出错纠正所有的模式。 当该数量大于预定值时,仅对于从解调电路以常规方式提供的解调数据进行纠错。
    • 58. 发明授权
    • Data demodulation apparatus
    • 数据解调装置
    • US5777511A
    • 1998-07-07
    • US840477
    • 1997-04-21
    • Takahiko MasumotoKazuhiro KimuraHiroshi Kaneko
    • Takahiko MasumotoKazuhiro KimuraHiroshi Kaneko
    • H04B1/16H04H40/18H04L7/00H04L7/033H03D3/00H04L27/22
    • H04L7/0334H04H40/18H04L7/0331H04H2201/13
    • A digital modulating signal, which is a binary conversion of an RDS signal by a comparator, is sampled by a D-FF with a regeneration clock synchronized with a carrier regenerated by a carrier regeneration circuit. Next, a comparator output is input by an edge detection circuit where a data edge is detected, and the edge interval between this edge and the sampling timing edge of the regeneration clock is detected by a reliability judgment circuit where the edge interval is encoded and output as reliability data. Then, the reliability data is added as LSB data to various sampling data, and data for various symbols is regenerated at the data regeneration circuit. This minimizes the influence of the error data on the data regeneration circuit even if data is sampled erroneously.
    • 作为比较器的RDS信号的二进制转换的数字调制信号由具有与由载波再生电路再生的载波同步的再生时钟的D-FF进行采样。 接下来,比较器输出由边缘检测电路输入,其中检测到数据边缘,并且该边沿与再生时钟的采样定时边缘之间的边缘间隔由可靠性判断电路检测,其中边缘间隔被编码和输出 作为可靠性数据。 然后,将可靠性数据作为LSB数据添加到各种采样数据,并且在数据再生电路再生各种符号的数据。 即使数据被错误地采样,这也使误差数据对数据再生电路的影响最小化。