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51. 发明申请

US20150227325A1 APPARATUS FOR PERFORMING STORAGE VIRTUALIZATION 审中-公开
标题翻译：用于执行存储虚拟化的设备
公开(公告)号：US20150227325A1
公开(公告)日：2015-08-13
申请号：US14695272
申请日：2015-04-24
申请人： Emulex Corporation
发明人： Sriram RUPANAGUNTA , Parag BHIDE
IPC分类号： G06F3/06
CPC分类号： G06F3/0664 , G06F3/0607 , G06F3/0613 , G06F3/0635 , G06F3/067 , G06F11/1435 , G06F11/2005 , G06F11/201 , G06F11/2033 , G06F2201/84 , H04L45/62
摘要： The splitting of storage applications and functions into a control path (CP) component and a data pith (DP) component is disclosed. Reads and writes may be handled primarily in the DP. The CP may be responsible for discovery, configuration, and exception handling. The CP can also be enabled for orchestrating complex data management operations such as snapshots and migration. Storage virtualization maps a virtual I/O to one or more physical I/O. A virtual target (vTarget) in the virtual domain is associated with one physical port in the physical domain. Each vTarget may be associated with one or more virtual LUNs (vLUNs). Each vLUN includes one or more vExtents. Each vExtent may point to a region table, and each entry in the region table may contain a pointer to a region representing a portion of a pExtent, and attributes (e.g. read/write, read only, no access) for that region.
摘要翻译：公开了将存储应用和功能分解成控制路径（CP）组件和数据髓（DP）组件。读写可能主要在DP中处理。 CP可能负责发现，配置和异常处理。也可以启用CP来编排复杂的数据管理操作，如快照和迁移。存储虚拟化将虚拟I / O映射到一个或多个物理I / O。虚拟域中的虚拟目标（vTarget）与物理域中的一个物理端口相关联。每个vTarget可能与一个或多个虚拟LUN（vLUN）相关联。每个vLUN包括一个或多个vExtents。每个vExtent可以指向区域表，并且区域表中的每个条目可以包含指向表示pExtent的一部分的区域的指针，以及该区域的属性（例如，读/写，只读，无访问）。

52. 发明授权

US09075797B2 Restore PCIe transaction ID on the fly 有权
标题翻译：快速恢复PCIe事务ID
公开(公告)号：US09075797B2
公开(公告)日：2015-07-07
申请号：US14093637
申请日：2013-12-02
申请人： Emulex Corporation
发明人： Daming Jin , Vuong Cao Nguyen , Sam Shan-Jan Su , John Sui-Kei Tang , Peter Mark Fiacco
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , G06F13/382
摘要： Restoring retired transaction identifiers (TID) associated with Direct Memory Access (DMA) commands without waiting for all DMA traffic to terminate is disclosed. A scoreboard is used to track retired TIDs and selectively restore retired TIDs on the fly. DMA engines fetch a TID, and use it to tag every DMA request. If the request is completed, the TID can be recycled to be used to tag a subsequent request. However, if a request is not completed, the TID is retired. Retired TIDs can be restored without having to wait for DMA traffic to end. Any retired TID value may be mapped to a bit location inside a scoreboard. All processors in the system may have access to read and clear the scoreboard. Clearing the TID scoreboard may trigger a DMA engine to restore the TID mapped to that location, and the TID may be used again.
摘要翻译：公开了恢复与直接存储器访问（DMA）命令相关联的退出事务标识符（TID），而不等待所有DMA流量终止。记分牌用于跟踪退休的TID，并有选择地恢复退休的TID。 DMA引擎获取TID，并使用它来标记每个DMA请求。如果请求完成，则可以回收TID以用于标记后续请求。但是，如果请求未完成，则TID已退休。可以恢复退出的TID，而不必等待DMA流量结束。任何退休的TID值都可以映射到记分板内的位置。系统中的所有处理器都可以访问读取和清除记分板。清除TID记分板可能会触发DMA引擎恢复映射到该位置的TID，并且可以再次使用TID。

53. 发明申请

US20150156289A1 ROCE PACKET SEQUENCE ACCELERATION 有权
标题翻译： ROCE包装序列加速
公开(公告)号：US20150156289A1
公开(公告)日：2015-06-04
申请号：US14619180
申请日：2015-02-11
申请人： Emulex Corporation
发明人： Parav Pandit , Masoodur Rahman , Kenny Meng-Hung Wu , Chaitanya Tumuluri
IPC分类号： H04L29/06
CPC分类号： H04L69/22 , G06F13/28 , G06F15/17331 , H04L12/28 , H04L41/06 , Y10T409/308736
摘要： A method, network device and system for remote direct memory access (RDMA) over Converged Ethernet (RoCE) packet sequence acceleration are disclosed. The network device comprises one or more functionality components for communicating with a host system. The host system is configured for implementing a first set of functionalities of a network communication protocol, such as RoCE. The one or more functionality components are also operable to implement a second set of functionalities of the network communication protocol.
摘要翻译：公开了一种通过融合以太网（RoCE）分组序列加速进行远程直接存储器访问（RDMA）的方法，网络设备和系统。网络设备包括用于与主机系统通信的一个或多个功能组件。主机系统被配置为实现诸如RoCE之类的网络通信协议的第一组功能。一个或多个功能组件也可操作以实现网络通信协议的第二组功能。

54. 发明申请

US20140258585A1 DATA PATH DIFFERENTIATOR FOR PRE-EMPHASIS REQUIREMENT DETERMINATION OR SLOT IDENTIFICATION 审中-公开
标题翻译：数据路径差分器用于预先要求确定或槽识别
公开(公告)号：US20140258585A1
公开(公告)日：2014-09-11
申请号：US14281394
申请日：2014-05-19
申请人： Emulex Corporation
发明人： Allan Frank Jovanovich , Stephen Eugene Holness
IPC分类号： G06F13/40
CPC分类号： G06F13/4022 , G06F11/2005 , G06F11/2007 , G06F11/2012 , G06F11/2015
摘要： An apparatus and method is disclosed for generating path length information for two (usually redundant) receive paths in a receiving device such as a server blade so that the proper amount of equalization and/or pre-emphasis may be applied to receiver and driver circuits in the server blade. In one embodiment, the path length information comprises a longer or shorter path determination, and may also include a estimation of the slot location. In another embodiment, the path length information comprises a representation of the length of two receive paths. The path length information generating circuit is connected to the two receive inputs of the receiving device though high impedance elements, and the path length information may be utilized by hardware or a processor to set the equalization or pre-emphasis in the receiver and/or driver.
摘要翻译：公开了一种用于为诸如服务器刀片的接收设备中的两个（通常是冗余的）接收路径生成路径长度信息的装置和方法，使得适当量的均衡和/或预加重可以应用于接收机和驱动器电路服务器刀片。在一个实施例中，路径长度信息包括更长或更短的路径确定，并且还可以包括时隙位置的估计。在另一个实施例中，路径长度信息包括两个接收路径的长度的表示。路径长度信息生成电路通过高阻抗元件连接到接收装置的两个接收输入，并且路径长度信息可被硬件或处理器用于在接收器和/或驱动器中设置均衡或预加重。

55. 发明申请

US20140222958A1 REMOTE MANAGEMENT SYSTEM 审中-公开
标题翻译：远程管理系统
公开(公告)号：US20140222958A1
公开(公告)日：2014-08-07
申请号：US14158313
申请日：2014-01-17
申请人： Emulex Corporation
发明人： Bill Bostick , Bill Daugherty , Minh Bryant , Alan Perelman , Robert H. Nixon , William Lasor
IPC分类号： H04L29/08
CPC分类号： H04L67/1097 , G06F3/067 , G06F2009/45579 , H04L41/00 , H04L41/0213 , H04L41/046 , H04L41/22 , H04L67/34
摘要： A system comprising a first host bus adapter coupled to a first Fibre Channel port and a remote manager associated with a second host bus adapter coupled to a second Fibre Channel port. The remote manager is operable to form a command to be sent by the second host bus adapter to the first host bus adapter via a Common Transport layer of a Fibre Channel.
摘要翻译：一种系统，包括耦合到第一光纤通道端口的第一主机总线适配器和与耦合到第二光纤通道端口的第二主机总线适配器相关联的远程管理器。远程管理器可操作以形成由第二主机总线适配器经由光纤通道的公共传输层发送到第一主机总线适配器的命令。

56. 发明申请

US20040236880A1 Dynamically self-adjusting polling mechanism 有权
标题翻译：动态自调查机制
公开(公告)号：US20040236880A1
公开(公告)日：2004-11-25
申请号：US10440681
申请日：2003-05-19
申请人： EMULEX CORPORATION
发明人： David Michael Barrett
IPC分类号： G06F003/00
CPC分类号： G06F11/0787 , G06F11/0745
摘要： A system and method is disclosed for preventing the loss of event messages due to message buffer overruns. A fixed vendor-specific buffer pool is loaded with log messages by firmware in an adapter. A service application periodically polls a device driver for messages in the buffer pool. The device driver responds with the number of messages stored in the buffer pool and the total number of buffers in the buffer pool. The service application then issues nullget next messagenull requests to receive the stored messages. Once the buffer pool has been emptied, the service application writes the messages to a disk file. The service application then computes a percent utilization of the buffer pool, and if the percent utilization exceeds a predetermined threshold, an algorithm is employed for increasing the polling frequency. If the percent utilization is below the threshold, an algorithm is employed for decreasing the polling frequency.
摘要翻译：公开了一种用于防止由于消息缓存超限而导致的事件消息丢失的系统和方法。固定的供应商特定的缓冲池通过固件在适配器中加载日志消息。服务应用程序定期轮询设备驱动程序以获取缓冲池中的消息。设备驱动程序响应缓冲池中存储的消息数量和缓冲池中的缓冲区总数。服务应用程序然后发出“获取下一个消息”请求以接收存储的消息。一旦缓冲池已经清空，服务应用程序会将消息写入磁盘文件。然后，服务应用程序计算缓冲池的百分比利用率，如果百分比利用率超过预定阈值，则采用一种算法来增加轮询频率。如果百分比利用率低于阈值，则采用一种算法来减少轮询频率。

57. 发明申请

US20040225801A1 Hot swap compact PCI power supply 有权
标题翻译：热插拔紧凑型PCI电源
公开(公告)号：US20040225801A1
公开(公告)日：2004-11-11
申请号：US10434626
申请日：2003-05-09
申请人： EMULEX CORPORATION
发明人： Nicholas Emmanuel Scordalakes , Stephen Eugene Holness
IPC分类号： G06F013/00
CPC分类号： G06F13/4081
摘要： A two-step approach to power up a host bus adapter (HBA) or other adapter card during a live insertion is disclosed. A low power linear regulator provides early power while the system is in its reset state, then a FET is gradually turned on using a Hot Swap Controller to provide operational power to the HBA, at which time the linear regulator is disabled. The linear regulator provides early power to pre-charge the CompactPCI signal interface on the HBA and place the HBA CompactPCI drivers in tri-state while the HBA is held in reset.
摘要翻译：公开了在实时插入期间启动主机总线适配器（HBA）或其他适配器卡的两步方法。低功耗线性稳压器在系统处于复位状态时提供早期电源，然后使用热插拔控制器逐渐打开FET，为HBA提供工作电源，此时线性稳压器被禁止。线性稳压器提供早期电源为HBA上的CompactPCI信号接口预充电，并将HBA CompactPCI驱动器置于三态，而HBA保持复位状态。

58. 发明授权

US09680931B1 Message passing for low latency storage networks 有权
公开(公告)号：US09680931B1
公开(公告)日：2017-06-13
申请号：US14329379
申请日：2014-07-11
申请人： Emulex Corporation
发明人： Mark J. Karnowski , Jon Infante
IPC分类号： G06F15/173 , H04L29/08 , H04L29/06 , H04L12/28 , G06F9/455
CPC分类号： G06F3/0611 , G06F3/0659 , G06F3/0665 , G06F3/067 , G06F3/0689 , G06F13/1621 , G06F2009/4557 , G06F2009/45595 , H04L12/28 , H04L49/90 , H04L67/1097
摘要： A method of communication between networked devices in a local storage area network includes forming a message for in-band communication within a local storage area network. The message includes at least one major task and one or more associated sub tasks for execution within the storage area network. The method further includes establishing a first communication link at least between a first networked device and a second networked device in response to the formation of the message; transmitting the message from the first networked device to at least the second networked device within the local storage area network; and in response to receiving the message, executing the sub tasks within the message with a processor to complete the major task and support local storage area network functionality.

59. 发明授权

US09547598B1 Cache prefill of cache memory for rapid start up of computer servers in computer networks 有权
标题翻译：高速缓冲存储器的缓存预填充，用于计算机网络中的计算机服务器的快速启动
公开(公告)号：US09547598B1
公开(公告)日：2017-01-17
申请号：US14588118
申请日：2014-12-31
申请人： Emulex Corporation
发明人： Mark J. Karnowski , Jon Infante
IPC分类号： G06F15/173 , G06F12/08 , G06F3/06 , G06F12/12 , G06F9/455 , H04L12/28
CPC分类号： G06F3/0608 , G06F3/064 , G06F3/0655 , G06F3/067 , G06F3/0688 , G06F9/45558 , G06F12/0866 , G06F2009/4557 , G06F2009/45595 , G06F2212/1016 , G06F2212/1032 , G06F2212/222 , G06F2212/263 , G06F2212/314 , H04L12/28
摘要： A method of communication between networked devices in a local storage area network includes forming a message for in-band communication within a local storage area network. The message includes at least one major task and one or more associated sub tasks for execution within the storage area network. The method further includes establishing a first communication link at least between a first networked device and a second networked device in response to the formation of the message; transmitting the message from the first networked device to at least the second networked device within the local storage area network; and in response to receiving the message, executing the sub tasks within the message with a processor to complete the major task and support local storage area network functionality.
摘要翻译：本地存储区域网络中的联网设备之间的通信方法包括在本地存储区域网内形成用于带内通信的消息。消息包括用于在存储区域网络内执行的至少一个主要任务和一个或多个相关联的子任务。该方法还包括响应于消息的形成，至少在第一联网设备和第二联网设备之间建立第一通信链路; 将所述消息从所述第一联网设备发送到所述本地存储区域网络内的至少所述第二联网设备; 并且响应于接收到消息，用处理器执行消息内的子任务来完成主要任务并支持本地存储区域网络功能。

60. 发明申请

US20150378812A1 System and Method for Error Recovery in an Asynchronous FIFO 审中-公开
标题翻译：异步FIFO中错误恢复的系统和方法
公开(公告)号：US20150378812A1
公开(公告)日：2015-12-31
申请号：US14316435
申请日：2014-06-26
申请人： Emulex Corporation
发明人： Shiro Suzuki
IPC分类号： G06F11/10
CPC分类号： G06F11/10
摘要： A system and method for error recovery in an asynchronous first-in, first-out device (FIFO) are described herein. The FIFO may comprise a FIFO memory that is controlled with a FIFO controller. In accordance with this disclosure, the FIFO memory may receive input data, temporarily store the input data, and transmit the temporarily stored input data as output data. The FIFO controller comprises a plurality of control registers. During operation, the FIFO controller may detect a bit error in a control register of the plurality of control registers and set a flag associated with the output data. The FIFO controller may subsequently correct the bit error without requiring a reset to a system environment comprising the FIFO.
摘要翻译：本文描述了异步先进先出设备（FIFO）中的错误恢复的系统和方法。 FIFO可以包括由FIFO控制器控制的FIFO存储器。根据本公开，FIFO存储器可以接收输入数据，临时存储输入数据，并将临时存储的输入数据作为输出数据发送。 FIFO控制器包括多个控制寄存器。在操作期间，FIFO控制器可以检测多个控制寄存器的控制寄存器中的位错误，并设置与输出数据相关联的标志。 FIFO控制器可以随后校正位错误，而不需要重置到包括FIFO的系统环境。

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