会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 41. 发明申请
    • DYNAMIC INSTRUMENTATION
    • 动态仪器
    • US20110154297A1
    • 2011-06-23
    • US12642973
    • 2009-12-21
    • BALBIR SINGHManeesh Soni
    • BALBIR SINGHManeesh Soni
    • G06F9/44
    • G06F9/30145G06F9/3005G06F9/30181G06F11/3471G06F11/3644G06F2201/865
    • A method and system for instrumentation are provided along with a method for instrumentation preparation. The method for instrumentation preparation may comprise obtaining address data of an original instruction in an original instruction stream, obtaining kernel mode data comprising a kernel breakpoint handler, obtaining user mode data comprising a user breakpoint handler, allocating a page of a process address space, creating a trampoline, associating the trampoline with a breakpoint instruction, and replacing the original instruction with the breakpoint instruction. The method for instrumentation may comprise detecting the breakpoint instruction, calling the kernel breakpoint handler, modifying an instruction pointer via the kernel breakpoint handler such that the instruction pointer points to the trampoline, and executing the trampoline. The system for instrumentation may comprise a breakpoint setup module and a breakpoint execution module for respectively setting up and completing instrumentation involving the trampoline.
    • 提供了一种用于仪器仪表的方法和系统以及用于仪器仪表准备的方法。 用于仪器准备的方法可以包括获得原始指令流中的原始指令的地址数据,获得包括内核断点处理程序的内核模式数据,获得包括用户断点处理程序的用户模式数据,分配进程地址空间页面,创建 蹦床,将蹦床与断点指令相关联,并用断点指令替换原始指令。 用于检测的方法可以包括检测断点指令,调用内核断点处理程序,通过内核断点处理程序修改指令指针,使指令指针指向蹦床,并执行蹦床。 用于仪器的系统可以包括用于分别建立和完成涉及蹦床的仪器的断点设置模块和断点执行模块。
    • 42. 发明申请
    • Apparatus and Method for Profiling Software Performance on a Processor with Non-Unique Virtual Addresses
    • 在具有非唯一虚拟地址的处理器上分析软件性能的装置和方法
    • US20110016289A1
    • 2011-01-20
    • US12506153
    • 2009-07-20
    • Bruce J. Ableidinger
    • Bruce J. Ableidinger
    • G06F12/10G06F12/00G06F11/07
    • G06F11/3471G06F2201/865G06F2201/88
    • A system includes a processor with a memory map specifying a user mode region with virtual address translation by a memory management unit and a kernel mode region with direct virtual address translation. The processor executes an application in the user mode region where virtual addresses are not unique. A probe receives trace information from the processor. A host system receives the trace information from the probe. The host system includes a data structure associating a process name, a process identification and a set of instruction counters. Each instruction counter is incremented upon the processing of a designated virtual address within the trace information. A profiling module processes information associated with the process name and set of instruction counters to identify a performance problem in the application.
    • 系统包括处理器,其具有指定由存储器管理单元进行虚拟地址转换的用户模式区域的存储器映射和具有直接虚拟地址转换的内核模式区域。 处理器在虚拟地址不唯一的用户模式区域中执行应用程序。 探测器从处理器接收跟踪信息。 主机系统从探测器接收跟踪信息。 主机系统包括将进程名称,进程标识和一组指令计数器相关联的数据结构。 每个指令计数器在跟踪信息中处理指定的虚拟地址时递增。 分析模块处理与进程名称和指令计数器集相关联的信息,以识别应用程序中的性能问题。
    • 44. 发明申请
    • Systems And Methods For Automated Determination Of Error Handling
    • 自动确定错误处理的系统和方法
    • US20100281303A1
    • 2010-11-04
    • US12835348
    • 2010-07-13
    • Claire Cates
    • Claire Cates
    • G06F11/34
    • G06F11/3688G06F11/3414G06F11/3471G06F11/3636
    • Systems and methods for automated determination of error handling. Data is received including one or more procedural operations to be tested. A first test is run on the data to capture one or more first tracebacks, where each traceback is associated with a procedural operation. A determination is made as to whether each captured first traceback is unique, where unique tracebacks are added to a unique traceback list. An error condition is simulated on each unique traceback on the unique traceback list by running a second test. The second test is run once for each unique traceback. One or more second tracebacks are captured during each run of the second test. When a unique traceback being tested matches a captured second traceback, an error code is returned and the second test may be run to completion. Errors encountered during each iteration of the second test running to completion are identified.
    • 用于自动确定错误处理的系统和方法。 收到的数据包括要测试的一个或多个程序操作。 对数据进行第一个测试,以捕获一个或多个第一个回溯,其中每个追溯与过程操作相关联。 确定每个捕获的第一个追溯是唯一的,其中将唯一的追溯添加到唯一的追溯列表。 通过运行第二个测试,在唯一的追溯列表上的每个唯一的追溯上模拟错误条件。 对于每个唯一的追溯,第二个测试运行一次。 在第二次测试的每次运行期间捕获一个或多个第二回溯。 当被测试的唯一跟踪与捕获的第二个跟踪相匹配时,返回错误代码,并且可以运行第二个测试来完成。 识别第二次测试运行到完成的每次迭代期间遇到的错误。
    • 45. 发明申请
    • Systems And Methods For Automated Determination Of Out Of Memory Handling
    • 用于自动确定内存处理的系统和方法
    • US20100241908A1
    • 2010-09-23
    • US12406363
    • 2009-03-18
    • Claire Cates
    • Claire Cates
    • G06F11/34
    • G06F11/3688G06F11/3428G06F11/3471
    • Systems and methods for automatic determination of out of memory handling situations are provided. A system and method can include receiving data that includes one or more memory allocations or one or more pool heaps and running a test on the data to capture one or more tracebacks. If the one or more tracebacks are unique, then the one or more unique tracebacks are added to a list. The test is run a second time on the first traceback on the list to determine a result that indicates correct execution or incorrect execution with respect to memory handling. The result is stored in a computer-readable storage medium.
    • 提供了用于自动确定内存不足处理情况的系统和方法。 系统和方法可以包括接收包括一个或多个存储器分配或一个或多个池堆的数据,并对数据进行测试以捕获一个或多个追溯。 如果一个或多个追溯是唯一的,那么一个或多个唯一的追溯将添加到列表中。 该测试在列表上的第一个追溯上再次运行,以确定指示正确执行或对内存处理执行不正确的结果。 结果存储在计算机可读存储介质中。
    • 47. 发明申请
    • METHOD AND APPARATUS TO PROFILE RAM MEMORY OBJECTS FOR DISPLACMENT WITH NONVOLATILE MEMORY
    • 配置非易失性存储器释放RAM存储器对象的方法和设备
    • US20100169708A1
    • 2010-07-01
    • US12345306
    • 2008-12-29
    • John RudelicJared HulbertJeffrey Wang
    • John RudelicJared HulbertJeffrey Wang
    • G06F12/06G06F11/20
    • G06F11/3471G06F12/08G06F2212/2024G06F2212/205
    • A memory profiling system profiles memory objects in volatile memory and identifies memory objects as candidates to be stored and read directly from nonvolatile memory. The profiling system monitors memory accesses via page faults and identifies a memory object to be loaded in volatile memory. The profiling system uses page faults to determine a page fault type and a write frequency for the memory object, and determines the memory object's memory access type. The profiling system determines whether the object's memory access type meets the capabilities of the nonvolatile memory technology. If the memory access type meets the nonvolatile memory technology capabilities, the profiling system identifies the memory object as a candidate to be transitioned to and read directly from nonvolatile memory (e.g., NOR and PCM). The profiling system stores the memory object candidates in nonvolatile memory such that the memory objects are read directly from nonvolatile memory.
    • 内存分析系统配置易失性存储器中的内存对象,并将内存对象标识为直接从非易失性存储器存储和读取的候选项。 分析系统通过页面故障监视内存访问,并识别要在易失性存储器中加载的内存对象。 分析系统使用页面错误来确定存储器对象的页面错误类型和写入频率,并确定存储器对象的存储器访问类型。 分析系统确定对象的存储器访问类型是否满足非易失性存储器技术的能力。 如果存储器访问类型满足非易失性存储器技术能力,则分析系统将存储器对象标识为要被转换并直接从非易失性存储器(例如,NOR和PCM)读取的候选。 分析系统将存储器对象候选存储在非易失性存储器中,使得存储器对象被直接从非易失性存储器读取。
    • 49. 发明申请
    • METHOD AND SYSTEM TO MONITOR, DEBUG, AND ANALYZE PERFORMANCE OF AN ELECTRONIC DESIGN
    • 监测,调试和分析电子设计性能的方法和系统
    • US20100057400A1
    • 2010-03-04
    • US12204156
    • 2008-09-04
    • Chien-Chun ChouStephen W. HamiltonDrew E. WingardPascal Chauvet
    • Chien-Chun ChouStephen W. HamiltonDrew E. WingardPascal Chauvet
    • G21C17/00
    • G06F11/3466G06F11/3471G06F11/348G06F2201/86G06F2201/87G06F2201/88
    • Various methods and apparatuses are described that provide instrumentation and analysis of an electronic design. A performance monitoring apparatus may be located on an interconnect of a fabricated integrated circuit. An event measurement module (EM) includes an event generator sub-module that generates monitoring events and event measurements associated with transactions between initiator intellectual property (IP) cores and target IP cores over the interconnect. The EM further includes a software visible register block that provides software access for controlling the EM on which one or more transactions to monitor and to configure one or more parameters associated with that transaction to track. The EM further includes a filtering sub-module that selects transactions to be monitored based on information received from the software. The performance counter module aggregates events and event measurements received from the EM into quantities of performance metrics associated with transactions between the IP cores over the interconnect.
    • 描述了提供电子设计的仪器和分析的各种方法和装置。 性能监视装置可以位于所制造的集成电路的互连上。 事件测量模块(EM)包括一个事件发生器子模块,该事件发生器子模块通过互连产生与发起者知识产权(IP)核心和目标IP内核之间的事务相关联的监视事件和事件测量。 EM还包括软件可见寄存器块,其提供用于控制EM监视的一个或多个事务的软件访问以及配置与该事务相关联的一个或多个参数以进行跟踪。 EM还包括一个过滤子模块,该过滤子模块根据从软件接收的信息来选择要监视的事务。 性能计数器模块将从EM接收到的事件和事件测量聚合到与互连上的IP内核之间的事务相关联的性能度量数量。