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41. 发明授权

US07064645B2 Electronic device 有权
公开(公告)号：US07064645B2
公开(公告)日：2006-06-20
申请号：US10318377
申请日：2002-12-13
申请人： Kazuhiko Kobayashi , Hideharu Sakoda , Hirohisa Matsuki , Osamu Igawa , Mitsutaka Sato , Koju Aoki , Hiroyuki Sakima
发明人： Kazuhiko Kobayashi , Hideharu Sakoda , Hirohisa Matsuki , Osamu Igawa , Mitsutaka Sato , Koju Aoki , Hiroyuki Sakima
IPC分类号： H01F5/00
CPC分类号： H01L27/08 , H01F17/0006 , H01F17/0013 , H01F27/292 , H01F27/362 , H01L23/5227 , H01L23/552 , H01L23/66 , H01L28/10 , H01L2224/05001 , H01L2224/05008 , H01L2224/05011 , H01L2224/05022 , H01L2224/05024 , H01L2224/16 , H01L2924/01078 , H01L2924/3011 , H01L2924/3025
摘要： The present invention realizes a miniaturized electronic device that is still capable of maintaining its high reliability even when miniaturized. To this end, the electronic device has an electronic circuit, comprising: a substrate with a circuit formation surface on which one part of the electronic circuit is formed; a polyimide layer that is formed on the circuit formation surface; and a spiral inductor constituting another part of the electronic circuit, which is formed into a pattern on the polyimide layer.

42. 发明授权

US06905951B2 Method of forming a device substrate and semiconductor package including a pyramid contact 失效
标题翻译：形成器件衬底和包括金字塔接触的半导体封装的方法
公开(公告)号：US06905951B2
公开(公告)日：2005-06-14
申请号：US10862403
申请日：2004-06-08
申请人： Yoshiyuki Yoneda , Masaharu Minamizawa , Eiji Watanabe , Mitsutaka Sato
发明人： Yoshiyuki Yoneda , Masaharu Minamizawa , Eiji Watanabe , Mitsutaka Sato
IPC分类号： H01L23/12 , H01L21/48 , H01L21/56 , H01L21/68 , H01L23/14 , H01L23/31 , H01L23/32 , H01L23/498 , H01L21/44 , H01L21/302 , H01L21/461
CPC分类号： H01L21/6835 , H01L21/4846 , H01L21/563 , H01L23/147 , H01L23/3121 , H01L23/49822 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2221/68345 , H01L2224/05568 , H01L2224/05573 , H01L2224/13099 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/4809 , H01L2224/48095 , H01L2224/48227 , H01L2224/48465 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
摘要翻译：半导体器件基板具有细小的间距的端子，并且能够在不使用特殊工艺的情况下以低成本容易地制造。安装端子具有金字塔形状并且在硅衬底的前表面和后表面之间延伸。安装端子的一端从硅衬底的背面突出。在硅衬底的前表面上形成布线层。布线层包括电连接到安装端子的导电层。

43. 发明授权

US06781224B2 Semiconductor device and package including forming pyramid mount protruding through silicon substrate 有权
标题翻译：包括形成通过硅衬底突出的金字塔安装的半导体器件和封装
公开(公告)号：US06781224B2
公开(公告)日：2004-08-24
申请号：US10262074
申请日：2002-10-02
申请人： Yoshiyuki Yoneda , Masaharu Minamizawa , Eiji Watanabe , Mitsutaka Sato
发明人： Yoshiyuki Yoneda , Masaharu Minamizawa , Eiji Watanabe , Mitsutaka Sato
IPC分类号： H01L2302
CPC分类号： H01L21/6835 , H01L21/4846 , H01L21/563 , H01L23/147 , H01L23/3121 , H01L23/49822 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2221/68345 , H01L2224/05568 , H01L2224/05573 , H01L2224/13099 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/4809 , H01L2224/48095 , H01L2224/48227 , H01L2224/48465 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/09701 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor device substrate has fine terminals with a small pitch and is able to be easily produced at a low cost without using a special process. A mounting terminal has a pyramidal shape and extending between a front surface and a back surface of a silicon substrate. An end of the mounting terminal protrudes from the back surface of the silicon substrate. A wiring layer is formed on the front surface of the silicon substrate. The wiring layer includes a conductive layer that is electrically connected to the mounting terminal.
摘要翻译：半导体器件基板具有细小的间距的端子，并且能够在不使用特殊工艺的情况下以低成本容易地制造。安装端子具有金字塔形状并且在硅衬底的前表面和后表面之间延伸。安装端子的一端从硅衬底的背面突出。在硅衬底的前表面上形成布线层。布线层包括电连接到安装端子的导电层。

44. 发明授权

US06610757B2 Foamable vinyl chloride resin composition 有权
公开(公告)号：US06610757B2
公开(公告)日：2003-08-26
申请号：US09926428
申请日：2001-10-31
申请人： Takenobu Sunagawa , Mitsutaka Sato , Noriko Sakashita , Mamoru Kadokura
发明人： Takenobu Sunagawa , Mitsutaka Sato , Noriko Sakashita , Mamoru Kadokura
IPC分类号： C08J908
CPC分类号： C08J9/0061 , C08J9/08 , C08J2201/03 , C08J2327/06 , C08J2433/00
摘要： An expandable vinyl chloride resin composition that the expansion ratio of a vinyl chloride resin can be greatly increased by the use of thermally decomposable inorganic blowing agents without the use of organic solvent blowing agents, and which comprises 100 parts by weight of a vinyl chloride resin, 0.5 to 30 parts by weight of, as a processing aid, a (meth)acrylic acid ester polymer having a specific viscosity of not less than 0.73 measured at 30° C. with respect to a solution of 0.1 g of the polymer dissolved in 100 ml of chloroform, and not less than 0.3 to less than 2 parts by weight of a thermally decomposable inorganic blowing agent such as sodium bicarbonate.

45. 发明授权

US06586273B2 Semiconductor device manufacturing method having a step of applying a copper foil on a substrate as a part of a wiring connecting an electrode pad to a mounting terminal 有权
公开(公告)号：US06586273B2
公开(公告)日：2003-07-01
申请号：US09866660
申请日：2001-05-30
申请人： Yoshitaka Aiba , Mitsutaka Sato
发明人： Yoshitaka Aiba , Mitsutaka Sato
IPC分类号： H01L2144
CPC分类号： H01L24/13 , H01L21/565 , H01L23/3107 , H01L23/3114 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/94 , H01L2224/02166 , H01L2224/0231 , H01L2224/02313 , H01L2224/02319 , H01L2224/0233 , H01L2224/02333 , H01L2224/0236 , H01L2224/024 , H01L2224/0401 , H01L2224/05548 , H01L2224/05567 , H01L2224/0558 , H01L2224/05644 , H01L2224/11334 , H01L2224/114 , H01L2224/116 , H01L2224/13021 , H01L2224/131 , H01L2224/16 , H01L2224/274 , H01L2224/27436 , H01L2924/00013 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/1067 , H01L2924/12042 , H01L2924/3011 , H01L2224/13099 , H01L2224/05552 , H01L2924/00
摘要： A method of manufacturing a semiconductor device is provided. The method comprises a wire-forming step of forming a wiring on a substrate having an electrode pad so as to connect the electrode pad to a mounting terminal. The wire-forming step includes the steps of: applying a metal foil to the substrate by providing an adhesive therebetween; patterning the metal foil into a predetermined pattern so as to form the wiring; and connecting the wiring to the electrode pad electrically.

46. 发明授权

US06348728B1 Semiconductor device having a plurality of semiconductor elements interconnected by a redistribution layer 有权
公开(公告)号：US06348728B1
公开(公告)日：2002-02-19
申请号：US09493005
申请日：2000-01-28
申请人： Yoshitaka Aiba , Mitsutaka Sato , Toshio Hamano
发明人： Yoshitaka Aiba , Mitsutaka Sato , Toshio Hamano
IPC分类号： H01L2302
CPC分类号： H01L23/49816 , H01L23/5382 , H01L24/19 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L2224/05001 , H01L2224/05023 , H01L2224/05026 , H01L2224/12105 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/73217 , H01L2224/73267 , H01L2224/92244 , H01L2224/94 , H01L2224/97 , H01L2225/06524 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2224/83 , H01L2924/00 , H01L2224/05647 , H01L2224/05099
摘要： A plurality of semiconductor chips are incorporated in a one-piece package so as to substantially increase a mounting area of a semiconductor device so that the semiconductor device can be provided with the projection electrodes having a structure which enable the semiconductor device to be mounted by a conventional surface mounting technique. A redistribution layer interconnects and integrally holds the plurality of semiconductor elements. A plurality of projection electrodes are provided on the redistribution layer for surface mounting. The plurality of semiconductor chips are rendered to be different kinds so that the plurality of different kinds of semiconductor chips together provide a complete function. The plurality of semiconductor chips may be rendered to be the same kind so as to reduce a mounting area of the semiconductor chips as a whole.

47. 发明授权

US5842628A Wire bonding method, semiconductor device, capillary for wire bonding and ball bump forming method 失效
标题翻译：引线接合方法，半导体器件，引线接合用毛细管和球凸点成形法
公开(公告)号：US5842628A
公开(公告)日：1998-12-01
申请号：US628936
申请日：1996-04-08
申请人： Ryuji Nomoto , Kazuto Tsuji , Mitsutaka Sato , Junichi Kasai
发明人： Ryuji Nomoto , Kazuto Tsuji , Mitsutaka Sato , Junichi Kasai
IPC分类号： B23K20/00 , H01L21/607 , B23K31/02
CPC分类号： H01L24/85 , B23K20/004 , H01L24/03 , H01L24/05 , H01L24/48 , H01L24/49 , H01L24/78 , B23K2201/40 , H01L2224/0401 , H01L2224/04042 , H01L2224/05599 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48464 , H01L2224/48465 , H01L2224/48471 , H01L2224/48475 , H01L2224/48479 , H01L2224/48599 , H01L2224/48699 , H01L2224/49109 , H01L2224/4945 , H01L2224/78301 , H01L2224/78302 , H01L2224/85009 , H01L2224/85045 , H01L2224/85051 , H01L2224/85186 , H01L2224/85191 , H01L2224/85205 , H01L2224/85951 , H01L2224/85986 , H01L24/45 , H01L2924/01013 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15153 , H01L2924/1517 , H01L2924/181
摘要： A wire bonding method includes a first bonding process for forming a first ball-shaped part in a wire and bonding the first ball-shaped part to a first connected member; a ball-shaped part forming process for guiding the wire away from a position where the wire is bonded to an inner lead so as to form a predetermined loop, and forming a second ball-shaped part in a predetermined position in the wire; and a second bonding process for bonding the second ball-shaped part to a semiconductor element pad that serves as a second connected member.
摘要翻译：引线接合方法包括用于在线中形成第一球形部分并将第一球形部分接合到第一连接部件的第一接合工艺; 一种用于将线材从导线接合的位置引导到内部引线以形成预定环路的滚珠形部分形成工艺，并且在线材中的预定位置形成第二球形部分; 以及用于将第二球形部件接合到用作第二连接部件的半导体元件衬垫的第二接合工艺。

48. 发明授权

US5519251A Semiconductor device and method of producing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5519251A
公开(公告)日：1996-05-21
申请号：US136462
申请日：1993-10-15
申请人： Mitsutaka Sato , Junichi Kasai
发明人： Mitsutaka Sato , Junichi Kasai
IPC分类号： H01L21/56 , H01L21/48 , H01L23/12 , H01L23/28 , H01L23/31 , H01L23/495 , H01L23/50 , H05K3/34
CPC分类号： H01L24/06 , H01L21/4835 , H01L23/3107 , H01L23/3114 , H01L23/4951 , H01L23/49537 , H01L23/49548 , H01L23/49551 , H01L23/49555 , H01L24/05 , H05K3/3426 , H01L2224/04042 , H01L2224/05556 , H01L2224/05639 , H01L2224/05644 , H01L2224/06136 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/18165 , H01L2924/19107 , H05K2201/10689 , H05K2201/1084 , Y02P70/613 , Y10T29/49121
摘要： A semiconductor device includes a semiconductor chip (11) having a top surface and a bottom surface, a plurality of leads (14) arranged under the bottom surface of the semiconductor chip (11), where the leads (14) have first ends (14a) electrically coupled to the semiconductor chip (11) and second ends which form external terminals (16) and each of the external terminals have a bottom surface, and a package (17, 31) encapsulating the semiconductor chip (11) and the leads (14) so that the bottom surface of each of the external terminals (16) is exposed at a bottom surface (17a, 31a) of the package (17, 31) and remaining portions of the leads (14) are embedded within the package (17, 31), where the package (17, 31) has a size which is approximately the same as that of the semiconductor chip (11) in a plan view viewed from above the top surface of the semiconductor chip (11).
摘要翻译：半导体器件包括具有顶表面和底表面的半导体芯片（11），布置在半导体芯片（11）的底表面下方的多个引线（14），其中引线（14）具有第一端（14a ）和形成外部端子（16）的第二端，并且每个外部端子具有底表面，以及封装半导体芯片（11）和引线（21）的封装（17,31） 14），使得每个外部端子（16）的底表面暴露在封装（17,31）的底表面（17a，31a）处，并且引线（14）的剩余部分嵌入封装（ 17,21），其中，在从半导体芯片（11）的上表面观察的平面图中，封装（17,31）的尺寸与半导体芯片（11）的尺寸大致相同。

49. 发明授权

US5508565A Semiconductor device having a plurality of chips having identical circuit arrangement sealed in package 失效
标题翻译：具有密封在封装中的具有相同电路布置的多个芯片的半导体器件
公开(公告)号：US5508565A
公开(公告)日：1996-04-16
申请号：US355985
申请日：1994-12-14
申请人： Atsushi Hatakeyama , Fumio Baba , Junichi Kasai , Mitsutaka Sato
发明人： Atsushi Hatakeyama , Fumio Baba , Junichi Kasai , Mitsutaka Sato
IPC分类号： H01L23/495 , H01L25/065 , H01L23/48
CPC分类号： H01L24/06 , H01L23/4951 , H01L23/49575 , H01L24/48 , H01L25/0652 , H01L2224/0401 , H01L2224/04042 , H01L2224/05599 , H01L2224/06136 , H01L2224/48472 , H01L2924/00014 , H01L2924/01015 , H01L2924/01033 , H01L2924/01037 , H01L2924/01075 , H01L2924/01082 , H01L2924/01088 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , H01L2924/30107
摘要： A semiconductor device includes a first chip having a circuit arrangement, and a plurality of first terminals formed on a main surface of the first chip and substantially arranged into a line. The semiconductor device also includes a second chip having a circuit arrangement identical to that of the first chip, and a plurality of second terminals formed on a main surface of the second chip and substantially arranged into a line. The first and second chips are arranged in a predetermined direction perpendicular to the main surfaces of the first and second chips. The semiconductor device also includes a plurality of connecting members connected to the first terminals and the second terminals and provided for external connections.
摘要翻译：半导体器件包括具有电路布置的第一芯片和形成在第一芯片的主表面上并且基本上布置成一条线的多个第一端子。半导体器件还包括具有与第一芯片的电路布置相同的电路布置的第二芯片，以及形成在第二芯片的主表面上并且基本上布置成一条线的多个第二端子。第一和第二芯片沿垂直于第一和第二芯片的主表面的预定方向布置。半导体器件还包括连接到第一端子和第二端子并被设置用于外部连接的多个连接构件。

50. 发明授权

US08564975B2 AC-DC converter 有权
标题翻译： AC-DC转换器
公开(公告)号：US08564975B2
公开(公告)日：2013-10-22
申请号：US12663842
申请日：2008-03-12
申请人： Makoto Sato , Mitsutaka Sato
发明人： Makoto Sato , Mitsutaka Sato
IPC分类号： H02M3/335
CPC分类号： H02M1/4225 , H02M3/33507 , H02M2001/0032 , H02M2001/007 , Y02B70/126 , Y02B70/16
摘要： AC-DC converter is provided which comprises an auxiliary winding 8c in a transformer 8, a voltage detector 21 for detecting a voltage VN appearing on auxiliary winding 8c of transformer 8 by on-off operation of a main switching element 9 in a DC-DC converter 10 to produce an output signal VCP1 when voltage VN on auxiliary winding 8c has a negative polarity, a waveform shaper 23 for generating chopping signals VRC from output signal VCP1 of voltage detector 21, and a PWM circuit 27 for comparing output voltage VRC from waveform shaper 23 and output voltage VCH from a boosting chopper 3 to supply drive signals VG1 to step-up switching element 5 in boosting chopper 3 when output voltage VRC from waveform shaper 23 exceeds output voltage VCH from boosting chopper 3. While controlling fluctuation in output voltage from boosting chopper with respect to fluctuation in AC input voltage, the converter can improve input power factor relative to AC voltage and also reduce consumption power during light load period.
摘要翻译：提供AC-DC转换器，其包括变压器8中的辅助绕组8c，用于通过DC-DC中的主开关元件9的通断操作来检测出现在变压器8的辅助绕组8c上的电压VN的电压检测器21 转换器10，当辅助绕组8c上的电压VN为负极时产生输出信号VCP1，用于从电压检测器21的输出信号VCP1产生斩波信号VRC的波形整形器23和用于将来自波形的输出电压VRC进行比较的PWM电路27 整形器23和来自升压斩波器3的输出电压VCH，当来自波形整形器23的输出电压VRC超过升压斩波器3的输出电压VCH时，在升压斩波器3中提供驱动信号VG1到升压开关元件5.同时控制输出电压的波动相对于交流输入电压的波动来提升斩波器，转换器可以提高相对于交流电压的输入功率因数，并降低功率因数轻负载期。

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