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    • 41. 发明授权
    • Apparatus for testing semiconductor wafers
    • 半导体晶片测试装置
    • US6064216A
    • 2000-05-16
    • US241553
    • 1999-02-01
    • Warren M. FarnworthSalman AkramAlan G. WoodDavid R. HembreeJames M. WarkJohn O. Jacobson
    • Warren M. FarnworthSalman AkramAlan G. WoodDavid R. HembreeJames M. WarkJohn O. Jacobson
    • G01R1/04G01R31/28G01R31/02
    • G01R1/0491G01R31/2886
    • A method, apparatus and system for testing semiconductor wafers are provided. The method includes providing a wafer carrier to provide an electrical path for receiving and transmitting test signals to the wafer. The wafer carrier includes a base for retaining the wafer, and an interconnect having contact members configured to establish electrical communication with contact locations on the wafer. The wafer carrier can include one or more compressible spring members configured to bias the wafer and interconnect together in the assembled carrier. The wafer carrier can be assembled, with the wafer in alignment with the interconnect, using optical alignment techniques, and an assembly tool similar to aligner bonder tools used for flip chip bonding semiconductor dice. A system for use with the carrier can include a testing apparatus configured to apply test signals through the carrier to the wafer while the wafer is subjected to temperature cycling.
    • 提供了一种用于测试半导体晶片的方法,装置和系统。 该方法包括提供晶片载体以提供用于接收和传输测试信号到晶片的电路径。 晶片载体包括用于保持晶片的基座和具有被配置为与晶片上的接触位置建立电连通的接触构件的互连。 晶片载体可以包括被配置为偏置晶片并在组装的载体中互连在一起的一个或多个可压缩弹簧构件。 可以使用光学对准技术来组装晶片载体,其中晶片与互连对准,以及类似于用于倒装芯片接合半导体晶片的对准器焊接工具的组装工具。 与载体一起使用的系统可以包括测试装置,其被配置为在晶片受到温度循环的同时将测试信号通过载体施加到晶片。