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41. 发明授权

US08547514B2 Liquid crystal display device and manufacturing method thereof 有权
标题翻译：液晶显示装置及其制造方法
公开(公告)号：US08547514B2
公开(公告)日：2013-10-01
申请号：US13296264
申请日：2011-11-15
申请人： Tomokazu Ishikawa , Osamu Nagashima
发明人： Tomokazu Ishikawa , Osamu Nagashima
IPC分类号： G02F1/1343
CPC分类号： G02F1/1368 , G02F1/134363 , G02F1/136227 , G02F2001/134318 , G02F2001/136231 , G02F2001/136236 , G02F2001/136295
摘要： Provided is a liquid crystal display device where source electrodes each of which includes an overlapping portion which is a portion overlapping a surface of a pixel electrode, video signal lines each of which is formed of a stacked portion constituted of the metal layer and the semiconductor layer, and drain electrodes each of which is formed of a stacked portion constituted of the metal layer and the semiconductor layer are formed, and opening portions each of which exposes a joining portion which is a portion leading to a surface of the pixel electrode from a surface of the source electrode via an edge portion of the overlapping portion are formed in a second insulation layer, and a conductive film which is formed into a common electrode is formed over the joining portion exposed by the opening portion.
摘要翻译：本发明提供一种液晶显示装置，其中，源电极各自包括与像素电极的表面重叠的部分的重叠部分，由金属层和半导体层构成的层叠部分形成的视频信号线形成由金属层和半导体层构成的层叠部形成的漏电极，开放部分将从像素电极的表面到达表面的部分的接合部分露出，的源极电极经由重叠部分的边缘部分形成在第二绝缘层中，并且形成为公共电极的导电膜形成在由开口部分露出的接合部分上。

42. 发明授权

US08264198B2 Battery pack, battery charger and charging method having multiple charging modes 有权
标题翻译：电池组，电池充电器和具有多种充电模式的充电方式
公开(公告)号：US08264198B2
公开(公告)日：2012-09-11
申请号：US12040745
申请日：2008-02-29
申请人： Masanao Sato , Koji Umetsu , Osamu Nagashima
发明人： Masanao Sato , Koji Umetsu , Osamu Nagashima
IPC分类号： H02J7/00
CPC分类号： H01M10/44 , H02J7/0073
摘要： A battery pack, a battery charger, a method for charging a battery pack are provided. The battery pack includes a secondary battery, a switch element for controlling charging and discharging the secondary battery, a controller for controlling the switch element, and a communication unit for performing with a battery charger. During charging, an initial charging is switched to a quick charging when a voltage of the secondary battery reaches a predetermined voltage, and the battery charger judges the battery pack as abnormal when the voltage does not reach the predetermined voltage within a timeout period after the initial charging is started. At least one of the timeout period and the predetermined is stored. At least one of the timeout period and the predetermined voltage to be read out is transmitted through the communication unit to the battery charger.
摘要翻译：提供电池组，电池充电器，充电电池组的方法。电池组包括二次电池，用于控制二次电池的充电和放电的开关元件，用于控制开关元件的控制器以及用电池充电器执行的通信单元。在充电期间，当二次电池的电压达到预定电压时，将初始充电切换到快速充电，并且当初始充电之后的超时期间电压未达到预定电压时，电池充电器判定电池组是异常的充电开始。存储超时期间和预定中的至少一个。要读出的超时周期和预定电压中的至少一个通过通信单元发送到电池充电器。

43. 发明申请

US20110006975A1 LIQUID CRYSTAL DISPLAY DEVICE 有权
标题翻译：液晶显示装置
公开(公告)号：US20110006975A1
公开(公告)日：2011-01-13
申请号：US12773098
申请日：2010-05-04
申请人： Osamu Nagashima , Takahiro Nagami
发明人： Osamu Nagashima , Takahiro Nagami
IPC分类号： G09G3/36
CPC分类号： G02F1/136286 , G02F1/133345 , G02F1/1362 , G02F1/1368 , G09G3/3607 , G09G3/3655 , G09G2300/0426 , H01L27/1214 , H01L27/1222 , H01L27/124 , H01L27/1255 , H01L27/3248 , H01L27/3262 , H01L27/3265 , H01L29/78669
摘要： A display device having pixels disposed in a matrix and a pixel row in which a first pixel, a second pixel, a third pixel, and a fourth pixel are disposed in one direction, includes: a gate signal line having a first gate signal line to which the first pixel and the third pixel are connected and a second gate signal line to which the second pixel and the fourth pixel are connected; a drain signal line supplying a video signal to two pixel columns; and a storage line including a first storage line and a second storage line disposed so as to interpose the pixel row therebetween, wherein the first storage line and the second storage line are electrically connected to each other in a region where the drain signal line is not disposed, and a pixel electrode of each of the pixels has a portion overlapping with the drain signal line and a portion overlapping with the storage line.
摘要翻译：具有设置在矩阵中的像素的显示装置和其中第一像素，第二像素，第三像素和第四像素在一个方向上布置的像素行包括：栅极信号线，其具有第一栅极信号线第一像素和第三像素连接的第二栅极信号线和第二像素和第四像素连接的第二栅极信号线; 一个向两个像素列提供视频信号的漏极信号线; 以及包括第一存储线和第二存储线的存储线，所述第一存储线和第二存储线被布置为将像素列插入其间，其中所述第一存储线和所述第二存储线在所述漏极信号线不在的区域中彼此电连接并且每个像素的像素电极具有与漏极信号线重叠的部分和与存储线重叠的部分。

44. 发明授权

US07855012B2 Secondary battery 有权
标题翻译：二次电池
公开(公告)号：US07855012B2
公开(公告)日：2010-12-21
申请号：US11495741
申请日：2006-07-31
申请人： Toshio Takeshita , Yoichi Miyajima , Hiroaki Sato , Atsushi Takahashi , Shoichi Shintani , Kei Tashiro , Osamu Nagashima , Hideki Kamiya , Hisashi Aoki , Toshiyuki Okada , Yoshihiro Sato
发明人： Toshio Takeshita , Yoichi Miyajima , Hiroaki Sato , Atsushi Takahashi , Shoichi Shintani , Kei Tashiro , Osamu Nagashima , Hideki Kamiya , Hisashi Aoki , Toshiyuki Okada , Yoshihiro Sato
IPC分类号： H01M2/04 , H01M2/22
CPC分类号： H01M2/1066 , H01M2/04 , H01M2/0473 , H01M2/06 , H01M2/342
摘要： A secondary battery for electronic appliance to be installed in an electronic appliance, thereby feeding an electric power to the electronic appliance, is disclosed, which includes: a battery cell in which a positive electrode, a negative electrode and an electrolyte are accommodated in a pack, and a positive electrode terminal and a negative electrode terminal from the positive electrode and the negative electrode, respectively are lead out from the same side face of the pack; a metallic battery can in which one opening from which the battery cell is inserted is formed and which accommodates the battery cell therein such that the side face from which the positive electrode terminal and the negative electrode terminal are lead out is faced towards the opening side; and a lid made of a synthetic resin in which a positive electrode terminal part and a negative electrode terminal part to be connected to the electrodes of the electronic appliance upon being connected to the positive electrode terminal and the negative electrode terminal and being faced outwardly are provided and which plugs the opening of the battery can.
摘要翻译：一种电子设备的二次电池，其安装在电子设备中，从而向电子设备供电，其特征在于，包括：将正极，负极和电解质容纳在电池组中的电池单体，分别从正极和负极的正极端子和负极端子从组件的同一侧面导出; 形成有插入电池单元的一个开口的金属电池罐，并且容纳电池单元，使得正电极端子和负电极端子从其侧面朝向开口侧; 以及由合成树脂构成的盖子，其中，在与正极端子和负极端子连接并面向外部的同时，设置有与电子设备的电极连接的正极端子部和负极端子部并且其插入电池罐的开口。

45. 发明申请

US20100079112A1 Battery controller, battery control method, and battery 审中-公开
标题翻译：电池控制器，电池控制方法和电池
公开(公告)号：US20100079112A1
公开(公告)日：2010-04-01
申请号：US12586640
申请日：2009-09-25
申请人： Osamu Nagashima
发明人： Osamu Nagashima
IPC分类号： H02J7/00
CPC分类号： H02J7/0031 , H02J7/0091
摘要： A battery controller includes: a temperature detecting section including at least one temperature detecting element whose resistance changes with changes in the temperature of a battery cell and/or a charge/discharge control switch connecting the cell with an external apparatus; first and second voltage divider circuits respectively including first and second resistive elements connected with the temperature detecting element; and a control section applying a reference voltage to the first or second voltage divider circuit while switching it such that the value of a voltage applied to the temperature detecting element according to a voltage dividing ratio between the resistive element and the voltage divider circuit changes proportionally to the temperature of the cell and/or the switch, and controlling the switch such that the external apparatus is connected to the cell when the temperature of the cell and/or the switch detected based on a voltage division output of the voltage divider circuit is between first and second temperatures.
摘要翻译：电池控制器包括：温度检测部分，包括至少一个温度检测元件，其电阻随着电池单元的温度变化而变化，和/或连接电池与外部设备的充电/放电控制开关; 分别包括与温度检测元件连接的第一和第二电阻元件的第一和第二分压器电路; 以及控制部分，其对第一或第二分压器电路施加参考电压，同时切换它，使得根据电阻元件和分压器电路之间的分压比施加到温度检测元件的电压的值按比例变化电池和/或开关的温度，并且控制开关，使得当基于分压器电路的分压输出检测到的电池和/或开关的温度在外部设备连接到电池时第一和第二温度。

46. 发明申请

US20090323437A1 Method and Apparatus for Data Inversion in Memory Device 有权
标题翻译：存储器件中数据反转的方法和装置
公开(公告)号：US20090323437A1
公开(公告)日：2009-12-31
申请号：US12492864
申请日：2009-06-26
申请人： Joseph Macri , Olge Drapkin , Grigori Temkine , Osamu Nagashima
发明人： Joseph Macri , Olge Drapkin , Grigori Temkine , Osamu Nagashima
IPC分类号： G11C7/06 , G11C7/10 , G11C7/00
CPC分类号： G11C7/1006 , G11C11/4096 , G11C2207/105 , G11C2207/108
摘要： The present invention is a method of writing information to a synchronous memory device by examining a present word of N bits to be written, where each bit has a high or low value. The present word is compared to a previous word also having N bits to identify the number of bit transitions from a low value to a high value of vice versa. The present bit is inverted when the number of transitions is greater than N/2. To avoid the need for having an extra bit accompany data bytes to indicate the presence or absence of inversion, the present invention takes advantage of a data mask pin that is normally unused during writing operations to carry the inversion bit. Non-inverted data is written directly into the memory device while inverted data is first inverted again before writing to storage locations, so that true data is stored in the memory device.
摘要翻译：本发明是通过检查要写入的N位的当前字，其中每个位具有高或低值来将信息写入同步存储器件的方法。将当前字与前一个字进行比较，该字还具有N位以识别从低值到高值的位转换的数量，反之亦然。当转换次数大于N / 2时，当前位被反转。为了避免需要额外的数据字节来表示反转的存在或不存在，本发明利用在写入操作期间通常不使用的数据掩码引脚来承载反转位。将非反相数据直接写入存储器件，同时在写入存储位置之前首先将反相数据反相，从而将真实数据存储在存储器件中。

47. 发明申请

US20080062372A1 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US20080062372A1
公开(公告)日：2008-03-13
申请号：US11898276
申请日：2007-09-11
申请人： Osamu Nagashima , Kurando Shinba , Eisuke Hatakeyama , Hikaru Ito , Masataka Natori
发明人： Osamu Nagashima , Kurando Shinba , Eisuke Hatakeyama , Hikaru Ito , Masataka Natori
IPC分类号： G02F1/1345
CPC分类号： G02F1/136259 , G02F1/136286 , G02F2001/136263
摘要： A liquid crystal display device is provided to prevent gas bubbles from being generated due to the contact of an inspection probe. An insulating film composed of a gate insulating film and a protection film is formed on a gate wire and wire inspection terminal, and is partially removed from an upper surface of the wire inspection terminal to form a concave portion exposing the top surface of the wire inspection terminal. A transparent conductive film made of ITO is formed on the insulating film, including the concave portion on the wire inspection terminal. The transparent conductive film is electrically connected with the wire inspection terminal at the concave portion, and formed extending onto the gate insulating film and protection film on the opposite side of a scanning wire of the wire inspection terminal. Disconnection inspection is performed using the extending portion as a contact portion with an inspection probe.
摘要翻译：提供一种液晶显示装置，以防止由于检查探针的接触而产生气泡。在栅线和线检查端子上形成由栅极绝缘膜和保护膜构成的绝缘膜，并且从导线检查端子的上表面部分地移除，以形成暴露线检查的顶面的凹部终奌站。在绝缘膜上形成由ITO构成的透明导电膜，包括在线检查端子上的凹部。透明导电膜在凹部处与导线检查端子电连接，并且形成为延伸到栅极绝缘膜和保护膜上，在线检测端子的扫描线的相对侧。使用延伸部作为与检查用探针的接触部进行断线检查。

48. 发明申请

US20060233012A1 Semiconductor storage device having a plurality of stacked memory chips 有权
标题翻译：具有多个层叠的存储芯片的半导体存储装置
公开(公告)号：US20060233012A1
公开(公告)日：2006-10-19
申请号：US11392805
申请日：2006-03-30
申请人： Tomonori Sekiguchi , Hideki Osaka , Tatemi Ido , Osamu Nagashima , Mitsuaki Katagiri , Ichiro Anjo
发明人： Tomonori Sekiguchi , Hideki Osaka , Tatemi Ido , Osamu Nagashima , Mitsuaki Katagiri , Ichiro Anjo
IPC分类号： G11C5/02
CPC分类号： G11C8/12 , G11C5/02 , G11C5/04 , G11C11/4074 , G11C11/4096 , H01L24/50
摘要： A semiconductor storage employs a base substrate (101) having a command/address external terminal group (CA), a data input/output external terminal group (DQ), and a single chip select external terminal (CS), and also comprises a plurality of memory chips (110) to (113) mounted on a base substrate (101), each of which can individually carry out read and write operations. The terminals (CA), (DQ), and (CS) are connected to an interface chip (120). The interface chip (120) has a chip select signal generation circuit that can individually activate a plurality of memory chips (110) to (113) on the basis of an address signal fed by way of the terminal (CA) and on the basis of a chip select signal fed by way of the terminal (CS).
摘要翻译：半导体存储器使用具有命令/地址外部端子组（CA），数据输入/输出外部端子组（DQ）和单个芯片选择外部端子（CS）的基底（101），并且还包括多个的安装在基板（101）上的存储芯片（110）至（113），每个可独立地进行读写操作。端子（CA），（DQ）和（CS）连接到接口芯片（120）。接口芯片（120）具有芯片选择信号生成电路，该电路可以基于通过终端（CA）馈送的地址信号，并基于以下方式单独激活多个存储器芯片（110）〜（113）通过端子（CS）馈送的芯片选择信号。

49. 发明申请

US20050055491A1 Method and apparatus for data inversion in memory device 有权
标题翻译：存储器件中数据反转的方法和装置
公开(公告)号：US20050055491A1
公开(公告)日：2005-03-10
申请号：US10966246
申请日：2004-10-15
申请人： Joseph Macri , Olge Drapkin , Grigori Temkine , Osamu Nagashima
发明人： Joseph Macri , Olge Drapkin , Grigori Temkine , Osamu Nagashima
IPC分类号： G11C7/10 , G11C11/4096 , G06F12/00
CPC分类号： G11C7/1006 , G11C11/4096 , G11C2207/105 , G11C2207/108
摘要： The present invention is a method of writing information to a synchronous memory device by examining a present word of N bits to be written, where each bit has a high or low value. The present word is compared to a previous word also having N bits to identify the number of bit transitions from a low value to a high value of vice versa. The present bit is inverted when the number of transitions is greater than N/2. To avoid the need for having an extra bit accompany data bytes to indicate the presence or absence of inversion, the present invention takes advantage of a data mask pin that is normally unused during writing operations to carry the inversion bit. Non-inverted data is written directly into the memory device while inverted data is first inverted again before writing to storage locations, so that true data is stored in the memory device.
摘要翻译：本发明是通过检查要写入的N位的当前字，其中每个位具有高或低值来将信息写入同步存储器件的方法。将当前字与前一个字进行比较，该字还具有N位以识别从低值到高值的位转换的数量，反之亦然。当转换次数大于N / 2时，当前位被反转。为了避免需要额外的数据字节来表示反转的存在或不存在，本发明利用在写入操作期间通常不使用的数据掩码引脚来承载反转位。将非反相数据直接写入存储器件，同时在写入存储位置之前首先将反相数据反相，从而将真实数据存储在存储器件中。

50. 发明授权

US06459627B1 Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：US06459627B1
公开(公告)日：2002-10-01
申请号：US10045090
申请日：2002-01-15
申请人： Tatsuya Sakamoto , Osamu Nagashima , Riichiro Takemura
发明人： Tatsuya Sakamoto , Osamu Nagashima , Riichiro Takemura
IPC分类号： G11C700
CPC分类号： G11C11/4097 , G11C7/06 , G11C7/18 , G11C11/4091
摘要： Switch MOSFETs are interposed between a sense amplifier disposed in a dynamic RAM and complementary bit lines. After signal voltages are read out by selecting operations of word lines from a plurality of dynamic memory cells selected, to the plurality of pairs of complementary bit lines in accordance with individual storage informations, the switch control signal of the switch MOSFETs is changed from a select level to a predetermined intermediate level. This turns on the switch MOSFETs thereby setting sense nodes to one level in accordance with the amplifying operations of the sense amplifier. An amplification signal generated by the amplifying operation is transmitted through the column select circuit to input/output lines in response to the column select signal, and the switch control signal is returned to the select level in response to the selecting operation of the column select circuit.
摘要翻译：开关MOSFET插在布置在动态RAM中的读出放大器和互补位线之间。在通过从所选择的多个动态存储器单元中选择字线的操作来读出信号电压之后，根据各个存储信息到多对互补位线，开关MOSFET的开关控制信号从选择水平到预定的中间水平。这将导通开关MOSFET，从而根据读出放大器的放大操作将感测节点设置到一个电平。通过放大运算产生的放大信号响应于列选择信号通过列选择电路发送到输入/输出线，并且响应于列选择电路的选择操作，开关控制信号返回到选择电平。

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