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41. 发明授权

US06984862B2 Storage device with charge trapping structure and methods 失效
标题翻译：具有电荷捕获结构和方法的存储装置
公开(公告)号：US06984862B2
公开(公告)日：2006-01-10
申请号：US10689940
申请日：2003-10-20
申请人： Hang Liao , Zhizhang Chen , Alexander Govyadinov , Leslie Louis Szepesi, Jr. , Heon Lee
发明人： Hang Liao , Zhizhang Chen , Alexander Govyadinov , Leslie Louis Szepesi, Jr. , Heon Lee
IPC分类号： H01L29/788
CPC分类号： B82Y10/00 , G11B9/08 , G11B9/14 , G11B9/1409 , G11B9/1418 , G11B9/1436 , G11B11/08
摘要： A storage device includes a first semiconducting layer having a p-dopant and a second semiconducting layer having an n-dopant, disposed on the first semiconducting layer forming a junction between the first and the second semiconducting layers. The storage device also includes a charge trapping structure disposed on the second semiconducting layer and a conductive gate, wherein the conductive gate and the charge trapping structure move relative to the other, wherein an electric field applied across the second semiconducting layer and the conductive gate traps charge in the charge trapping structure.
摘要翻译：存储装置包括具有p-掺杂剂的第一半导体层和具有n-掺杂剂的第二半导体层，其设置在第一半导体层上，形成第一和第二半导体层之间的结。存储装置还包括设置在第二半导体层上的电荷捕获结构和导电栅极，其中导电栅极和电荷捕获结构相对于另一个迁移，其中施加在第二半导体层和导电栅极阱上的电场电荷捕获结构中的电荷。

42. 发明申请

US20050082598A1 Storage device with charge trapping structure and methods 失效
标题翻译：具有电荷捕获结构和方法的存储装置
公开(公告)号：US20050082598A1
公开(公告)日：2005-04-21
申请号：US10689940
申请日：2003-10-20
申请人： Hang Liao , Zhizhang Chen , Alexander Govyadinov , Leslie Szepesi , Heon Lee
发明人： Hang Liao , Zhizhang Chen , Alexander Govyadinov , Leslie Szepesi , Heon Lee
IPC分类号： H01L29/06 , G11B9/00 , G11B9/08 , G11B11/08 , H01L27/10 , H01L29/788
CPC分类号： B82Y10/00 , G11B9/08 , G11B9/14 , G11B9/1409 , G11B9/1418 , G11B9/1436 , G11B11/08
摘要： A storage device includes a first semiconducting layer having a p-dopant and a second semiconducting layer having an n-dopant, disposed on the first semiconducting layer forming a junction between the first and the second semiconducting layers. The storage device also includes a charge trapping structure disposed on the second semiconducting layer and a conductive gate, wherein the conductive gate and the charge trapping structure move relative to the other, wherein an electric field applied across the second semiconducting layer and the conductive gate traps charge in the charge trapping structure.
摘要翻译：存储装置包括具有p-掺杂剂的第一半导体层和具有n-掺杂剂的第二半导体层，其设置在第一半导体层上，形成第一和第二半导体层之间的结。存储装置还包括设置在第二半导体层上的电荷捕获结构和导电栅极，其中导电栅极和电荷捕获结构相对于另一个迁移，其中施加在第二半导体层和导电栅极阱上的电场电荷捕获结构中的电荷。

43. 发明授权

US06841794B2 Dielectric emitter with PN junction 有权
标题翻译：具有PN结的介质发射极
公开(公告)号：US06841794B2
公开(公告)日：2005-01-11
申请号：US10369365
申请日：2003-02-18
申请人： Zhizhang Chen , Hung Liao , Alexander Govyadinov
发明人： Zhizhang Chen , Hung Liao , Alexander Govyadinov
IPC分类号： H01J29/04 , H01J1/308 , H01J1/312 , H01J9/02 , H01J19/24 , H01J21/06 , H01J31/12 , H01L29/06 , H01L29/12
CPC分类号： B82Y10/00 , H01J1/308 , H01J1/312 , H01J9/022 , H01J31/127
摘要： A method for emitting electrons includes the steps of applying a voltage to an electron source to cause hot electrons to be generated with the source, and applying an electric field to cause at least a portion of the hot electrons to be emitted from the electron source.
摘要翻译：用于发射电子的方法包括以下步骤：向电子源施加电压以使源产生热电子，并且施加电场以使至少一部分热电子从电子源发射。

44. 发明授权

US5418019A Method for low temperature plasma enhanced chemical vapor deposition (PECVD) of an oxide and nitride antireflection coating on silicon 失效
标题翻译：硅上氧化物和氮化物抗反射涂层的低温等离子体增强化学气相沉积（PECVD）方法
公开(公告)号：US5418019A
公开(公告)日：1995-05-23
申请号：US248473
申请日：1994-05-25
申请人： Zhizhang Chen , Ajeet Rohatgi
发明人： Zhizhang Chen , Ajeet Rohatgi
IPC分类号： C23C16/34 , C23C16/40 , C23C16/56 , G02B1/11 , B05D3/06 , G02B5/26
CPC分类号： H01L31/02168 , C23C16/345 , C23C16/402 , C23C16/56 , G02B1/115 , Y02E10/50
摘要： A sequential plasma-enhanced chemical vapor deposition (PECVD) of SiN and SiO.sub.x produces a very effective double-layer antireflection coating. This antireflection coating is compared with the frequently used and highly efficient double-layer MgF.sub.2 /ZnS coating. It is shown that the double-layer SiO.sub.x /SiN coating improves the short-circuited current (J.sub.sc) by 47%, open-circuit voltage (V.sub.oc) by 3.7%, and efficiency (Eff) by 55% for silicon cells with oxide surface passivation. The counterpart MgF.sub.2 /ZnS coating gives smaller improvement in V.sub.oc and Eff. However, if silicon cells do not have the oxide passivation, the PECVD SiO.sub.x /SiN gives much greater improvement in the cell parameters, 57% in J.sub.sc, 8% in V.sub.oc, and 66% in efficiency, compared to the MgF.sub.2 /ZnS coating which improves J.sub.sc by 50%, V.sub.oc by 2%, and cell efficiency by 54%. This significant additional improvement results from the PECVD deposition-induced surface/defect passivation. The internal quantum efficiency (IQE) measurements showed that the PECVD SiO.sub.x /SiN coating absorbs fair amount of photons in the short-wavelength range (
摘要翻译： SiN和SiOx的顺序等离子体增强化学气相沉积（PECVD）产生非常有效的双层抗反射涂层。将该抗反射涂层与经常使用且高效的双层MgF2 / ZnS涂层进行比较。显示双层SiOx / SiN涂层将氧化物表面的硅电池的短路电流（Jsc）提高了47％，开路电压（Voc）提高了3.7％，效率（Eff）提高了55％钝化。对应的MgF2 / ZnS涂层在Voc和Eff方面提供较小的改进。然而，如果硅电池不具有氧化物钝化，则与MgF 2 / ZnS涂层相比，PECVD SiO x / SiN在电池参数方面提供了更大的改进，在Jsc中为57％，Voc为8％，效率为66％将Jsc提高50％，Voc提高2％，电池效率提高54％。这种显着的附加改进来自于PECVD沉积诱导的表面/缺陷钝化。内部量子效率（IQE）测量表明，PECVD SiOx / SiN涂层在短波长范围（<500 nm）吸收了相当数量的光子，然而，改进的表面/缺陷钝化比补偿Jsc和与MgF2 / ZnS涂层相比，电池效率提高了很多。

45. 发明授权

US07833830B2 3D interconnect with protruding contacts 失效
标题翻译： 3D连接突出接触
公开(公告)号：US07833830B2
公开(公告)日：2010-11-16
申请号：US11778196
申请日：2007-07-16
申请人： Chien-Hua Chen , Zhizhang Chen , Neal W. Meyer
发明人： Chien-Hua Chen , Zhizhang Chen , Neal W. Meyer
IPC分类号： H01L21/00 , H01L23/48
CPC分类号： H01L23/481 , H01L21/76898 , H01L24/03 , H01L24/05 , H01L24/72 , H01L24/80 , H01L25/0657 , H01L2224/0401 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/13144 , H01L2225/06513 , H01L2225/06541 , H01L2924/01005 , H01L2924/01014 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/1461 , H01L2924/15788 , H01L2924/00014 , H01L2924/00
摘要： This invention relates to a semiconductor having protruding contacts comprising, a first semiconductor substrate having at least one interconnect located substantially within the first substrate, and a second semiconductor substrate having at least one protruding contact point that substantially contacts at least one interconnect.
摘要翻译：本发明涉及一种具有突出接点的半导体，包括：第一半导体衬底，具有至少一个基本上位于第一衬底内的互连，第二半导体衬底具有至少一个基本上接触至少一个互连的突出接触点。

46. 发明申请

US20090130812A1 Creating High Voltage FETs with Low Voltage Process 有权
标题翻译：创建具有低电压工艺的高压FET
公开(公告)号：US20090130812A1
公开(公告)日：2009-05-21
申请号：US12350102
申请日：2009-01-07
申请人： Chin Huang , Jeff Hintzman , James Weaver , Zhizhang Chen
发明人： Chin Huang , Jeff Hintzman , James Weaver , Zhizhang Chen
IPC分类号： H01L21/8234
CPC分类号： H01L21/82385 , H01L21/823807 , H01L21/823814 , H01L29/0638 , H01L29/0847 , H01L29/086 , H01L29/1045 , H01L29/105 , H01L29/456 , H01L29/4933 , H01L29/665 , H01L29/7816 , H01L29/7835
摘要： An integrated circuit (IC) includes a high voltage first-conductivity type field effect transistor (HV-first-conductivity FET) and a high voltage second-type field effect transistor (HV-second-conductivity FET). The HV first-conductivity FET has a second-conductivity-well and a field oxide formed over the second-conductivity-well to define an active area. A first-conductivity-well is formed in at least a portion of the active area, wherein the first-conductivity-well is formed to have the capability to operate as a first-conductivity− drift portion of the HV-first-conductivity FET. The HV second-conductivity FET has a first-conductivity-well and a field oxide formed over the first-conductivity-well to define an active area. A channel stop region I s formed in at least a portion of the active area, wherein the channel stop region is formed to have the capability to operate as second-conductivity− drift portions of the HV-second-conductivity FET.
摘要翻译：集成电路（IC）包括高压第一导电型场效应晶体管（HV-第一导电FET）和高电压第二类场效应晶体管（HV-第二导电FET）。 HV第一导电FET具有形成在第二导电阱上的第二导电阱和场氧化物以限定有源区。在有源区的至少一部分中形成第一导电阱，其中第一导电阱被形成为具有作为HV第一导电FET的第一导电漂移部分工作的能力。 HV第二导电FET具有形成在第一导电阱上的第一导电阱和场氧化物以限定有源区。形成在有源区域的至少一部分中的沟道停止区域I s，其中沟道阻挡区域形成为具有作为HV-第二导电FET的第二导电漂移部分的能力。

47. 发明申请

US20090075421A1 Wet etching of zinc tin oxide thin films 审中-公开
标题翻译：湿蚀刻锌锡氧化物薄膜
公开(公告)号：US20090075421A1
公开(公告)日：2009-03-19
申请号：US11901852
申请日：2007-09-19
申请人： Zhizhang Chen , Eric Wiedemann , Qin Liu
发明人： Zhizhang Chen , Eric Wiedemann , Qin Liu
IPC分类号： H01L21/34 , C23F1/00
CPC分类号： C09K13/04 , H01L21/32134 , H01L31/022483 , H01L31/1884 , H01L51/0023 , Y02E10/50
摘要： A method of wet etching semiconductor zinc tin oxide includes submerging a semiconductor zinc tin oxide film in a bath solution. The film is partially covered with a pattern of protective material, and the bath solution etches semiconductor zinc tin oxide film not covered by the protective material. A system for wet etching semiconductor zinc tin oxide includes a bath containing a bath solution. The bath solution is effective to wet etch the semiconductor zinc tin oxide.
摘要翻译：半导体锌锡氧化物湿法蚀刻的方法包括将半导体锌锡氧化物膜浸没在浴溶液中。该膜部分地覆盖有保护材料的图案，并且浴溶液蚀刻未被保护材料覆盖的半导体氧化锌锡膜。用于湿蚀刻半导体锌锡氧化物的系统包括含有浴溶液的浴。该浴溶液有效地湿蚀刻半导体锌锡氧化物。

48. 发明申请

US20090032812A1 Microelectronic device 有权
标题翻译：微电子器件
公开(公告)号：US20090032812A1
公开(公告)日：2009-02-05
申请号：US11888072
申请日：2007-07-31
申请人： Gregory Herman , Benjamin Clark , Zhizhang Chen
发明人： Gregory Herman , Benjamin Clark , Zhizhang Chen
IPC分类号： H01L29/24 , H01L21/34
CPC分类号： H01L21/02118 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/02667 , H01L21/312 , H01L29/7869
摘要： A microelectronic device includes a thin film transistor having an oxide semiconductor channel and an organic polymer passivation layer formed on the oxide semiconductor channel.
摘要翻译：微电子器件包括具有形成在氧化物半导体沟道上的氧化物半导体沟道和有机聚合物钝化层的薄膜晶体管。

49. 发明申请

US20080100534A1 SWITCH 审中-公开
标题翻译：开关
公开(公告)号：US20080100534A1
公开(公告)日：2008-05-01
申请号：US11553261
申请日：2006-10-26
申请人： Randy K. Rannow , Zhizhang Chen , James W. Stasiak , Stanley J. Wang
发明人： Randy K. Rannow , Zhizhang Chen , James W. Stasiak , Stanley J. Wang
IPC分类号： G09G3/20
CPC分类号： G03G15/323 , G09G2300/0895
摘要： An imaging apparatus and method include a pixel and a two point switching element.
摘要翻译：成像装置和方法包括像素和两点开关元件。

50. 发明申请

US20070089492A1 Resistivity phase change material 失效
标题翻译：电阻相变材料
公开(公告)号：US20070089492A1
公开(公告)日：2007-04-26
申请号：US11259609
申请日：2005-10-26
申请人： Zhizhang Chen , Qin Liu , Timothy Myers , Chien-Hua Chen
发明人： Zhizhang Chen , Qin Liu , Timothy Myers , Chien-Hua Chen
IPC分类号： G01N11/04
CPC分类号： G02F1/135 , G02F1/1334 , G02F1/1354
摘要： Various devices and methods employing a resistive phase change material are disclosed.
摘要翻译：公开了采用电阻相变材料的各种装置和方法。

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