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41. 发明授权

US09035908B2 Touch panel, display device, and electronic device 有权
标题翻译：触摸面板，显示设备和电子设备
公开(公告)号：US09035908B2
公开(公告)日：2015-05-19
申请号：US12639624
申请日：2009-12-16
申请人： Yoshiyuki Kurokawa
发明人： Yoshiyuki Kurokawa
IPC分类号： G06F3/042 , G02F1/1333 , G06F3/041 , G02F1/133 , G09G3/34
CPC分类号： G06F3/0412 , G02F1/13338 , G02F2001/13312 , G06F3/042 , G09G3/3406 , G09G2310/0235 , G09G2320/0626 , G09G2360/144
摘要： It is an object to provide a touch panel with high precision, high-speed operation, and low power consumption, which is caused by reduction of power consumption in an A/D converter circuit is reduced. In the touch panel in which a photo sensor is included in a pixel and an A/D converter circuit is provided every one column or a plurality of columns of the pixels, a control signal of the A/D converter circuit is sequentially supplied by a shift register included in an ADC (A/D converter circuit) control circuit, and respective periods when the plurality of A/D converter circuits operates are not overlap with each other. Accordingly, the number of A/D converter circuits which operate at the same time is decreased, and instantaneous power consumption in the A/D converter circuit is decreased.
摘要翻译：本发明的目的是提供一种具有高精度，高速运行和低功耗的触摸面板，这是由于减少A / D转换电路中的功耗降低而引起的。在像素中包括光电传感器的触摸面板和每一列或多列像素提供A / D转换器电路的情况下，A / D转换电路的控制信号由包括在ADC（A / D转换器电路）控制电路中的移位寄存器以及多个A / D转换器电路操作的各个周期彼此不重叠。因此，同时工作的A / D转换器电路的数量减少，并且A / D转换器电路中的瞬时功耗降低。

42. 发明授权

US08803164B2 Solid-state image sensing device and semiconductor display device 有权
标题翻译：固态摄像装置及半导体显示装置
公开(公告)号：US08803164B2
公开(公告)日：2014-08-12
申请号：US13193741
申请日：2011-07-29
申请人： Yoshiyuki Kurokawa , Takayuki Ikeda
发明人： Yoshiyuki Kurokawa , Takayuki Ikeda
IPC分类号： H01L27/15
CPC分类号： H01L27/1443 , H01L27/14623 , H01L27/14632 , H01L27/14634 , H01L27/1464 , H01L27/14643 , H01L27/14687 , H01L27/1469
摘要： To provide a solid-state image sensing device or a semiconductor display device, which can easily obtain the positional data of an object without contact. Included are a plurality of first photosensors on which light with a first incident angle is incident from a first incident direction and a plurality of second photosensors on which light with a second incident angle is incident from a second incident direction. The first incident angle of light incident on one of the plurality of first photosensors is larger than that of light incident on one of the other first photosensors. The second incident angle of light incident on one of the plurality of second photosensors is larger than that of light incident on one of the other second photosensors.
摘要翻译：提供可以容易地获得物体的位置数据而不接触的固态图像感测装置或半导体显示装置。包括多个第一光电传感器，其上具有第一入射角的光从第一入射方向入射，以及多个第二光电传感器，其上具有第二入射角的光从第二入射方向入射。入射到多个第一光电传感器之一上的第一入射角大于入射到另一个第一光电传感器之一上的光的入射角。入射到多个第二光电传感器中的一个上的光的第二入射角大于入射在另一个第二光电传感器之一上的光的入射角。

43. 发明授权

US08781433B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08781433B2
公开(公告)日：2014-07-15
申请号：US13368380
申请日：2012-02-08
申请人： Yoshiyuki Kurokawa , Takayuki Ikeda , Masami Endo , Hiroki Dembo , Daisuke Kawae , Takayuki Inoue , Munehiro Kozuma
发明人： Yoshiyuki Kurokawa , Takayuki Ikeda , Masami Endo , Hiroki Dembo , Daisuke Kawae , Takayuki Inoue , Munehiro Kozuma
IPC分类号： H04B1/28
CPC分类号： G06K19/07749 , G06K7/0008 , G06K19/0716 , G06K2017/0045
摘要： A semiconductor device is provided with a power supply circuit having a function to generate a power supply voltage from a wireless signal and an A/D converter circuit having a function to detect the strength of the wireless signal by an A/D conversion of a voltage generated from the wireless signal. This enables to provide a semiconductor device which does not require replacement of batteries, has few limitations on its physical shape and mass, and has a function to detect a physical position. By formation of the semiconductor device with use of a thin film transistor formed over a plastic substrate, a lightweight semiconductor device, which has flexibility in physical shape and a function to detect a physical location, can be provided at low cost.
摘要翻译：半导体器件具有电源电路，该电源电路具有从无线信号产生电源电压的功能，以及具有通过A / D转换电压来检测无线信号的强度的功能的A / D转换电路由无线信号产生。这能够提供不需要更换电池的半导体器件，其物理形状和质量几乎没有限制，并且具有检测物理位置的功能。通过使用形成在塑料基板上的薄膜晶体管形成半导体器件，可以以低成本提供具有物理形状的灵活性和检测物理位置的功能的轻量级的半导体器件。

44. 发明授权

US08625058B2 Photodetector and display device 有权
标题翻译：光电检测器和显示设备
公开(公告)号：US08625058B2
公开(公告)日：2014-01-07
申请号：US12861476
申请日：2010-08-23
申请人： Munehiro Kozuma , Yoshiyuki Kurokawa , Takayuki Ikeda , Hikaru Tamura
发明人： Munehiro Kozuma , Yoshiyuki Kurokawa , Takayuki Ikeda , Hikaru Tamura
IPC分类号： G02F1/1335 , H01L31/0232 , H01L27/14 , H01L21/00
CPC分类号： G01J1/02 , G01J1/0209 , G01J1/0214 , G01J1/04 , G01J1/0411 , G01J1/0488 , G01J3/506 , G01J3/51 , G01J3/513
摘要： The amount of light incident on a photoelectric conversion element is increased while stray light from a backlight below a light-transmitting substrate is prevented from being incident on the photoelectric conversion element. A light-blocking film is formed with a color filter covering a photoelectric conversion element over a light-transmitting substrate and a color filter covering a photoelectric conversion element in an adjacent pixel which overlap each other at the side with respect to the direction in which light travels. In addition, by providing a microlens over the color filter, light which is conventionally not detected is collected to a photoelectric conversion element, and accordingly the amount of light incident on the photoelectric conversion element is increased.
摘要翻译：入射到光电转换元件上的光量增加，防止来自透光性基板下方的背光的杂散光入射到光电转换元件上。遮光膜形成有覆盖光透过基板上的光电转换元件的滤色器和覆盖相邻像素的光电转换元件的滤色器，该相邻像素在相对于光的方向的一侧相互重叠旅行。此外，通过在滤色器上提供微透镜，常规地未检测到的光被收集到光电转换元件，因此入射到光电转换元件上的光量增加。

45. 发明授权

US08510588B2 Clock generation circuit and semiconductor device including the same 有权
标题翻译：时钟生成电路和包括其的半导体器件
公开(公告)号：US08510588B2
公开(公告)日：2013-08-13
申请号：US13353497
申请日：2012-01-19
申请人： Masami Endo , Takayuki Ikeda , Daisuke Kawae , Yoshiyuki Kurokawa
发明人： Masami Endo , Takayuki Ikeda , Daisuke Kawae , Yoshiyuki Kurokawa
IPC分类号： G06F1/04
CPC分类号： H04L7/0331 , H03L7/00
摘要： Objects of the invention are to provide a clock generation circuit and to provide a semiconductor device including the clock generation circuit. The clock generation circuit includes an edge detection circuit, a reference clock generation circuit, a reference clock counter circuit, and a frequency-divider circuit. The reference clock counter circuit is a circuit which outputs a counter value, which is obtained by counting the number of waves of a reference clock signal outputted from the reference clock generation circuit, in a period of time from when the edge detection circuit detects an edge of a signal which is externally inputted to the edge detection circuit to when the edge detection circuit detects the next edge, to the frequency-divider circuit. The frequency-divider circuit is a circuit which frequency-divides the reference clock signal based on the counter value.
摘要翻译：本发明的目的是提供一种时钟发生电路并提供包括时钟发生电路的半导体器件。时钟产生电路包括边缘检测电路，参考时钟产生电路，参考时钟计数器电路和分频器电路。参考时钟计数器电路是在从边缘检测电路检测到边缘的时间段内输出计数值的电路，该计数值是从基准时钟产生电路输出的基准时钟信号的波数来计算的将外部输入到边缘检测电路的信号当边缘检测电路检测到下一个边沿时，分配给分频器电路。分频器电路是基于计数器值对参考时钟信号进行分频的电路。

46. 发明授权

US08429634B2 Semiconductor device, memory circuit, and machine language program generation device, and method for operating semiconductor device and memory circuit 有权
标题翻译：半导体器件，存储器电路和机器语言程序生成装置，以及用于操作半导体器件和存储器电路的方法
公开(公告)号：US08429634B2
公开(公告)日：2013-04-23
申请号：US11878518
申请日：2007-07-25
申请人： Hiroki Dembo , Yoshiyuki Kurokawa , Masami Endo
发明人： Hiroki Dembo , Yoshiyuki Kurokawa , Masami Endo
IPC分类号： G06F9/45
CPC分类号： G06F8/447 , G06F9/4484
摘要： A semiconductor device has an arithmetic processing circuit provided with an arithmetic circuit and a control circuit and a memory circuit provided with a ROM and a RAM, where the arithmetic processing circuit and the memory circuit are connected to each other through an address bus and a data bus, a machine language program executed using the arithmetic processing circuit is stored in the ROM, the RAM has a plurality of banks, processing data obtained by executing the machine language program is divided into a plurality of stacks to be written to the plurality of banks, and the arithmetic processing circuit is operated in accordance with the machine language program so that, in the plurality of stacks stored in the plurality of banks, a stack of which data is not used until the machine language program is terminated is omitted and contiguous stacks are written to the same bank.
摘要翻译：一种半导体器件具有运算电路和控制电路的运算处理电路和具有ROM和RAM的存储电路，其中算术处理电路和存储电路通过地址总线和数据彼此连接总线，使用算术处理电路执行的机器语言程序被存储在ROM中，RAM具有多个存储体，通过执行机器语言程序获得的处理数据被划分为要写入多个存储体的多个堆叠并且算术处理电路根据机器语言程序进行操作，从而在多个存储体中存储的多个堆栈中省略了在机器语言程序终止之前不使用数据的堆栈，并且连续的堆栈被写入同一家银行。

47. 发明授权

US08396425B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08396425B2
公开(公告)日：2013-03-12
申请号：US13267007
申请日：2011-10-06
申请人： Yoshiyuki Kurokawa
发明人： Yoshiyuki Kurokawa
IPC分类号： H04B7/00
CPC分类号： H04B5/0037 , G06F15/7832 , Y02D10/12 , Y02D10/13
摘要： In a multi-core semiconductor device, a data bus between CPUs or the like consumes a larger amount of power. By provision of a plurality of CPUs which transmit data by a backscattering method of a wireless signal, a router circuit which mediates data transmission and reception between the CPUs or the like, and a thread control circuit which has a thread scheduling function, a semiconductor device which consumes less power and has high arithmetic performance can be provided at low cost.
摘要翻译：在多核半导体器件中，CPU等之间的数据总线消耗更大的功率。通过提供通过无线信号的后向散射方法发送数据的多个CPU，介导CPU等之间的数据发送和接收的路由器电路以及具有线程调度功能的线程控制电路，半导体器件可以以低成本提供消耗较少功率并且具有高算术性能的功能。

48. 发明授权

US08374303B2 Clock synchronization circuit and semiconductor device provided therewith 有权
标题翻译：时钟同步电路和提供的半导体器件
公开(公告)号：US08374303B2
公开(公告)日：2013-02-12
申请号：US11820245
申请日：2007-06-19
申请人： Masami Endo , Daisuke Kawae , Yoshiyuki Kurokawa , Takayuki Ikeda
发明人： Masami Endo , Daisuke Kawae , Yoshiyuki Kurokawa , Takayuki Ikeda
IPC分类号： H04L7/00
CPC分类号： H04L7/0331
摘要： An object is to provide a clock synchronization circuit capable of stable communication even in the case where different clock signals are used in a plurality of circuits, and a semiconductor device provided therewith. Circuit for detecting a change point of received data, and outputting a reset signal; reference clock generating means for generating a clock signal; and circuit for counting the clock signals outputted from the reference clock generation means, and resetting a counter value obtained by counting the clock signals in the case where the reset signal is inputted are provided.
摘要翻译：目的在于提供即使在多个电路中使用不同的时钟信号的情况下也能够稳定通信的时钟同步电路以及与其配合的半导体装置。用于检测接收数据的变化点并输出复位信号的电路; 用于产生时钟信号的参考时钟产生装置; 以及用于对从基准时钟产生装置输出的时钟信号进行计数的电路，以及在输入复位信号的情况下复位通过对时钟信号进行计数而获得的计数器值。

49. 发明申请

US20120250407A1 MEMORY CIRCUIT, MEMORY UNIT, AND SIGNAL PROCESSING CIRCUIT 有权
标题翻译：存储器电路，存储器和信号处理电路
公开(公告)号：US20120250407A1
公开(公告)日：2012-10-04
申请号：US13429574
申请日：2012-03-26
申请人： Yoshiyuki Kurokawa
发明人： Yoshiyuki Kurokawa
IPC分类号： G11C11/40
CPC分类号： G11C7/1006 , G11C16/045 , H01L27/06 , H01L27/0688 , H01L27/1225
摘要： A memory circuit includes a transistor having a channel in an oxide semiconductor layer, a capacitor, a first arithmetic circuit, a second arithmetic circuit, a third arithmetic circuit, and a switch. An output terminal of the first arithmetic circuit is electrically connected to an input terminal of the second arithmetic circuit. The input terminal of the second arithmetic circuit is electrically connected to an output terminal of the third arithmetic circuit via the switch. An output terminal of the second arithmetic circuit is electrically connected to an input terminal of the first arithmetic circuit. An input terminal of the first arithmetic circuit is electrically connected to one of a source and a drain of the transistor. The other of the source and the drain of the transistor is electrically connected to one of a pair of electrodes of the capacitor and to an input terminal of the third arithmetic circuit.
摘要翻译：存储电路包括具有氧化物半导体层中的沟道的晶体管，电容器，第一运算电路，第二运算电路，第三运算电路和开关。第一运算电路的输出端电连接到第二运算电路的输入端。第二运算电路的输入端经由开关电连接到第三运算电路的输出端子。第二运算电路的输出端电连接到第一运算电路的输入端。第一运算电路的输入端子电连接到晶体管的源极和漏极之一。晶体管的源极和漏极中的另一个电连接到电容器的一对电极和第三运算电路的输入端子之一。

50. 发明申请

US20120229166A1 Semiconductor Device and a Display Device 有权
标题翻译：半导体器件和显示器件
公开(公告)号：US20120229166A1
公开(公告)日：2012-09-13
申请号：US13429595
申请日：2012-03-26
申请人： Yoshiyuki Kurokawa
发明人： Yoshiyuki Kurokawa
IPC分类号： H03K19/0948 , H03K19/094
CPC分类号： H03K19/20 , G06F17/5045 , H01L27/127 , H01L29/78621
摘要： A standard cell used for the logic synthesis and the routing of layout is configured by a logic circuit on an output side and a logic circuit on an input side, and a driving capacity of the logic circuit on the output side is made large while gate input capacitance of the logic circuit on the input side is made small.
摘要翻译：用于逻辑合成和布局布线的标准单元由输出侧的逻辑电路和输入侧的逻辑电路构成，并且输出侧的逻辑电路的驱动电容大，而栅极输入输入侧的逻辑电路的电容变小。

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