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41. 发明申请

US20120319100A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120319100A1
公开(公告)日：2012-12-20
申请号：US13483078
申请日：2012-05-30
申请人： Kyoko YOSHIOKA , Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Shinya SASAGAWA
发明人： Kyoko YOSHIOKA , Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Shinya SASAGAWA
IPC分类号： H01L29/786 , H01L21/44
CPC分类号： H01L29/7869 , H01L21/324 , H01L29/66969
摘要： A miniaturized semiconductor device in which an increase in power consumption is suppressed and a method for manufacturing the semiconductor device are provided. A highly reliable semiconductor device having stable electric characteristics and a method for manufacturing the semiconductor device are provided. An oxide semiconductor film is irradiated with ions accelerated by an electric field in order to reduce the average surface roughness of a surface of the oxide semiconductor film. Consequently, an increase in the leakage current and power consumption of a transistor can be suppressed. Moreover, by performing heat treatment so that the oxide semiconductor film includes a crystal having a c-axis substantially perpendicular to the surface of the oxide semiconductor film, a change in electric characteristics of the oxide semiconductor film due to irradiation with visible light or ultraviolet light can be suppressed.
摘要翻译：提供抑制功耗增加的小型化半导体装置及其制造方法。提供了一种具有稳定电特性的高度可靠的半导体器件及其半导体器件的制造方法。为了降低氧化物半导体膜的表面的平均表面粗糙度，用电场加速的离子照射氧化物半导体膜。因此，可以抑制晶体管的漏电流和功耗的增加。此外，通过进行热处理使得氧化物半导体膜包括具有与氧化物半导体膜的表面基本垂直的c轴的晶体，由于可见光或紫外线的照射而导致的氧化物半导体膜的电特性的变化可以抑制。

42. 发明申请

US20120228606A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120228606A1
公开(公告)日：2012-09-13
申请号：US13413714
申请日：2012-03-07
申请人： Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Masahiro TAKAHASHI , Hideyuki KISHIDA
发明人： Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Masahiro TAKAHASHI , Hideyuki KISHIDA
IPC分类号： H01L29/78 , H01L21/44
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/045 , H01L29/66969 , H01L29/78693 , H01L29/78696
摘要： The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.
摘要翻译：半导体器件包括具有第一区域和一对第二区域的氧化物半导体膜，第一区域和第二区域彼此面对，其间设置有第一区域，氧化物半导体膜上的栅极绝缘膜和与第一区域重叠的第一电极，栅极绝缘膜。第一区域是包括c轴取向晶体部分的非单晶氧化物半导体区域。所述一对第二区域是含有掺杂剂且包含多个晶体部分的氧化物半导体区域。

43. 发明申请

US20120225543A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20120225543A1
公开(公告)日：2012-09-06
申请号：US13402940
申请日：2012-02-23
申请人： Shinji OHNO , Yuichi SATO , Junichi KOEZUKA
发明人： Shinji OHNO , Yuichi SATO , Junichi KOEZUKA
IPC分类号： H01L21/20
CPC分类号： H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/7869
摘要： A method for manufacturing a highly reliable semiconductor device with less change in threshold voltage is provided. An insulating film from which oxygen can be released by heating is formed in contact with an oxide semiconductor layer, and light irradiation treatment is performed on a gate electrode or a metal layer formed in a region which overlaps with the gate electrode, so that oxygen is added into the oxide semiconductor layer in a region which overlaps with the gate electrode. Accordingly, oxygen vacancies or interface states in the oxide semiconductor layer in a region which overlaps with the gate electrode can be reduced.
摘要翻译：提供了一种用于制造具有较小阈值电压变化的高可靠性半导体器件的方法。与氧化物半导体层接触形成可以通过加热而释放氧的绝缘膜，并且在与栅电极重叠的区域中形成的栅电极或金属层上进行光照射处理，使得氧为在与栅电极重叠的区域中添加到氧化物半导体层中。因此，可以减少与栅电极重叠的区域中的氧化物半导体层中的氧空位或界面态。

44. 发明申请

US20120184085A1 METHOD FOR MANUFACTURING SOI SUBSTRATE 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US20120184085A1
公开(公告)日：2012-07-19
申请号：US13346930
申请日：2012-01-10
申请人： Junichi KOEZUKA
发明人： Junichi KOEZUKA
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： To suppress desorption of hydrogen ions with which a single crystal semiconductor substrate is irradiated. A method for manufacturing an SOI substrate includes the following steps: irradiating a semiconductor substrate with carbon ions; irradiating the semiconductor substrate with a hydrogen ion after the irradiation with the carbon ion so as to form an embrittled region in the semiconductor substrate; disposing a surface of the semiconductor substrate and a surface of a base substrate to face each other and to be in contact with each other so that the semiconductor substrate and the base substrate are bonded; and heating the semiconductor substrate and the base substrate which are bonded to each other and separating the semiconductor substrate along the embrittled region so that a semiconductor layer is formed over the base substrate.
摘要翻译：为了抑制照射单晶半导体衬底的氢离子的解吸附。 SOI衬底的制造方法包括以下步骤：用碳离子照射半导体衬底; 在用碳离子照射之后用氢离子照射半导体衬底，以在半导体衬底中形成脆化区域; 将半导体衬底的表面和基底表面彼此面对并相互接触，使得半导体衬底和基底衬底接合; 并且加热彼此接合的半导体衬底和基底衬底，并沿着脆化区域分离半导体衬底，使得在基底衬底上形成半导体层。

45. 发明申请

US20110183494A1 METHOD FOR MANUFACTURING SOI SUBSTRATE 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US20110183494A1
公开(公告)日：2011-07-28
申请号：US13011136
申请日：2011-01-21
申请人： Junichi KOEZUKA , Hideto OHNUMA
发明人： Junichi KOEZUKA , Hideto OHNUMA
IPC分类号： H01L21/762
CPC分类号： H01L21/76254 , H01L21/84
摘要： Manufacturing cost of an SOI substrate is reduced. Yield of an SOI substrate is improved. A method for manufacturing an SOI substrate includes the steps of irradiating a single crystal semiconductor substrate with ions to form an embrittled region in the single crystal semiconductor substrate, bonding the single crystal semiconductor substrate to a base substrate with an insulating film therebetween, and separating the single crystal semiconductor substrate and the base substrate at the embrittled region to form a semiconductor layer over the base substrate with the insulating film therebetween. In the step of forming the embrittled region, ion species which are not mass-separated are used as the ions and a temperature of the single crystal semiconductor substrate is set to 250° C. or higher at the time of irradiation with the ions.
摘要翻译： SOI衬底的制造成本降低。改善了SOI衬底的产量。一种SOI衬底的制造方法包括以下步骤：在单晶半导体衬底中照射单晶半导体衬底以形成脆化区域，将单晶半导体衬底与绝缘膜之间的绝缘膜接合，单晶半导体衬底和基底衬底处于脆化区，以在基底衬底上形成半导体层，其间具有绝缘膜。在形成脆化区域的步骤中，使用未质量分离的离子种类作为离子，并且在照射离子时将单晶半导体基板的温度设定为250℃以上。

46. 发明申请

US20110111554A1 MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING MEMORY DEVICE 有权
标题翻译：存储器件，半导体器件和用于制造存储器件的方法
公开(公告)号：US20110111554A1
公开(公告)日：2011-05-12
申请号：US13008148
申请日：2011-01-18
申请人： Hisao IKEDA , Takahiro IBE , Junichi KOEZUKA , Kaoru KATO
发明人： Hisao IKEDA , Takahiro IBE , Junichi KOEZUKA , Kaoru KATO
IPC分类号： H01L51/40
CPC分类号： H01L27/286 , H01L27/112 , H01L27/115 , Y10S428/917 , Y10T428/24942
摘要： Objects are to solve inhibition of miniaturization of a memory element and complexity of a manufacturing process thereof, and to provide a nonvolatile memory device and a semiconductor device each having the memory device, in which data can be additionally written except at the time of manufacture and in which forgery or the like caused by rewriting of data can be prevented, and a memory device and a semiconductor device that are inexpensive and nonvolatile. The present invention provides a semiconductor device that includes a plurality of memory elements, in each of which a first conductive layer, a second conductive layer disposed beside the first conductive layer, and a mixed film that are disposed over the same insulating film. The mixed film contains an inorganic compound, an organic compound, and a halogen atom and is disposed between the first conductive layer and the second conductive layer.
摘要翻译：目的是解决对存储元件的小型化的抑制和其制造过程的复杂性，并且提供一种非易失性存储器件和半导体器件，每个非易失性存储器件和半导体器件具有存储器件，除了制造之外，可以另外写入数据，其中可以防止由重写数据引起的伪造等，以及便宜且不挥发的存储器件和半导体器件。本发明提供了一种半导体器件，其包括多个存储元件，每个存储元件分别具有第一导电层，位于第一导电层旁边的第二导电层和设置在同一绝缘膜上的混合膜。混合膜包含无机化合物，有机化合物和卤素原子，并且设置在第一导电层和第二导电层之间。

47. 发明申请

US20100252827A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100252827A1
公开(公告)日：2010-10-07
申请号：US12748520
申请日：2010-03-29
申请人： Yuji ASANO , Junichi KOEZUKA
发明人： Yuji ASANO , Junichi KOEZUKA
IPC分类号： H01L29/786 , H01L21/34
CPC分类号： H01L29/7869 , C04B35/58 , C04B2235/3284 , C04B2235/3286 , H01L27/1225 , H01L29/66969 , H01L29/78618
摘要： An object is to provide a thin film transistor including an oxide semiconductor layer, in which the contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and whose electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. The thin film transistor including an oxide semiconductor layer is formed in such a manner that buffer layers whose conductivity is higher than that of the oxide semiconductor layer are formed and the oxide semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layers. In addition, the buffer layers whose conductivity is higher than that of the oxide semiconductor layer are subjected to reverse sputtering treatment and heat treatment in a nitrogen atmosphere.
摘要翻译：目的是提供一种薄膜晶体管，其包括氧化物半导体层，其中氧化物半导体层与源极和漏极电极层之间的接触电阻降低并且其电特性稳定。另一个目的是提供制造薄膜晶体管的方法。包括氧化物半导体层的薄膜晶体管形成为形成电导率高于氧化物半导体层的缓冲层的方式，并且氧化物半导体层和源极和漏极电极层通过缓冲层。此外，在氮气气氛中对导电率高于氧化物半导体层的缓冲层进行反溅射处理和热处理。

48. 发明申请

US20100163874A1 DRIVER CIRCUIT AND SEMICONDUCTOR DEVICE 有权
标题翻译：驱动电路和半导体器件
公开(公告)号：US20100163874A1
公开(公告)日：2010-07-01
申请号：US12641446
申请日：2009-12-18
申请人： Jun KOYAMA , Junichiro SAKATA , Tetsunori MARUYAMA , Yuki IMOTO , Yuji ASANO , Junichi KOEZUKA
发明人： Jun KOYAMA , Junichiro SAKATA , Tetsunori MARUYAMA , Yuki IMOTO , Yuji ASANO , Junichi KOEZUKA
IPC分类号： H01L27/06
CPC分类号： H01L27/1255 , H01L27/12 , H01L27/1225 , H01L27/127 , H01L28/20 , H01L29/24 , H01L29/78606 , H01L29/7869
摘要： The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.
摘要翻译：通过使用含有氢化合物如硅烷（SiH 4）和氨（NH 3）的气体的等离子体CVD形成的氮化硅层910设置在与用于电阻器354的氧化物半导体层905上并直接接触，并且氮化硅在用于薄膜晶体管355的氧化物半导体层906上设置层910，氧化硅层909用作阻挡层。因此，与氧化物半导体层906相比，在氧化物半导体层905中引入更高浓度的氢。结果，使用于电阻器354的氧化物半导体层905的电阻比氧化物半导体层的电阻低 906用于薄膜晶体管355。

49. 发明申请

US20120280234A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20120280234A1
公开(公告)日：2012-11-08
申请号：US13448611
申请日：2012-04-17
申请人： Junichi KOEZUKA , Naoto YAMADE , Kyoko YOSHIOKA , Yuhei SATO , Mari TERASHIMA
发明人： Junichi KOEZUKA , Naoto YAMADE , Kyoko YOSHIOKA , Yuhei SATO , Mari TERASHIMA
IPC分类号： H01L29/786 , H01L21/20 , H01L21/336
CPC分类号： H01L29/66969 , H01L21/02667 , H01L29/78606 , H01L29/78693
摘要： A highly reliable semiconductor device which is formed using an oxide semiconductor and has stable electric characteristics is provided. A semiconductor device which includes an amorphous oxide semiconductor layer including a region containing oxygen in a proportion higher than that in the stoichiometric composition, and an aluminum oxide film provided over the amorphous oxide semiconductor layer is provided. The amorphous oxide semiconductor layer is formed as follows: oxygen implantation treatment is performed on a crystalline or amorphous oxide semiconductor layer which has been subjected to dehydration or dehydrogenation treatment, and then thermal treatment is performed on the oxide semiconductor layer provided with an aluminum oxide film at a temperature lower than or equal to 450° C.
摘要翻译：提供了使用氧化物半导体形成且具有稳定的电特性的高度可靠的半导体器件。提供一种半导体器件，其包括非晶氧化物半导体层，所述非晶氧化物半导体层包括含有比所述化学计量组成中高的比例的氧的区域，以及设置在所述非晶氧化物半导体层上的氧化铝膜。无定形氧化物半导体层如下形成：对已进行脱水或脱氢处理的结晶或非晶氧化物半导体层进行氧注入处理，然后对设置有氧化铝膜的氧化物半导体层进行热处理在低于或等于450℃的温度下

50. 发明申请

US20120187395A1 OXIDE SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE 有权
标题翻译：氧化物半导体元件和半导体器件
公开(公告)号：US20120187395A1
公开(公告)日：2012-07-26
申请号：US13353597
申请日：2012-01-19
申请人： Junichi KOEZUKA
发明人： Junichi KOEZUKA
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L29/66742 , H01L29/66969 , H01L29/78693 , H01L29/78696
摘要： A semiconductor element having high mobility, which includes an oxide semiconductor layer having crystallinity, is provided. The oxide semiconductor layer includes a stacked-layer structure of a first oxide semiconductor film and a second oxide semiconductor film having a wider band gap than the first oxide semiconductor film, which is in contact with the first oxide semiconductor film. Thus, a channel region is formed in part of the first oxide semiconductor film (that is, in an oxide semiconductor film having a smaller band gap) which is in the vicinity of an interface with the second oxide semiconductor film. Further, dangling bonds in the first oxide semiconductor film and the second oxide semiconductor film are bonded to each other at the interface therebetween. Accordingly, a decrease in mobility resulting from an electron trap or the like due to dangling bonds can be reduced in the channel region.
摘要翻译：提供了具有高迁移率的半导体元件，其包括具有结晶性的氧化物半导体层。氧化物半导体层包括与第一氧化物半导体膜接触的具有比第一氧化物半导体膜更宽的带隙的第一氧化物半导体膜和第二氧化物半导体膜的层叠结构。因此，在与第二氧化物半导体膜的界面附近的第一氧化物半导体膜（即具有较小带隙的氧化物半导体膜）的一部分中形成沟道区。此外，第一氧化物半导体膜和第二氧化物半导体膜中的悬挂键在它们之间的界面处彼此结合。因此，在通道区域中可以减少由于悬挂键导致的电子阱等导致的迁移率的降低。

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