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41. 发明授权

US07541656B2 Semiconductor devices with enlarged recessed gate electrodes 有权
标题翻译：半导体器件具有放大的凹陷栅电极
公开(公告)号：US07541656B2
公开(公告)日：2009-06-02
申请号：US11556352
申请日：2006-11-03
申请人： Seong-Ho Kim , Chang-Sub Lee , Jeong-Dong Choe , Sung-Min Kim , Shin-Ae Lee , Dong-Gun Park
发明人： Seong-Ho Kim , Chang-Sub Lee , Jeong-Dong Choe , Sung-Min Kim , Shin-Ae Lee , Dong-Gun Park
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/4983 , H01L21/28114 , H01L29/42376 , H01L29/665 , H01L29/66553 , H01L29/6656 , H01L29/6659 , H01L29/66621 , H01L29/7833 , H01L29/7834
摘要： A semiconductor device includes a semiconductor substrate having a recess therein. A gate insulator is disposed on the substrate in the recess. The device further includes a gate electrode including a first portion on the gate insulator in the recess and a second reduced-width portion extending from the first portion. A source/drain region is disposed in the substrate adjacent the recess. The recess may have a curved shape, e.g., may have hemispherical or ellipsoid shape. The source/drain region may include a lighter-doped portion adjoining the recess. Relate fabrication methods are also discussed.
摘要翻译：半导体器件包括其中具有凹部的半导体衬底。栅极绝缘体设置在凹部中的基板上。该器件还包括栅电极，其包括位于凹槽中的栅极绝缘体上的第一部分和从第一部分延伸的第二缩小宽度部分。源极/漏极区域设置在邻近凹部的衬底中。凹部可以具有弯曲的形状，例如可以具有半球形或椭球形。源极/漏极区域可以包括邻近凹部的较轻掺杂部分。还讨论了相关制造方法。

42. 发明申请

US20070057288A1 Methods of Fabricating Semiconductor Devices with Enlarged Recessed Gate Electrodes 有权
标题翻译：制造具有放大栅极电极的半导体器件的方法
公开(公告)号：US20070057288A1
公开(公告)日：2007-03-15
申请号：US11556352
申请日：2006-11-03
申请人： Seong-Ho Kim , Chang-Sub Lee , Jeong-Dong Choe , Sung-Min Kim , Shin-Ae Lee , Dong-Gun Park
发明人： Seong-Ho Kim , Chang-Sub Lee , Jeong-Dong Choe , Sung-Min Kim , Shin-Ae Lee , Dong-Gun Park
IPC分类号： H01L31/00
CPC分类号： H01L29/4983 , H01L21/28114 , H01L29/42376 , H01L29/665 , H01L29/66553 , H01L29/6656 , H01L29/6659 , H01L29/66621 , H01L29/7833 , H01L29/7834
摘要： A semiconductor device includes a semiconductor substrate having a recess therein. A gate insulator is disposed on the substrate in the recess. The device further includes a gate electrode including a first portion on the gate insulator in the recess and a second reduced-width portion extending from the first portion. A source/drain region is disposed in the substrate adjacent the recess. The recess may have a curved shape, e.g., may have hemispherical or ellipsoid shape. The source/drain region may include a lighter-doped portion adjoining the recess. Relate fabrication methods are also discussed.
摘要翻译：半导体器件包括其中具有凹部的半导体衬底。栅极绝缘体设置在凹部中的基板上。该器件还包括栅电极，其包括位于凹槽中的栅极绝缘体上的第一部分和从第一部分延伸的第二缩小宽度部分。源极/漏极区域设置在邻近凹部的衬底中。凹部可以具有弯曲的形状，例如可以具有半球形或椭球形。源极/漏极区域可以包括邻近凹部的较轻掺杂部分。还讨论了相关制造方法。

43. 发明申请

US20060192255A1 Self-aligned semiconductor contact structures and methods for fabricating the same 失效
公开(公告)号：US20060192255A1
公开(公告)日：2006-08-31
申请号：US11396819
申请日：2006-04-03
申请人： Seong-Ho Kim , Dong-Gun Park , Chang-Sub Lee , Jeong-Dong Choe , Sung-Min Kim , Shin-Ae Lee
发明人： Seong-Ho Kim , Dong-Gun Park , Chang-Sub Lee , Jeong-Dong Choe , Sung-Min Kim , Shin-Ae Lee
IPC分类号： H01L29/76
CPC分类号： H01L21/76831 , H01L21/28114 , H01L21/76897 , H01L21/823425 , H01L21/823475 , H01L27/10888 , H01L27/10894 , H01L29/42376 , H01L2924/0002 , H01L2924/00
摘要： A self-aligned contact structure and a method of forming the same include selected neighboring gate electrodes with adjacent sidewalls that are configured to angle toward each other. The angled surfaces of the gate electrodes can be protected using a liner layer that can extend the length of the contact window to define the sidewalls of the contact window.

44. 发明授权

US07026688B2 Field effect transistors having multiple stacked channels 有权
公开(公告)号：US07026688B2
公开(公告)日：2006-04-11
申请号：US11119786
申请日：2005-05-02
申请人： Sung-Min Kim , Dong-Gun Park , Chang-Sub Lee , Jeong-Dong Choe , Shin-Ae Lee , Seong-Ho Kim
发明人： Sung-Min Kim , Dong-Gun Park , Chang-Sub Lee , Jeong-Dong Choe , Shin-Ae Lee , Seong-Ho Kim
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L29/785 , H01L21/823412 , H01L29/42356 , H01L29/42384 , H01L29/42392 , H01L29/66477 , H01L29/66545 , H01L29/66636 , H01L29/66772 , H01L29/66787 , H01L29/78 , H01L29/78642 , H01L29/78654 , H01L29/78696
摘要： Integrated circuit field effect transistor devices include a substrate having a surface and an active channel pattern on the surface. The active channel pattern includes channels that are stacked upon one another and are spaced apart from one another to define at least one tunnel between adjacent channels. A gate electrode surrounds the channels and extends through the at least one tunnel. A pair of source/drain regions also is provided. Integrated circuit field effect transistors are manufactured, by forming a pre-active pattern on a surface of a substrate. The pre-active pattern includes a series of interchannel layers and channel layers stacked alternately upon each other. Source/drain regions are formed on the substrate at opposite ends of the pre-active pattern. The interchannel layers are selectively removed to form tunnels. A gate electrode is formed in the tunnels and surrounding the channels.

45. 发明申请

US20050189583A1 Field effect transistors having multiple stacked channels 有权
标题翻译：具有多个堆叠通道的场效应晶体管
公开(公告)号：US20050189583A1
公开(公告)日：2005-09-01
申请号：US11119786
申请日：2005-05-02
申请人： Sung-Min Kim , Dong-Gun Park , Chang-Sub Lee , Jeong-Dong Choe , Shin-Ae Lee , Seong-Ho Kim
发明人： Sung-Min Kim , Dong-Gun Park , Chang-Sub Lee , Jeong-Dong Choe , Shin-Ae Lee , Seong-Ho Kim
IPC分类号： H01L21/336 , H01L21/8234 , H01L29/423 , H01L29/78 , H01L29/786 , H01L29/76
CPC分类号： H01L29/785 , H01L21/823412 , H01L29/42356 , H01L29/42384 , H01L29/42392 , H01L29/66477 , H01L29/66545 , H01L29/66636 , H01L29/66772 , H01L29/66787 , H01L29/78 , H01L29/78642 , H01L29/78654 , H01L29/78696
摘要： Integrated circuit field effect transistor devices include a substrate having a surface and an active channel pattern on the surface. The active channel pattern includes channels that are stacked upon one another and are spaced apart from one another to define at least one tunnel between adjacent channels. A gate electrode surrounds the channels and extends through the at least one tunnel. A pair of source/drain regions also is provided. Integrated circuit field effect transistors are manufactured, by forming a pre-active pattern on a surface of a substrate. The pre-active pattern includes a series of interchannel layers and channel layers stacked alternately upon each other. Source/drain regions are formed on the substrate at opposite ends of the pre-active pattern. The interchannel layers are selectively removed to form tunnels. A gate electrode is formed in the tunnels and surrounding the channels.
摘要翻译：集成电路场效应晶体管器件包括在表面上具有表面和有源沟道图案的衬底。活动通道图案包括彼此堆叠并且彼此间隔开以限定相邻通道之间的至少一个通道的通道。栅电极围绕通道并延伸穿过至少一个通道。还提供了一对源极/漏极区域。通过在衬底的表面上形成预活性图案来制造集成电路场效应晶体管。预激活图案包括彼此交替堆叠的一系列通道间层和通道层。源极/漏极区域在预活化图案的相对端处在衬底上形成。选择性地去除通道间层以形成隧道。在隧道中形成栅电极并围绕通道。

46. 发明授权

US5512992A Apparatus and method for controlling fusing temperature 失效
标题翻译：熔接温度控制装置及方法
公开(公告)号：US5512992A
公开(公告)日：1996-04-30
申请号：US252003
申请日：1994-05-31
申请人： Seong-Ho Kim , Joong-Ki Kwon
发明人： Seong-Ho Kim , Joong-Ki Kwon
IPC分类号： G03G15/20
CPC分类号： G03G15/2003
摘要： An apparatus for controlling a fusing temperature in a system using an electrophotographic developing process by sensing the thickness of the paper. An apparatus for controlling a fusing temperature in a system using an electrophotographic developing process having a fusing lamp for generating heat to execute a fusing operation, a fusing temperature detecting device for generating a detection value according to the change of the fusing temperature of a heat roller, a sensing device for discriminating the kind of the paper according to the detection of the thickness of a conveyed paper, a controller for comparing a value set according to the kind of the paper discriminated from the sensing device with the detection value detected by the fusing temperature detecting device to thereby generate a control signal controlling driving of the fusing lamp to control the fusing temperature, and device for driving the fusing lamp in response to the control signal.
摘要翻译：一种用于通过感测纸的厚度来使用电子照相显影处理来控制系统中的定影温度的装置。一种使用电子照相显影工艺控制定影温度的装置，该电子照相显影工艺具有用于产生热量的定影灯以进行定影操作;定影温度检测装置，用于根据加热辊的定影温度的变化产生检测值用于根据所传送的纸的厚度的检测来识别纸张的类型的感测装置，用于将根据从感测装置识别的纸张的种类设定的值与由熔断器检测到的检测值进行比较的控制器从而产生控制定影灯的驱动以控制定影温度的控制信号，以及响应于控制信号驱动定影灯的装置。

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