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41. 发明授权

US07264041B2 Compliant thermal interface structure with vapor chamber 失效
标题翻译：符合蒸汽室的热界面结构
公开(公告)号：US07264041B2
公开(公告)日：2007-09-04
申请号：US11151831
申请日：2005-06-14
申请人： John P. Karidis , Mark Schultz , Bucknell C. Webb
发明人： John P. Karidis , Mark Schultz , Bucknell C. Webb
IPC分类号： F28D15/02
CPC分类号： H01L23/427 , H01L23/433 , H01L2924/0002 , H01L2924/00
摘要： A structure for cooling an electronic device is disclosed. The structure includes a top layer disposed over the electronic device. The structure further includes a plurality of spring elements disposed between the top layer and the electronic device, wherein at least one spring element comprises a spring portion, provides a heat path from the electronic device and provides mechanical compliance. The structure further includes a seal for containing a space between the top layer and the electronic device, wherein the space contained includes the plurality of spring elements, and a liquid with vaporizing capability disposed with the space contained.
摘要翻译：公开了一种用于冷却电子设备的结构。该结构包括设置在电子设备上的顶层。该结构还包括设置在顶层和电子设备之间的多个弹簧元件，其中至少一个弹簧元件包括弹簧部分，提供来自电子设备的热路径并提供机械顺应性。该结构还包括用于在顶层和电子设备之间容纳空间的密封件，其中容纳的空间包括多个弹簧元件，以及具有包含空间的蒸发能力的液体。

42. 发明授权

US07136243B2 Method and apparatus for correcting for systematic errors in timing pattern generation 失效
标题翻译：用于校正定时模式生成中的系统误差的方法和装置
公开(公告)号：US07136243B2
公开(公告)日：2006-11-14
申请号：US11015130
申请日：2004-12-17
申请人： Timothy J. Chainer , Anthony P. Praino , Mark D. Schultz , Bucknell C. Webb , Edward J. Yarmchuk
发明人： Timothy J. Chainer , Anthony P. Praino , Mark D. Schultz , Bucknell C. Webb , Edward J. Yarmchuk
IPC分类号： G11B5/09 , G11B21/02
CPC分类号： G11B5/59633 , G11B5/5565 , G11B21/106
摘要： Improvements in placement of timing patterns in self-servowriting include correcting for systematic errors due to geometric effects. A correction is made for varying systematic errors, such as when the recording head has spatially separate read and write elements. Further, servopattern rotation due to residual or unmeasured systematic errors is reduced by using a once per revolution clock index derived from the motor drive current waveform or any other sensor. In one aspect of correcting for systematic errors in the writing of timing patterns on a storage medium of a storage device, a time interval between a trigger pattern written at a first radial position of the storage medium and a rotational index is measured. The rotational index is related to the rotational orientation of the storage medium with respect to a fixed frame of the storage device. The location of another trigger pattern to be written is shifted, using the measured time interval to determine the shift in location for the another trigger pattern.
摘要翻译：自我维护中定时模式布局的改进包括纠正由于几何效应引起的系统误差。对变化的系统误差进行校正，例如当记录头具有空间上分离的读和写元件时。此外，通过使用从电动机驱动电流波形或任何其他传感器导出的每转一次的时钟指数来减少由于残余或未测量的系统误差引起的伺服模式旋转。在对存储装置的存储介质上的定时模式的写入进行校正系统错误的一个方面，测量在存储介质的第一径向位置上写入的触发模式与旋转指标之间的时间间隔。旋转指数与存储介质相对于存储装置的固定框架的旋转取向有关。使用测量的时间间隔来移动要写入的另一个触发模式的位置，以确定另一个触发模式的位置偏移。

43. 发明授权

US06735031B2 Method for storage of self-servowriting timing information 失效
标题翻译：存储自伺服定时信息的方法
公开(公告)号：US06735031B2
公开(公告)日：2004-05-11
申请号：US09774914
申请日：2001-01-31
申请人： Timothy J. Chainer , Mark D. Schultz , Bucknell C. Webb , Edward J. Yarmchuk
发明人： Timothy J. Chainer , Mark D. Schultz , Bucknell C. Webb , Edward J. Yarmchuk
IPC分类号： G11B502
CPC分类号： G11B5/59633 , G11B5/012
摘要： A method for writing timing marks on a rotatable storage medium, such as on a disk in a disk drive, includes the steps of: 1) during a rotation of the disk, detecting the passage of at least a portion of a first timing mark located at a first radius of the disk, and 2) writing a second timing mark at a second radius of the disk, the location of the second timing mark being based at least in part on a stored calculation of a delay from the time of passage of the first timing mark during a rotation of the rotatable storage medium. The location of the second timing mark is calculated based on alternative time intervals between detected timing marks and on various functions of the time intervals.
摘要翻译：在诸如盘驱动器中的盘上的可旋转存储介质上写入定时标记的方法包括以下步骤：1）在盘的旋转期间，检测位于第一定时标记的至少一部分的通过在所述盘的第一半径处，以及2）在所述盘的第二半径处写入第二定时标记，所述第二定时标记的位置至少部分地基于存储的从所述盘的通过时间开始的延迟的计算在可旋转存储介质旋转期间的第一定时标记。基于检测到的定时标记之间的替代时间间隔和时间间隔的各种功能来计算第二定时标记的位置。

44. 发明授权

US5901003A Method and apparatus for determining systematic errors 失效
标题翻译：用于确定系统误差的方法和装置
公开(公告)号：US5901003A
公开(公告)日：1999-05-04
申请号：US628910
申请日：1996-04-08
申请人： Timothy Joseph Chainer , Anthony Paul Praino , Mark Delorman Schultz , Bucknell C. Webb , Edward John Yarmchuk
发明人： Timothy Joseph Chainer , Anthony Paul Praino , Mark Delorman Schultz , Bucknell C. Webb , Edward John Yarmchuk
IPC分类号： G11B5/55 , G11B5/596 , G11B19/04 , G11B21/10 , G11B5/09
CPC分类号： G11B19/04 , G11B21/106 , G11B5/5565 , G11B5/59633
摘要： Improvements in placement of timing patterns in self servo writing include correcting for random and systematic errors due to geometric effects. In a disk drive having a recording head with separate read and write elements, a method for determining separation between the elements and for correcting for such errors as a function of skew angle between the head and the disk. Errors resulting from misalignment and non-parallelism of the elements as well as misalignment of the head on it its actuator are also detected and corrected. Errors due to changes in rotational velocity of the disk and misplacement of timing patterns with respect to adjacent timing patterns are detected and corrected. In general, a single revolution process may be used to both write and detect random errors on each track and corrected on subsequent tracks.
摘要翻译：自动写入中定时模式布置的改进包括纠正由于几何效应引起的随机和系统误差。在具有具有分离的读取和写入元件的记录头的磁盘驱动器中，确定元件之间的间隔并用于校正这种错误的方法，其作为头部和盘之间的歪斜角的函数。元件的不对准和不平行度导致的误差以及头部在其致动器上的未对准性也被检测和校正。检测并纠正由于盘的旋转速度的变化引起的错误和定时图案相对于相邻的定时图案的错位。通常，可以使用单次旋转处理来写入和检测每个轨道上的随机误差并在随后的轨道上进行校正。

45. 发明授权

US5612833A Radial self-propagation pattern generation for disk file servowriting 失效
标题翻译：用于磁盘文件伺服驱动的径向自传模式生成
公开(公告)号：US5612833A
公开(公告)日：1997-03-18
申请号：US349028
申请日：1994-12-02
申请人： Edward J. Yarmchuk , Mark D. Schultz , Bucknell C. Webb , Timothy J. Chainer
发明人： Edward J. Yarmchuk , Mark D. Schultz , Bucknell C. Webb , Timothy J. Chainer
IPC分类号： G11B5/012 , G11B5/55 , G11B5/596 , G11B21/10
CPC分类号： G11B5/5534 , G11B21/10 , G11B21/106 , G11B5/59633 , G11B5/59644
摘要： During a write revolution of a storage medium, a transition is written on the storage medium while servoing on another transition previously recorded on the storage medium. During that write revolution, a position error signal corresponding to the position error of the transducer relative to the previously recorded transition is determined. That position error signal is then stored, during the write revolution, to be used in computing a reference track value associated with the transition being written to correct for the position error. Additionally, a product servo-pattern is written, which includes an embodying of the position error therein.
摘要翻译：在存储介质的写入转动期间，在先前记录在存储介质上的另一个转换上进行伺服处理，在存储介质上写入转换。在该写入旋转期间，确定对应于换能器相对于先前记录的转变的位置误差的位置误差信号。然后在写入旋转期间存储该位置误差信号，以用于计算与被写入的转换相关联的参考轨迹值，以校正位置误差。此外，写入产品伺服图案，其中包括其中的位置误差。

46. 发明授权

US08686522B2 Semiconductor trench inductors and transformers 有权
标题翻译：半导体沟槽电感和变压器
公开(公告)号：US08686522B2
公开(公告)日：2014-04-01
申请号：US13272485
申请日：2011-10-13
申请人： Bucknell C. Webb
发明人： Bucknell C. Webb
IPC分类号： H01L29/82 , H01L21/02
CPC分类号： H01L23/645 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor trench inductor and transformer structures are provided, which include thin film conductive layers and magnetic layers formed within trenches etched in semiconductor substrates. Semiconductor trench devices effectively provide vertical oriented inductor and transformer structures whereby conductive coils and magnetic layers are vertically oriented on edge within trenches, thereby providing a space-saving compact design, and which allows the conductive layers within the trench to be enclosed by magnetic material, thereby providing a density of magnetic material that increases the storable energy density.
摘要翻译：提供半导体沟槽电感器和变压器结构，其包括形成在半导体衬底中蚀刻的沟槽内的薄膜导电层和磁性层。半导体沟槽器件有效地提供垂直取向的电感器和变压器结构，由此导电线圈和磁性层在沟槽内的边缘垂直取向，从而提供节省空间的紧凑设计，并且允许沟槽内的导电层被磁性材料包围，从而提供增加可储存能量密度的磁性材料的密度。

47. 发明授权

US08227264B2 Reworkable electronic device assembly and method 有权
标题翻译：可再生电子装置组装及方法
公开(公告)号：US08227264B2
公开(公告)日：2012-07-24
申请号：US13071894
申请日：2011-03-25
申请人： Paul S. Andry , Stephen L. Buchwalter , George A. Katopis , John U. Knickerbocker , Stelios G. Tsapepas , Bucknell C. Webb
发明人： Paul S. Andry , Stephen L. Buchwalter , George A. Katopis , John U. Knickerbocker , Stelios G. Tsapepas , Bucknell C. Webb
IPC分类号： H01L21/30
CPC分类号： H01L23/49827 , H01L24/16 , H01L24/17 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/13025 , H01L2224/13099 , H01L2224/16 , H01L2224/16146 , H01L2224/16235 , H01L2224/17181 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06589 , H01L2924/0002 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/12044 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/00 , H01L2224/05552
摘要： An electronic device assembly is provided which includes a substrate, an interposer and an integrated circuit chip. The substrate is fabricated of a first material having a first thermal expansivity, and the interposer and integrated circuit chip are fabricated of a second material having a second thermal expansivity. The second thermal expansivity is different from the first thermal expansivity so that there is a coefficient of thermal expansion mismatch between the substrate and the interposer or chip. The interposer is coupled to the substrate via a first plurality of electrical contacts and an underfill adhesive at least partially surrounding the electrical contacts to bond the interposer to the substrate and thereby reduce strain on the first plurality of electrical contacts. The integrated circuit chip is coupled to the interposer via a second plurality of electrical contacts only, without use of an adhesive surrounding the second plurality of electrical contacts.
摘要翻译：提供一种电子器件组件，其包括衬底，插入器和集成电路芯片。衬底由具有第一热膨胀性的第一材料制成，并且插入器和集成电路芯片由具有第二热膨胀性的第二材料制成。第二热膨胀性与第一热膨胀性不同，因此在衬底和插入件或芯片之间存在热膨胀失配系数。插入器经由第一多个电触点和底部填充粘合剂耦合到基板，所述底部填充粘合剂至少部分地围绕电触点以将插入件结合到基板，从而减少第一多个电触点上的应变。集成电路芯片仅通过第二多个电触点而耦合到插入器，而不使用围绕第二多个电触点的粘合剂。

48. 发明授权

US07936060B2 Reworkable electronic device assembly and method 有权
标题翻译：可再生电子装置组装及方法
公开(公告)号：US07936060B2
公开(公告)日：2011-05-03
申请号：US12431827
申请日：2009-04-29
申请人： Paul S. Andry , Stephen L. Buchwalter , George A. Katopis , John U. Knickerbocker , Stelios G. Tsapepas , Bucknell C. Webb
发明人： Paul S. Andry , Stephen L. Buchwalter , George A. Katopis , John U. Knickerbocker , Stelios G. Tsapepas , Bucknell C. Webb
IPC分类号： H01L23/52
CPC分类号： H01L23/49827 , H01L24/16 , H01L24/17 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/13025 , H01L2224/13099 , H01L2224/16 , H01L2224/16146 , H01L2224/16235 , H01L2224/17181 , H01L2224/73204 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06589 , H01L2924/0002 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/12044 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/00 , H01L2224/05552
摘要： An electronic device assembly is provided which includes a substrate, an interposer and an integrated circuit chip. The substrate is fabricated of a first material having a first thermal expansivity, and the interposer and integrated circuit chip are fabricated of a second material having a second thermal expansivity. The second thermal expansivity is different from the first thermal expansivity so that there is a coefficient of thermal expansion mismatch between the substrate and the interposer or chip. The interposer is coupled to the substrate via a first plurality of electrical contacts and an underfill adhesive at least partially surrounding the electrical contacts to bond the interposer to the substrate and thereby reduce strain on the first plurality of electrical contacts. The integrated circuit chip is coupled to the interposer via a second plurality of electrical contacts only, without use of an adhesive surrounding the second plurality of electrical contacts.
摘要翻译：提供一种电子器件组件，其包括衬底，插入器和集成电路芯片。衬底由具有第一热膨胀性的第一材料制成，并且插入器和集成电路芯片由具有第二热膨胀性的第二材料制成。第二热膨胀性与第一热膨胀性不同，因此在衬底和插入件或芯片之间存在热膨胀失配系数。插入器经由第一多个电触点和底部填充粘合剂耦合到基板，所述底部填充粘合剂至少部分地围绕电触点以将插入件结合到基板，从而减少第一多个电触点上的应变。集成电路芯片仅通过第二多个电触点而耦合到插入器，而不使用围绕第二多个电触点的粘合剂。

49. 发明授权

US07741722B2 Through-wafer vias 有权
标题翻译：通晶圆通孔
公开(公告)号：US07741722B2
公开(公告)日：2010-06-22
申请号：US11690181
申请日：2007-03-23
申请人： Paul Stephen Andry , Edmund Juris Sprogis , Kenneth Jay Stein , Timothy Dooling Sullivan , Cornelia Kang-I Tsang , Ping-Chuan Wang , Bucknell C. Webb
发明人： Paul Stephen Andry , Edmund Juris Sprogis , Kenneth Jay Stein , Timothy Dooling Sullivan , Cornelia Kang-I Tsang , Ping-Chuan Wang , Bucknell C. Webb
IPC分类号： H01L23/48
CPC分类号： H01L23/481 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other.
摘要翻译：一种晶片通孔结构及其形成方法。贯通晶片通孔结构包括具有开口和顶部晶片表面的晶片。顶部晶片表面限定垂直于顶部晶片表面的第一参考方向。贯通晶片通孔结构还包括在开口中的通晶片通孔。贯通晶片通孔具有矩形板的形状。贯通晶片通孔在第一参考方向上的高度基本上等于晶片在第一参考方向上的厚度。贯穿晶片通孔在第二参考方向上的长度比通过晶片通孔在第三参考方向上的宽度大至少十倍。第一，第二和第三参考方向彼此垂直。

50. 发明申请

US20080274583A1 THROUGH-WAFER VIAS 有权
标题翻译：通过六角形
公开(公告)号：US20080274583A1
公开(公告)日：2008-11-06
申请号：US11690181
申请日：2007-03-23
申请人： Paul Stephen Andry , Edmund Juris Sprogis , Kenneth Jay Stein , Timothy Dooling Sullivan , Cornelia Kang-I Tsang , Ping-Chuan Wang , Bucknell C. Webb
发明人： Paul Stephen Andry , Edmund Juris Sprogis , Kenneth Jay Stein , Timothy Dooling Sullivan , Cornelia Kang-I Tsang , Ping-Chuan Wang , Bucknell C. Webb
IPC分类号： H01L21/00
CPC分类号： H01L23/481 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other.
摘要翻译：一种晶片通孔结构及其形成方法。贯通晶片通孔结构包括具有开口和顶部晶片表面的晶片。顶部晶片表面限定垂直于顶部晶片表面的第一参考方向。贯通晶片通孔结构还包括在开口中的通晶片通孔。贯通晶片通孔具有矩形板的形状。贯通晶片通孔在第一参考方向上的高度基本上等于晶片在第一参考方向上的厚度。贯穿晶片通孔在第二参考方向上的长度比通过晶片通孔在第三参考方向上的宽度大至少十倍。第一，第二和第三参考方向彼此垂直。

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