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41. 发明授权

US06731443B2 Total error multiplier for optimizing read/write channel 有权
标题翻译：用于优化读/写通道的总误差乘数
公开(公告)号：US06731443B2
公开(公告)日：2004-05-04
申请号：US09896640
申请日：2001-06-29
申请人： William G. Bliss , James W. Rae
发明人： William G. Bliss , James W. Rae
IPC分类号： G11B509
CPC分类号： G11B20/1816 , G11B20/10009 , G11B20/22
摘要： A method and apparatus to optimize a bit error rate for a partial response, maximum likelihood (“PRML”) read/write channel is disclosed. A channel margining circuit that is configured to carry out an embodiment for a method of optimizing the bit error rates of a read/write channel is described. The margining circuit derives an interference signal to stress a read/write channel for optimizing the bit error rate. The signal is derived from bit errors inherent with the read/write channel. The circuit reduces the time to optimize the channel by providing an amplified interference signal that increases a bit error rate during optimization.
摘要翻译：公开了一种用于优化部分响应，最大似然（“PRML”）读/写通道的误码率的方法和装置。描述了被配置为执行用于优化读/写通道的误码率的方法的实施例的信道余量电路。边缘电路导出干扰信号，以压缩读/写通道，以优化误码率。该信号来自读/写通道固有的位错误。该电路通过提供在优化期间增加误码率的放大干扰信号来减少对信道优化的时间。

42. 发明授权

US06661590B2 Efficient analog front end for a read/write channel of a hard disk drive running from a highly regulated power supply 有权
公开(公告)号：US06661590B2
公开(公告)日：2003-12-09
申请号：US09865860
申请日：2001-05-25
申请人： Sasan Cyrusian , Stephen J. Franck , Sriharsha Annadore , Elmar Bach , Siegfried Hart , Thomas Blon , William G. Bliss , James Wilson Rae , Michael Ruegg , Ulrich Huewels , Fritz Mistlberger
发明人： Sasan Cyrusian , Stephen J. Franck , Sriharsha Annadore , Elmar Bach , Siegfried Hart , Thomas Blon , William G. Bliss , James Wilson Rae , Michael Ruegg , Ulrich Huewels , Fritz Mistlberger
IPC分类号： G11B509
CPC分类号： G11B5/02 , G11B5/012 , G11B20/10009
摘要： A method and apparatus for running an analog portion (162) of a read/write channel (108) from a highly regulated power supply (260). The apparatus includes an analog portion (162), a clock synthesizer (154), and a highly regulated power supply (260) connected to the analog portion (162) and the clock synthesizer (154). The analog portion (162) and the clock synthesizer (154) both comprise high voltage transistors which operate in a first voltage range and low voltage transistors which operate in a second voltage range, wherein the first voltage range is within the second voltage range. The highly regulated power supply (260) supplies power that is within the first voltage range to the analog portion (162) and the clock synthesizer (154). The method includes generating power that is within the first voltage range using the highly regulated power supply (260), and supplying the power to the analog portion (162) and the clock synthesizer (154).

43. 发明授权

US06449110B1 Optimizing operation of a disk storage system by increasing the gain of a non-linear transducer and correcting the non-linear distortions using a non-linear correction circuit 失效
标题翻译：通过增加非线性传感器的增益并使用非线性校正电路校正非线性失真来优化磁盘存储系统的操作
公开(公告)号：US06449110B1
公开(公告)日：2002-09-10
申请号：US09244082
申请日：1999-02-03
申请人： Ronald D. DeGroat , William G. Bliss
发明人： Ronald D. DeGroat , William G. Bliss
IPC分类号： G11B509
CPC分类号： G11B20/10055 , G11B5/012 , G11B5/09 , G11B20/10009 , G11B20/10037
摘要： A sampled amplitude read channel is disclosed for magnetic disk storage systems utilizing a read head exhibiting a non-linear response such as a magneto-resistive (MR) read head. A sensor of the read head is adjusted to operate in a region of its response that provides optimum gain even though it may be a region of higher non-linearity. To compensate for the non-linearity introduced into the read signal, the read channel further comprises an adaptive non-linear correction circuit that is adaptively tuned by a least-mean-square (LMS) adaptation circuit. The analog read signal is sampled and the discrete time samples equalized into a desired partial response prior to sequence detection. The non-linear correction circuit is inserted into the read path prior to the sequence detector in order to attenuate the non-linear distortions that would otherwise degrade the performance of the sequence detector. A channel quality circuit integrated into the read channel measures and accumulates a predetermined error metric, such as a squared sample error or a bit error, that is used to optimize the adjustment of the sensor in the read head. By iteratively adjusting the sensor and adaptively tuning the non-linear correction circuit, an optimum sensor setting that minimizes the accumulated error metric is determined, saved, and then used as the operating setting during normal operation of the magnetic disk storage system.
摘要翻译：公开了采用磁阻（MR）读头的非线性响应的读头的磁盘存储系统的采样振幅读通道。读头的传感器被调整以在其响应的区域中操作，其提供最佳增益，即使其可以是较高非线性的区域。为了补偿引入读信号的非线性，读通道还包括由最小均方（LMS）适配电路自适应调谐的自适应非线性校正电路。模拟读取信号被采样，并且离散时间样本在序列检测之前被均衡为期望的部分响应。非线性校正电路在序列检测器之前插入到读取路径中，以便衰减否则会降低序列检测器的性能的非线性失真。集成到读通道中的通道质量电路测量并累积预定误差度量，例如用于优化读头中的传感器的调整的采样误差或位错误。通过迭代地调整传感器并自适应地调谐非线性校正电路，确定，保存最小化累积误差度量的最佳传感器设置，然后在磁盘存储系统的正常操作期间用作操作设置。

44. 发明授权

US5726818A Magnetic disk sampled amplitude read channel employing interpolated timing recovery for synchronous detection of embedded servo data 失效
标题翻译：采用内插定时恢复的磁盘采样幅度读取通道，用于嵌入式伺服数据的同步检测
公开(公告)号：US5726818A
公开(公告)日：1998-03-10
申请号：US567681
申请日：1995-12-05
申请人： David E. Reed , William G. Bliss
发明人： David E. Reed , William G. Bliss
IPC分类号： G11B5/596 , G11B5/09 , G11B20/10 , G11B20/12 , G11B20/14 , G11B21/10 , H04L7/02
CPC分类号： H04L7/0029 , G11B20/10009 , G11B20/10037 , G11B20/10055 , G11B20/10064 , G11B20/10074 , G11B20/1403 , G11B5/09 , H04L7/0062 , G11B20/1258 , G11B2020/10888 , G11B2020/1234 , G11B2020/1282 , H04L2007/047 , H04L7/0004
摘要： A sampled amplitude read channel reads user data and embedded servo data stored on a magnetic medium by detecting digital data from a sequence of discrete time interpolated sample values. A write frequency synthesizer generates a write clock for writing digital data to the magnetic medium at a predetermined baud rate for a selected zone, and upon read back, a read frequency synthesizer generates a fixed sampling clock at a frequency slightly higher than the write frequency at the outer zone. A sampling device samples the analog read signal at this fixed sampling rate across the data zones and servo wedges to generate a sequence of discrete time channel samples that are not synchronized to the baud rate. Before sampling, an analog receive filter processes the read signal to attenuate aliasing noise without having to adjust its spectrum across data zones or servo wedges. A discrete time equalizing filter equalizes the channel samples according to a predetermined partial response (PR4, EPR4, EEPR4, etc.). An interpolating timing recovery circuit, responsive to the equalized channel samples, computes an interpolation interval .tau. and, in response thereto, generates interpolated sample values substantially synchronized to the baud rate. The timing recovery circuit also generates a synchronous data clock for clocking a discrete time sequence detector and pulse detector which detect the digital user and servo data from the interpolated sample values.
摘要翻译：采样幅度读取通道通过从离散时间内插样本值的序列中检测数字数据来读取存储在磁性介质上的用户数据和嵌入式伺服数据。写入频率合成器产生写入时钟，用于以预定波特率向所选择的区域向磁性介质写入数字数据，并且在读回时，读取频率合成器以略高于写入频率的频率产生固定采样时钟外部区域。采样设备以固定采样率对数据区和伺服楔进行采样，以产生不与波特率同步的离散时间通道采样序列。在采样之前，模拟接收滤波器处理读取信号以衰减混叠噪声，而不必在数据区或伺服楔上调整其频谱。离散时间均衡滤波器根据预定的部分响应（PR4，EPR4，EEPR4等）均衡信道样本。内插定时恢复电路响应于均衡信道采样，计算内插间隔τ，并且响应于此产生基本上与波特率同步的内插采样值。定时恢复电路还产生用于计时离散时间序列检测器和脉冲检测器的同步数据时钟，其从内插样本值检测数字用户和伺服数据。

45. 发明授权

US07743314B2 Method and apparatus for a data-dependent noise predictive viterbi 有权
标题翻译：用于数据相关噪声预测维特比的方法和装置
公开(公告)号：US07743314B2
公开(公告)日：2010-06-22
申请号：US11607492
申请日：2006-12-01
申请人： Heinrich J. Stockmanns , William G. Bliss , Razmik Karabed , James W. Rae
发明人： Heinrich J. Stockmanns , William G. Bliss , Razmik Karabed , James W. Rae
IPC分类号： H03M13/03
CPC分类号： G11B20/10296 , G11B20/10009
摘要： An improved Viterbi detector is disclosed in which each branch metric is calculated based on noise statistics that depend on the signal hypothesis corresponding to the branch. Also disclosed is a method of reducing the complexity of the branch metric calculations by clustering branches corresponding to signals with similar signal-dependent noise statistics. A feature of this architecture is that the branch metrics (and their corresponding square difference operators) are clustered into multiple groups, where all the members of each group draw input from a single, shared noise predictive filter corresponding to the group. In recording technologies as practiced today, physical imperfections in the representation of recorded user data in the recording medium itself are becoming the dominate source of noise in the read back data. This noise is highly dependent on what was (intended to be) written in the medium. The disclosed Viterbi detector exploits this statistical dependence of the noise on the signal.
摘要翻译：公开了一种改进的维特比检测器，其中基于依赖于与分支对应的信号假设的噪声统计来计算每个分支度量。还公开了一种通过对与具有相似的信号相关噪声统计信号的信号进行聚类的分支来降低分支度量计算的复杂度的方法。该架构的一个特点是分支度量（及其对应的平方差运算符）被聚集成多个组，其中每个组的所有成员从与组相对应的单个共享噪声预测滤波器中绘制输入。在今天所采用的记录技术中，在记录介质本身中记录的用户数据的表示中的物理缺陷正在回读数据中成为主要的噪声源。这种噪音很大程度上取决于介质中写的内容。所公开的维特比检测器利用噪声对信号的统计依赖性。

46. 发明申请

US20090282320A1 ITERATIVE DECODER WITH STOPPING CRITERION GENERATED FROM ERROR LOCATION POLYNOMIAL 有权
标题翻译：具有从错误位置产生的停止标准的迭代解码器多项式
公开(公告)号：US20090282320A1
公开(公告)日：2009-11-12
申请号：US12397237
申请日：2009-03-03
申请人： Yu Liao , William G. Bliss , Engling Yeo
发明人： Yu Liao , William G. Bliss , Engling Yeo
IPC分类号： H03M13/15 , G06F11/10 , H03M13/27
CPC分类号： H03M13/3753 , H03M13/1525 , H03M13/2906 , H03M13/2936
摘要： A decoder for error correction an encoded message, such as one encoded by a turbo encoder, with reduced iterations due to an improved stopping criterion. The decoder includes an error correction loop that iteratively processes a message that is encoded prior to transmittal over a communication channel. The error correction loop generates, such as with a Reed-Solomon decoder, an error location polynomial in each iterative process. A stopping mechanism in the decoder allows an additional iteration of the message decoding based on the error location polynomial, such as by obtaining the degree of the error location polynomial and comparing it to a threshold. In one example, the threshold is the maximum number of symbol errors correctable by the Reed-Solomon code embodied in the decoder. The stopping mechanism allows additional iterations when the stopping criterion (or polynomial degree) is greater than the maximum number of symbol errors correctable by the Reed-Solomon code.
摘要翻译：用于由编码消息（例如由turbo编码器编码的编码消息）进行纠错的解码器，由于改进的停止标准而具有减少的迭代。解码器包括错误校正循环，其循环地处理在通过通信信道传送之前被编码的消息。误差校正循环，例如利用Reed-Solomon解码器，在每个迭代过程中产生误差位置多项式。解码器中的停止机制允许基于错误位置多项式的消息解码的附加迭代，例如通过获得错误位置多项式的程度并将其与阈值进行比较。在一个示例中，阈值是由解码器中实现的Reed-Solomon码可校正的符号错误的最大数量。当停止标准（或多项式度）大于由里德 - 所罗门码可校正的符号错误的最大数量时，停止机制允许额外的迭代。

47. 发明授权

US06788223B2 High rate coding for media noise 有权
标题翻译：高速编码媒体噪声
公开(公告)号：US06788223B2
公开(公告)日：2004-09-07
申请号：US10253911
申请日：2002-09-25
申请人： William G. Bliss , Andrei Vityaev , Razmik Karabed
发明人： William G. Bliss , Andrei Vityaev , Razmik Karabed
IPC分类号： H03M700
CPC分类号： G11B20/1426 , G11B20/10009 , G11B20/1833 , G11B2020/1446 , H03M5/145 , H03M13/093
摘要： An apparatus has a conversion circuit, a precoder circuit, and a selection circuit. The conversion circuit converts user data b1, b2, b3 . . . bk to a coded sequence c0, c1, c2 . . . cq. The selection circuit selects c0 in the coded sequence c0, c1, c2 . . . cq such that the output of the precoder circuit has less than a maximum number q of transitions. The conversion circuit may include an encoder circuit to convert user data b1, b2, b3 . . . bk to a sequence c1, c2 . . . cq, and a transition minimization circuit to add c0 to the sequence c1, c2 . . . cq. The apparatus may have a circuit to add at least one additional bit, which may be a parity bit, to the coded sequence c0, c1, c2 . . . cq.
摘要翻译：一种装置具有转换电路，预编码器电路和选择电路。转换电路转换用户数据b1，b2，b3。。。 bk到编码序列c0，c1，c2。。。 cq。选择电路以编码序列c0，c1，c2选择c0。。。 cq，使得预编码器电路的输出具有小于转换的最大数量q。转换电路可以包括用于转换用户数据b1，b2，b3的编码器电路。。。 bk到序列c1，c2。。。 cq，以及将c0加到序列c1，c2的转移最小化电路。。。 cq。该装置可以具有向编码序列c0，c1，c2添加至少一个附加位（可以是奇偶校验位）的电路。。。 cq。

48. 发明授权

US06396254B1 Read channel 有权
标题翻译：阅读频道
公开(公告)号：US06396254B1
公开(公告)日：2002-05-28
申请号：US09454626
申请日：1999-12-06
申请人： German Stefan Otto Feyh , Christopher Lyle Painter , Lisa Chaya Sundell , William G. Bliss
发明人： German Stefan Otto Feyh , Christopher Lyle Painter , Lisa Chaya Sundell , William G. Bliss
IPC分类号： G11B509
CPC分类号： G11B20/10296 , G11B5/09 , G11B20/10009
摘要： An improved read channel for storage and communication application particularly useful in optical storage applications. The improved read channel includes a Viterbi sequence detector tuned to a preferred partial response target well suited to sensing of pulses in the waveforms typical of optical storage read heads. In particular, the read channel of the present invention implements pulse and sequence detection for a partial response target having a spectral null at the Nyquist frequency and having a relative minimum between zero and the Nyquist frequency. In other words, the partial response target of the improved read channel is not a monotonic decreasing function between zero and the Nyquist frequency as is known in present read channels. More specifically, in the preferred embodiment, the partial response target of the read channel includes a spectral null at the Nyquist frequency and another spectral null at half the Nyquist frequency. The improved read channel further includes state logic in the Viterbi sequence detector that processes two discrete samples in parallel. Parallel processing of multiple samples improves the read channel performance for application in ever increasing bit density storage and communication applications. The preferred embodiment of the present invention also includes selectable waveform shaping features to improve the flexibility of utilizing the read channel in a variety of applications. Specifically, the present invention includes a reshaping filter, a prefilter and DC offset circuit that may be selected to adapt the waveform as required for application to the slicer and to adapt as required for application to the sequence detector.
摘要翻译：用于存储和通信应用的改进的读通道，在光存储应用中特别有用。改进的读通道包括调谐到优选的部分响应目标的维特比序列检测器，该部分响应目标非常适合于感测光存储读取头典型的波形中的脉冲。特别地，本发明的读通道对于在奈奎斯特频率处具有频谱零点并且具有零与奈奎斯特频率之间的相对最小值的部分响应目标实现脉冲和序列检测。换句话说，改进的读通道的部分响应目标不是在零和奈奎斯特频率之间的单调递减函数，如在当前读通道中已知的。更具体地，在优选实施例中，读通道的部分响应目标包括在奈奎斯特频率处的频谱零点，并且在奈奎斯特频率的一半处具有另一频谱零点。改进的读通道还包括维特比序列检测器中的并行处理两个离散样本的状态逻辑。多个样本的并行处理提高了读通道性能，适用于日益增长的位密度存储和通信应用。本发明的优选实施例还包括可选择的波形整形特征，以提高在各种应用中利用读通道的灵活性。具体地说，本发明包括一个重新整形滤波器，一个预滤波器和一个直流偏移电路，它可以被选择以使应用所需的波形适应于限幅器，并根据应用需要适应于序列检测器。

49. 发明授权

US6032284A Trellis coding system for disc storage systems 失效
标题翻译：光盘存储系统的网格编码系统
公开(公告)号：US6032284A
公开(公告)日：2000-02-29
申请号：US815881
申请日：1997-03-12
申请人： William G. Bliss
发明人： William G. Bliss
IPC分类号： G11B20/14 , H03M7/14 , H04L25/497
CPC分类号： H04L25/03203 , G11B20/10037 , G11B20/10046 , G11B20/10064 , G11B20/10074 , G11B20/10222 , G11B20/10296 , G11B20/10462 , G11B20/1403 , H03M7/14 , H04L1/006 , H04L25/497
摘要： In a sampled amplitude read channel for reading data recorded on a disc storage medium, a sequence detector is disclosed which operates according to a time varying trellis state machine matched to a modulation code which constrains the occurrence of tribits to k-modulo-3, and forbids runs of four or longer consecutive NRZI "1" bits. The modulation code enhances the distance property of the sequence detector without significantly decreasing the code rate. Example time varying trellis sequence detectors are disclosed for the EPR4 response and EEPR4 response. Further, the modulation code improves the performance of a sub-sampled read channel (a channel that samples the analog read signal substantially below Nyquist) by coding out the most likely miss-detected data sequences in the presence of sub-sampling. Interpolated timing recovery is disclosed for implementing a sub-sampled read channel employing the time varying sequence detector of the present invention.
摘要翻译：在用于读取记录在盘存储介质上的数据的采样幅度读取通道中，公开了一种序列检测器，其根据与限制三进制发生为k模的调制码匹配的时变网格状态机进行操作，以及禁止运行四个或更长的连续NRZI“1”位。调制码增强了序列检测器的距离属性，而不会显着降低码率。公开了用于EPR4响应和EEPR4响应的示例时变网格序列检测器。此外，调制码通过在存在子采样的情况下编码出最可能的未检测数据序列来改进子采样读通道（通过模拟读取信号基本上低于奈奎斯特采样的通道）的性能。公开了用于实现采用本发明的时变序列检测器的子采样读通道的内插定时恢复。

50. 发明授权

US5648738A Read channel having auto-zeroing and offset compensation, and power-down between servo fields 失效
标题翻译：具有自动归零和偏移补偿的读通道，以及伺服字段之间的掉电
公开(公告)号：US5648738A
公开(公告)日：1997-07-15
申请号：US333488
申请日：1994-11-01
申请人： David R. Welland , William G. Bliss
发明人： David R. Welland , William G. Bliss
IPC分类号： G11B5/596 , G11B20/10 , H03L5/00
CPC分类号： G11B20/10009 , G11B5/59627
摘要： A read channel especially suited for disk drives, the read channel having auto-zeroing and offset compensation operative with sufficient speed to allow powering-down much of the read channel electronics between servo fields when a read operation is not being executed, is disclosed. Auto-zeroing is accomplished by temporarily shorting what would have been the signal received from a pre-amplifier, and charging capacitors in feedback loops temporarily switched in-circuit in the various circuits being auto-zeroed. After auto-zeroing, any remaining offset, including that imposed by an analog-to-digital converter converting the analog read signal to digitized samples of the read signal, is removed by filtering the digitized read signal samples by a digital filter acting as a low pass filter (integrator and lossy integrator in the embodiment disclosed), and reconverting the digital output of the filter to analog form for subtraction from the input to the analog-to-digital converter. Other aspects of the invention are also disclosed.
摘要翻译：公开了一种特别适用于磁盘驱动器的读取通道，读取通道具有自动归零和偏移补偿，以足够的速度运行，以允许当未执行读取操作时在伺服磁场之间断开大部分读取通道电子设备的电源。自动归零是通过暂时缩短从前置放大器接收到的信号，并在各个电路中临时切换回路中的反馈环路中的电容器自动归零来实现的。在自动归零之后，将通过将模拟读取信号转换为读取信号的数字化样本的模拟数字转换器施加的任何剩余偏移量通过用作低电平的数字滤波器对数字化读取信号采样进行滤波来消除（所公开的实施例中的积分器和有损积分器），并且将滤波器的数字输出重新转换为模拟形式，以从模拟数字转换器的输入减法。还公开了本发明的其它方面。

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