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41. 发明授权

US06521355B1 Optical color tracer indentifier in metal paste that bleed to greensheet 失效
标题翻译：金属糊剂中的光学颜色示踪剂染色剂渗色至毛坯
公开(公告)号：US06521355B1
公开(公告)日：2003-02-18
申请号：US09656089
申请日：2000-09-06
申请人： Benjamin V. Fasano , James N. Humenik , David C. Long , Cynthia J. Calli
发明人： Benjamin V. Fasano , James N. Humenik , David C. Long , Cynthia J. Calli
IPC分类号： B21D3900
CPC分类号： H01L22/24 , H05K1/0269 , H05K1/092 , H05K3/0076 , H05K3/285 , H05K3/3484 , H05K3/3489 , H05K2203/161 , Y10T428/12528 , Y10T428/12535 , Y10T428/12556 , Y10T428/24802
摘要： A coating material used in the fabrication of electronic components such as a metallized paste is provided comprising a material to be coated on the electronic component substrate and an identifying component which identifying component can be identified and which identifying component identifies the coating material. Optical dyes visible to the eye can be used as the identifying component with a preferred dye being a UV fluorescent dye which is colorless under visible light and visible under UV light. A process for making an electronic component using the coating materials of the invention and electronic components made using the coating material are also provided.
摘要翻译：提供了用于制造诸如金属化糊料的电子部件的涂层材料，其包括要涂覆在电子部件基板上的材料和识别部件，并且识别部件识别涂层材料。眼睛可见的光学染料可用作识别组分，优选的染料是紫外线荧光染料，其在可见光下是无色的并且在紫外光下是可见的。还提供了使用本发明的涂层材料制成电子部件的方法和使用该涂层材料制成的电子部件。

42. 发明授权

US06407927B1 Method and structure to increase reliability of input/output connections in electrical devices 失效
标题翻译：提高电气设备输入/输出连接可靠性的方法和结构
公开(公告)号：US06407927B1
公开(公告)日：2002-06-18
申请号：US09387325
申请日：1999-08-31
申请人： Benjamin V. Fasano
发明人： Benjamin V. Fasano
IPC分类号： H05K702
CPC分类号： H05K3/326 , H01L23/49816 , H01L2924/0002 , H01R4/023 , H01R13/58 , H01L2924/00
摘要： A method and connecting structure includes a first surface and a connection pad on said first surface, wherein, said first surface includes an opening adjacent to said connection pad, and wherein, upon sufficient stress, said opening forms a flap allowing a portion of said connection pad to separate from said first surface.
摘要翻译：一种方法和连接结构包括在所述第一表面上的第一表面和连接垫，其中，所述第一表面包括与所述连接垫相邻的开口，并且其中，在足够的应力下，所述开口形成允许所述连接的一部分垫从所述第一表面分离。

43. 发明授权

US06391669B1 Embedded structures to provide electrical testing for via to via and interface layer alignment as well as for conductive interface electrical integrity in multilayer devices 失效
标题翻译：嵌入式结构，为通孔和界面层对准以及多层器件中的导电界面电气完整性提供电气测试
公开(公告)号：US06391669B1
公开(公告)日：2002-05-21
申请号：US09598426
申请日：2000-06-21
申请人： Benjamin V. Fasano , Hai P. Longworth , Vincent P. Peterson, III , Anthony L. Plachy , Robert N. Wiggin
发明人： Benjamin V. Fasano , Hai P. Longworth , Vincent P. Peterson, III , Anthony L. Plachy , Robert N. Wiggin
IPC分类号： G01R3104
CPC分类号： H01L22/34 , H05K1/0268 , H05K1/0269 , H05K1/092 , H05K1/116 , H05K3/1225 , H05K3/4061 , H05K3/4614 , H05K3/4638 , H05K2201/096 , H05K2201/09627 , H05K2201/09781 , H05K2203/166 , Y10T29/49004
摘要： Multilayer substrates, are fabricated with the incorporation therein of non-destructive test structures utilized to provide visual and electrical test data to facilitate the ascertainment and assessment of potential electrical interface failures. Furthermore, there are provided embedded structures in multilayer substrates, such as are employed in chip carrier packaging, so as to facilitate electrical testing for via to via alignment and interface layer alignment, and to enable the testing of conductive interface electrical integrity of multilayer electrical devices.
摘要翻译：制造多层基板，其中结合有非破坏性测试结构，用于提供视觉和电气测试数据，以便于确定和评估潜在的电接口故障。此外，在多层基板中提供了嵌入式结构，例如用于芯片载体封装，以便于通孔经由对准和界面层对准的电气测试，并且能够测试多层电气设备的导电界面电气完整性。

44. 发明授权

US06224392B1 Compliant high-density land grid array (LGA) connector and method of manufacture 失效
标题翻译：符合高密度土地格栅阵列（LGA）连接器和制造方法
公开(公告)号：US06224392B1
公开(公告)日：2001-05-01
申请号：US09206024
申请日：1998-12-04
申请人： Benjamin V. Fasano , Kevin M. Prettyman
发明人： Benjamin V. Fasano , Kevin M. Prettyman
IPC分类号： H01R1200
CPC分类号： H01R4/30 , H01R12/52 , H01R12/58 , Y10T29/49158
摘要： A compliant, high-density land grid array connector and the process of making such a connector. The process includes the steps of: (a) forming holes in a supporting substrate; (b) forming threaded sidewalls by tapping the holes; (c) plating the threaded sidewalls to form bellows-like structures; and (d) etching a surface of the supporting substrate after the plating to leave portions of the bellows-like structures protruding past a surface of the substrate. The resulting connector includes a substrate having bellows-like contacts extending from one or both sides for resiliently engaging pads such as those of an LGA module. As an alternative, the holes may be formed as blind holes. Ends of the bellows-like contacts may be roughened. The connector may also be formed by casting the substrate in a mold box having screw-like mandrels followed by steps of mandrel removal, hole plating and surface etching.
摘要翻译：符合标准的高密度焊盘阵列连接器和制造这种连接器的过程。该方法包括以下步骤：（a）在支撑衬底中形成孔; （b）通过敲击孔形成带螺纹的侧壁; （c）电镀螺纹侧壁以形成波纹管状结构; 和（d）在镀覆之后蚀刻支撑衬底的表面以使波纹管状结构的部分突出穿过衬底的表面。所得到的连接器包括具有从一侧或两侧延伸的波纹状接触的基板，用于弹性接合焊盘，例如LGA模块的接头。作为替代，孔可以形成为盲孔。波纹管状触点的端部可能会变粗糙。连接器也可以通过将基板浇铸在具有螺旋状心轴的模具箱中，之后是心轴去除，孔镀层和表面蚀刻的步骤来形成。

45. 发明授权

US5791911A Coaxial interconnect devices and methods of making the same 失效
标题翻译：同轴互连设备及其制作方法
公开(公告)号：US5791911A
公开(公告)日：1998-08-11
申请号：US739104
申请日：1996-10-25
申请人： Benjamin V. Fasano , Kevin M. Prettyman
发明人： Benjamin V. Fasano , Kevin M. Prettyman
IPC分类号： H01R12/57 , H01R24/50 , H01R43/00 , H05K1/02 , H05K1/14 , H05K3/32 , H05K3/34 , H05K3/40 , H01R9/09
CPC分类号： H01R24/50 , H01R12/57 , H05K1/0243 , H01L2924/0002 , H01R2103/00 , H05K1/0237 , H05K2201/09809 , H05K2201/10325 , H05K2201/10333 , H05K2201/10378 , H05K2201/10962 , H05K3/325 , H05K3/341 , H05K3/4015 , Y10T29/49123 , Y10T29/49147
摘要： A surface mounted electronic interconnect device. The device includes a coaxial electrical pad comprising a plurality of conductive surfaces on a substrate corresponding to the conductor arrangement of a coaxial connector; and, a coaxial connector comprising a dielectric material having a center opening and isolated electrically conductive interior and exterior surfaces that are planar with the ends of the connector. The dielectric separates the inner conductive surface from the outer conductive surface and is tubularly shaped having an inner wall for the electrically conductive interior surface. The coaxial connector inner and outer conductors may alternatively be comprised of microsprings. The coaxial connector has first and second ends, the first end for attachment to an electronic package and the second for pluggable attachment to a PC board. A socket for mating with the coaxial connector second end is demonstrated, comprising a body and inner and outer conductors and configured so as to contact the interior and exterior surfaces of the coaxial connector at different times. The inner conductor of the socket is adapted to be received within the electrically conductive interior surface of the coaxial connector.
摘要翻译：表面安装的电子互连器件。该装置包括：同轴电焊盘，其包括在与同轴连接器的导体布置相对应的衬底上的多个导电表面; 以及包括电介质材料的同轴连接器，所述电介质材料具有与所述连接器的端部平坦的中心开口和隔离的导电内部和外部表面。电介质将内部导电表面与外部导电表面分离，并且管状地形成有用于导电内表面的内壁。同轴连接器内外导体也可以由微弹簧构成。同轴连接器具有第一端和第二端，用于附接到电子封装的第一端和用于可插拔连接到PC板的第二端。示出了用于与同轴连接器第二端配合的插座，包括主体和内部和外部导体，并且构造成在不同时间接触同轴连接器的内部和外部表面。插座的内导体适于被容纳在同轴连接器的导电内表面内。

46. 发明授权

US07806341B2 Structure for implementing secure multichip modules for encryption applications 有权
标题翻译：用于实现加密应用的安全多芯片模块的结构
公开(公告)号：US07806341B2
公开(公告)日：2010-10-05
申请号：US12348364
申请日：2009-01-05
申请人： Mukta G. Farooq , Benjamin V. Fasano , Jason L. Frankel , Harvey C. Hamel , Suresh D. Kadakia , David C. Long , Frank L. Pompeo , Sudipta K. Ray
发明人： Mukta G. Farooq , Benjamin V. Fasano , Jason L. Frankel , Harvey C. Hamel , Suresh D. Kadakia , David C. Long , Frank L. Pompeo , Sudipta K. Ray
IPC分类号： G06K19/05
CPC分类号： G06K19/07381 , H01L23/04 , H01L23/055 , H01L23/10 , H01L23/576 , H01L25/0655 , H01L2224/16225 , H01L2224/16227 , H01L2924/01079 , H01L2924/09701 , H01L2924/15192 , H01L2924/3011 , H05K1/0275 , H05K1/0306 , H05K1/144 , H05K2201/09263 , H05K2201/10151
摘要： A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier; one or more integrated circuit chips attached to a top surface of the chip carrier; a ceramic-based cap structure attached to the top surface of the chip carrier, and covering the one or more integrated circuit chips; and a conductive grid structure embedded within the chip carrier and the cap structure, the conductive grid structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction; wherein the conductive grid structure is configured so as to detect an attempt to penetrate the IC module.
摘要翻译：防篡改集成电路（IC）模块包括陶瓷芯片载体; 一个或多个集成电路芯片，附接到芯片载体的顶表面; 一个陶瓷基帽结构，附着在芯片载体的顶表面上，并覆盖一个或多个集成电路芯片; 以及嵌入在所述芯片载体和所述盖结构内的导电栅格结构，所述导电栅格结构具有设置在x方向，y方向和z方向上的多个曲折线; 其中所述导电栅格结构被配置为检测穿透所述IC模块的尝试。

47. 发明授权

US07781232B2 Method to recover underfilled modules by selective removal of discrete components 失效
标题翻译：通过选择性去除分立元件来回收未充足模块的方法
公开(公告)号：US07781232B2
公开(公告)日：2010-08-24
申请号：US12015754
申请日：2008-01-17
申请人： Charles L. Arvin , Benjamin V. Fasano , Mario J. Interrante , Glenn A. Pomerantz
发明人： Charles L. Arvin , Benjamin V. Fasano , Mario J. Interrante , Glenn A. Pomerantz
IPC分类号： H01L21/48 , H01L21/00
CPC分类号： H05K3/3436 , H01L21/56 , H01L21/563 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01078 , H01L2924/01322 , H01L2924/01327 , H01L2924/09701 , H05K3/225 , H05K2203/0278 , H05K2203/0338 , H05K2203/176 , Y02P70/613 , H01L2924/00
摘要： Methods and reworked intermediate and resultant electronic modules made thereby, whereby a component in need of rework is located and removed from the module to reveal encapsulated solder connections residing within an underfill matrix. Heights of both the solder connections and underfill matrix are reduced, followed by etching the solder out of the solder connections to form openings within the underfill matrix. The underfill material is then removed to expose metallurgy of the substrate. A blank having a release layer with an array of solder connections is aligned with the exposed metallurgy, and this solder array is transferred from the blank onto the metallurgy. The transferred solder connections are then flattened using heat and pressure, followed by attaching solder connections of a new component to the flattened solder connections and underfilling these reworked solder connections residing between the new chip and substrate.
摘要翻译：由此制造的方法和返工的中间和合成的电子模块，由此将需要返工的部件放置并从模块移除，以露出位于底部填充基质内的封装的焊料连接。焊接连接和底部填充基体的高度减小，随后将焊料从焊料连接处蚀刻出来，以在底部填充基体内形成开口。然后除去底部填充材料以暴露基底的冶金。具有具有焊接连接阵列的释放层的坯料与暴露的冶金学对准，并且该焊料阵列从坯料转移到冶金上。然后，使用热和压力将转移的焊接连接件平坦化，然后将新部件的焊接连接件连接到扁平焊接连接，并对位于新芯片和基板之间的这些返工焊接点进行底部填充。

48. 发明授权

US07615850B2 Method and device including reworkable alpha particle barrier and corrosion barrier 失效
标题翻译：方法和装置包括可再加工的α粒子屏障和腐蚀屏障
公开(公告)号：US07615850B2
公开(公告)日：2009-11-10
申请号：US12104103
申请日：2008-04-16
申请人： Rehan Choudhary , Benjamin V. Fasano , Sushumna Iruvanti , Daniel D. Reinhardt , Deborah A. Sylvester
发明人： Rehan Choudhary , Benjamin V. Fasano , Sushumna Iruvanti , Daniel D. Reinhardt , Deborah A. Sylvester
IPC分类号： H01L23/556
CPC分类号： H01L21/563 , C08G2650/40 , C08L71/00 , H01L23/556 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/8388 , H01L2224/83885 , H01L2924/00014 , H01L2924/01084 , H01L2924/12044 , H01L2924/14 , H01L2924/3512 , H01L2924/00 , H01L2224/05599
摘要： A method and device comprising an easily reworkable alpha particle barrier is provided. The easily reworkable alpha particle barrier is applied in the space between the surface of the chip and the surface of the substrate, and reduces soft error rate (SER). Further, the easily reworkable alpha particle barrier material is chosen from the group of an organic material, a hydrocarbon, more specifically a polyalphaolefin (PAO) oil, and a polymer or filled polymer; wherein the polyalphaolefin oil has a viscosity below 1000 cSt (at 100° C.). The easily reworkable alpha particle barrier material can be used with multichip modules (MCM's) allowing easy device rework of one or more dies without affecting other dies on the same substrate.
摘要翻译：提供了一种包括易于再加工的α粒子屏障的方法和装置。在芯片的表面和基板的表面之间的空间中施加易于再加工的α粒子屏障，并且降低软错误率（SER）。此外，易于再加工的α粒子阻挡材料选自有机材料，烃，更具体地是聚α-烯烃（PAO）油和聚合物或填充聚合物的组; 其中所述聚α-烯烃油的粘度低于1000cSt（在100℃）。易于再加工的α粒子阻挡材料可以与多芯片模块（MCM）一起使用，允许一个或多个模具的简单的器件返工，而不会影响同一基板上的其他裸片。

49. 发明申请

US20070158395A1 METHOD FOR PREPARING AND ASSEMBLING A SOLDERED SUBSTRATE 审中-公开
标题翻译：制造和组装已焊接基板的方法
公开(公告)号：US20070158395A1
公开(公告)日：2007-07-12
申请号：US11306779
申请日：2006-01-11
申请人： Benjamin V. Fasano , Mario J. Interrante
发明人： Benjamin V. Fasano , Mario J. Interrante
IPC分类号： B23K31/02
CPC分类号： B23K1/0008 , B23K2101/42
摘要： A method to form solder microsockets on a first substrate (for example a chip carrier) so that when the first substrate is aligned with a second substrate having shaped solder elements (for example a semiconductor device), the shaped solder elements fit into the solder microsockets. At least one of the aligned solder elements and solder microsockets may be reflowed to effect joining of the first and second substrates.
摘要翻译：一种在第一衬底（例如芯片载体）上形成焊料微插座的方法，使得当第一衬底与具有成形焊料元件（例如半导体器件）的第二衬底对准时，成形焊料元件装配到焊料微插槽中。对准的焊料元件和焊料微插座中的至少一个可以回流以实现第一和第二衬底的接合。

50. 发明授权

US06703560B2 Stress resistant land grid array (LGA) module and method of forming the same 有权
标题翻译：耐压地格栅阵列（LGA）模块及其形成方法
公开(公告)号：US06703560B2
公开(公告)日：2004-03-09
申请号：US09838454
申请日：2001-04-19
申请人： Patrick Anthony Coico , James H. Covell , Benjamin V. Fasano , Lewis S. Goldman , Ronald L. Hering , Sundar M. Kamath , Kenneth Charles Marston , Frank Louis Pompeo , Karl J. Puttlitz , Jeffrey Allen Zitz
发明人： Patrick Anthony Coico , James H. Covell , Benjamin V. Fasano , Lewis S. Goldman , Ronald L. Hering , Sundar M. Kamath , Kenneth Charles Marston , Frank Louis Pompeo , Karl J. Puttlitz , Jeffrey Allen Zitz
IPC分类号： H01L2302
CPC分类号： H01L21/50 , H01L23/04 , H01L25/0655 , H01L2224/16 , H01L2224/73253 , H01L2924/00014 , H01L2924/09701 , H01L2924/16152 , H01L2924/3511 , H05K1/0271 , H05K3/301 , H01L2224/0401
摘要： An integrated circuit module, a land grid array module, and a method for forming the module, include a substrate, which mounts one or more chips or discrete electronic components, and a cap for covering the substrate, and including at least one protrusion coupled to the cap for limiting the amount of flexing of the substrate during actuation. The at least one protrusion can be either rigidly fixed to the cap or adjustably inserted through the cap.
摘要翻译：集成电路模块，焊盘栅阵列模块以及用于形成模块的方法包括安装一个或多个芯片或分立电子部件的基板以及用于覆盖基板的盖，并且包括至少一个连接到用于在致动期间限制基板的弯曲量的盖。所述至少一个突起可以刚性地固定到盖上或者可调节地插入通过盖。

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