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41. 发明授权

US08149531B1 Electrostatic discharge protection circuit for magneto-resistive read elements 有权
标题翻译：用于磁阻读取元件的静电放电保护电路
公开(公告)号：US08149531B1
公开(公告)日：2012-04-03
申请号：US12967753
申请日：2010-12-14
申请人： Pantas Sutardja
发明人： Pantas Sutardja
IPC分类号： G11B5/02 , G11B5/39
CPC分类号： G11B5/40
摘要： A read head circuit includes a read element configured to read data stored magnetically on a platter. The read element includes a first terminal and a second terminal. A normally-ON transistor includes a first terminal, a second terminal and a control terminal. The first terminal is directly connected to the first terminal of the read element. A second terminal is directly connected to the second terminal of the read element. Responsive to the control terminal being powered, the normally-ON transistor provides an open circuit between the first terminal of the read element and the second terminal of the read element. Responsive to the control terminal not being powered, the normally-ON transistor is configured to short the first terminal of the read element to the second terminal of the read element.
摘要翻译：读头电路包括读取元件，其被配置为读取磁盘上存储在盘上的数据。读取元件包括第一端子和第二端子。常开晶体管包括第一端子，第二端子和控制端子。第一个终端直接连接到读取元素的第一个终端。第二端子直接连接到读取元件的第二端子。响应于控制端子被供电，常开晶体管在读取元件的第一端子和读取元件的第二端子之间提供开路。响应于控制端子未被供电，常开晶体管被配置为将读取元件的第一端子缩短到读取元件的第二端子。

42. 发明申请

US20120042224A1 System and Method for Correcting Errors in Non-Volatile Memory Using Product Codes 有权
标题翻译：使用产品代码校正非易失性存储器中的错误的系统和方法
公开(公告)号：US20120042224A1
公开(公告)日：2012-02-16
申请号：US13280168
申请日：2011-10-24
申请人： Zining Wu , Pantas Sutardja
发明人： Zining Wu , Pantas Sutardja
IPC分类号： G06F11/10
CPC分类号： G11C29/52 , G06F11/1068
摘要： A product code encoder for non-volatile (NV) memory includes a first encoder that encodes data in codewords in a first dimension that is stored in the NV memory. The product code encoder also includes a second encoder that encodes data in codewords in a second dimension that is stored in the NV memory. A product code codeword is based on the codewords in the first dimension and the codewords in the second dimension.
摘要翻译：用于非易失性（NV）存储器的产品代码编码器包括编码存储在NV存储器中的第一维中的码字中的数据的第一编码器。产品代码编码器还包括编码存储在NV存储器中的第二维度中的码字中的数据的第二编码器。产品代码码字基于第一维度中的码字和第二维度中的码字。

43. 发明申请

US20120023284A1 Nonvolatile Memory System 有权
标题翻译：非易失性存储系统
公开(公告)号：US20120023284A1
公开(公告)日：2012-01-26
申请号：US13230624
申请日：2011-09-12
申请人： Zining Wu , Lau Nguyen , Pantas Sutardja , Chi-Kong Lee , Tony Yoon
发明人： Zining Wu , Lau Nguyen , Pantas Sutardja , Chi-Kong Lee , Tony Yoon
IPC分类号： G06F12/00
CPC分类号： G06F3/0688 , G06F3/0619 , G06F3/0661 , G06F11/1068 , G06F12/0246
摘要： A memory system including a nonvolatile memory, and a memory control module. The nonvolatile memory includes a plurality of memory cells arranged among a plurality of physical memory blocks, wherein each physical memory block is of a predetermined size. The memory control module includes a write path module and a read path module. In response to the memory control module receiving data in a first format such that the data is evenly distributable among the plurality of physical memory blocks, the write path module modifies the first format of the data into a second format prior to writing the data to the plurality of physical memory blocks. The second format of the data is such that the data is no longer evenly distributable among the plurality of physical memory blocks. The read path module is configured to read the data from the nonvolatile memory in accordance with the second format.
摘要翻译：一种包括非易失性存储器和存储器控制模块的存储器系统。非易失性存储器包括布置在多个物理存储器块之间的多个存储器单元，其中每个物理存储块具有预定尺寸。存储器控制模块包括写入路径模块和读取路径模块。响应于存储器控制模块以第一格式接收数据使得数据在多个物理存储器块之间可均匀地分配，写入路径模块在将数据写入到第二格式之前将数据的第一格式修改为第二格式多个物理存储器块。数据的第二格式使得数据不再能够在多个物理存储器块之间均匀分配。读路径模块被配置为根据第二格式从非易失性存储器读取数据。

44. 发明授权

US08098452B1 Flying height measurement 有权
标题翻译：飞行高度测量
公开(公告)号：US08098452B1
公开(公告)日：2012-01-17
申请号：US13007315
申请日：2011-01-14
申请人： Pantas Sutardja , Supaket Katchmart , Henri Sutioso , David Liaw
发明人： Pantas Sutardja , Supaket Katchmart , Henri Sutioso , David Liaw
IPC分类号： G11B21/02
CPC分类号： G11B5/6029 , G11B5/6005
摘要： Some of the embodiments of the present disclosure provide a disk drive system comprising a disk drive system comprising a disk having a track upon a surface of the disk, the track including a first data-storing sector and a second data storing sector, and a servo sector located between the first data-storing sector and the second data-storing sector, the servo sector including a first flying height (FH) field having a predetermined pattern. Other embodiments are also described and claimed.
摘要翻译：本公开的一些实施例提供了一种磁盘驱动器系统，其包括磁盘驱动器系统，该磁盘驱动器系统包括具有在磁盘表面上的磁道的磁盘，该磁道包括第一数据存储扇区和第二数据存储扇区，以及伺服位于第一数据存储扇区和第二数据存储扇区之间的扇区，所述伺服扇区包括具有预定模式的第一飞行高度（FH）场。还描述和要求保护其他实施例。

45. 发明授权

US08098447B1 Method and apparatus to limit DC-level in coded data 有权
标题翻译：限制编码数据中直流电平的方法和装置
公开(公告)号：US08098447B1
公开(公告)日：2012-01-17
申请号：US12022131
申请日：2008-01-29
申请人： Mats Oberg , Pantas Sutardja
发明人： Mats Oberg , Pantas Sutardja
IPC分类号： G11B5/02
CPC分类号： G11B20/10351 , G11B20/10009 , G11B20/10046 , G11B20/10203 , G11B2020/1457 , H04L25/03866 , H04L25/06
摘要： In a perpendicular magnetic recording system, the data that is being written by the write channel is fed back into the read channel. The read channel processes the data and decides if the written sequence is likely to have very poor DC characteristics. If that is the case, the write channel changes a scrambler seed and rewrites the data using the new scrambler seed. The data may also be inspected for patterns that might cause large baseline wander before being written to disk, i.e., in the write channel. A data sequence may be repeatedly scrambled and encoded until an acceptable level of estimated DC-wander has been achieved. The data sequence may then be written to disk.
摘要翻译：在垂直磁记录系统中，由写通道写入的数据被反馈到读通道。读通道处理数据并确定写入序列是否可能具有非常差的DC特性。如果是这种情况，则写入通道改变加扰器种子并使用新的加扰器种子重写数据。还可以检查数据，以便在写入磁盘之前，即在写入通道中可能导致大的基线漂移的模式。数据序列可以被重复地加扰和编码，直到达到可接受的估计DC漂移水平。然后可以将数据序列写入磁盘。

46. 发明授权

US08081720B1 System and method for controlling gain and timing phase in a presence of a first least mean square filter using a second adaptive filter 有权
标题翻译：用于使用第二自适应滤波器在存在第一最小均方滤波器的情况下控制增益和定时相位的系统和方法
公开(公告)号：US08081720B1
公开(公告)日：2011-12-20
申请号：US12372832
申请日：2009-02-18
申请人： Pantas Sutardja
发明人： Pantas Sutardja
IPC分类号： H04L27/06
CPC分类号： H04L25/03019 , H03G3/3036 , H04L25/03038 , H04L27/08 , H04L27/368 , H04L2025/03356
摘要： A communication system includes a variable gain amplifier (VGA) that receives an input signal. An analog-to-digital converter (ADC) receives an output of the VGA. A first filter responsive to an output of the ADC, the first filter includes N tap weight coefficients. A first least mean square (LMS) engine updates the N tap weight coefficients of the first filter. A second filter responsive to an output of the first filter, the second filter including M tap weight coefficients, wherein N is greater than M. An adaptation engine updates a first tap weight coefficient of the second filter based on a value of the first tap weight coefficient for a next sampling time of the input signal, a value of the first tap weight coefficient for a current sampling time of the input signal, a first gain constant, and a change in timing phase error of the first filter.
摘要翻译：通信系统包括接收输入信号的可变增益放大器（VGA）。模拟 - 数字转换器（ADC）接收VGA的输出。响应于ADC的输出的第一滤波器，第一滤波器包括N个抽头加权系数。第一最小均方（LMS）引擎更新第一滤波器的N个抽头加权系数。响应于第一滤波器的输出的第二滤波器，第二滤波器包括M抽头权重系数，其中N大于M.适配引擎基于第一抽头权重的值来更新第二滤波器的第一抽头加权系数输入信号的下一个采样时间的系数，第一抽头加权系数，输入信号的当前采样时间的值，第一增益常数和第一滤波器的定时相位误差的变化。

47. 发明授权

US08055979B2 Flash memory with coding and signal processing 有权
标题翻译：具有编码和信号处理的闪存
公开(公告)号：US08055979B2
公开(公告)日：2011-11-08
申请号：US11598178
申请日：2006-11-08
申请人： Zining Wu , Pantas Sutardja
发明人： Zining Wu , Pantas Sutardja
IPC分类号： G11C29/00
CPC分类号： G06F11/1072 , G06F11/1068 , G11C7/1006 , G11C7/16 , G11C11/56 , G11C29/00 , G11C2029/0411 , G11C2211/5641
摘要： A solid state non-volatile memory unit includes, in part, an encoder, a multi-level solid state non-volatile memory array adapted to store data encoded by the encoder, and a decoder adapted to decode the data retrieved from the memory array. The memory array may be a flash EEPROM array. The memory unit optionally includes a modulator and a demodulator. The data modulated by the modulator is stored in the memory array. The demodulator demodulates the modulated data retrieved from the memory array.
摘要翻译：固态非易失性存储器单元部分地包括编码器，适用于存储由编码器编码的数据的多级固态非易失性存储器阵列，以及适于对从存储器阵列检索的数据进行解码的解码器。存储器阵列可以是闪存EEPROM阵列。存储器单元可选地包括调制器和解调器。由调制器调制的数据被存储在存储器阵列中。解调器解调从存储器阵列检索的调制数据。

48. 发明授权

US08054715B1 Track counting system and method for recordable optical media 有权
标题翻译：跟踪计数系统和可记录光学介质的方法
公开(公告)号：US08054715B1
公开(公告)日：2011-11-08
申请号：US11710759
申请日：2007-02-26
申请人： Pantas Sutardja
发明人： Pantas Sutardja
IPC分类号： G11B7/00
CPC分类号： G11B7/08541
摘要： A tracking system for an optical drive includes a focus error module. The focus error module generates a focus error signal based on a difference between a first sensor output signal and a second sensor output signal, which are based on a reflected portion of a laser beam that is reflected by an optical storage medium. A control module generates a tracking signal based on the focus error signal.
摘要翻译：用于光学驱动器的跟踪系统包括聚焦误差模块。聚焦误差模块基于第一传感器输出信号和第二传感器输出信号之间的差产生聚焦误差信号，其基于由光存储介质反射的激光束的反射部分。控制模块基于聚焦误差信号产生跟踪信号。

49. 发明申请

US20110266976A1 System and Method of Tuning Current for LEDs 审中-公开
标题翻译：调节LED电流的系统和方法
公开(公告)号：US20110266976A1
公开(公告)日：2011-11-03
申请号：US13099042
申请日：2011-05-02
申请人： Wanfeng Zhang , Pantas Sutardja
发明人： Wanfeng Zhang , Pantas Sutardja
IPC分类号： H05B37/02
CPC分类号： H05B33/0845 , H05B33/086 , H05B37/0263
摘要： An apparatus includes a LED and a regulator circuit. The regulator circuit controls the current provided to the LED according to a calibration signal that is coupled to the current. The regulator circuit adjusts the output of the LED when the calibration signal is adjusted. In this manner, the LED may be calibrated to generate light at a desired brightness level and color level.
摘要翻译：一种装置包括LED和调节器电路。调节器电路根据耦合到电流的校准信号控制提供给LED的电流。当调节校准信号时，调节器电路调节LED的输出。以这种方式，可以校准LED以产生所需亮度级和色彩级的光。

50. 发明授权

US08030215B1 Method for creating ultra-high-density holes and metallization 有权
标题翻译：用于产生超高密度孔和金属化的方法
公开(公告)号：US08030215B1
公开(公告)日：2011-10-04
申请号：US12362405
申请日：2009-01-29
申请人： Pantas Sutardja , Runzi Chang
发明人： Pantas Sutardja , Runzi Chang
IPC分类号： H01L21/00
CPC分类号： H01L21/76802 , H01L21/76831 , H01L45/144 , H01L45/1625 , H01L45/1683
摘要： Methods and apparatuses directed to high density holes and metallization are described herein. A method may include providing a dielectric layer including a plurality of holes, forming a fill material over a top surface of the dielectric layer and in the plurality of holes, and reflowing the fill material to substantially remove any voids in the plurality of holes. Other embodiments are also described.
摘要翻译：本文描述了针对高密度孔和金属化的方法和装置。方法可以包括提供包括多个孔的电介质层，在电介质层的顶表面和多个孔中形成填充材料，并且回流填充材料以基本上去除多个孔中的任何空隙。还描述了其它实施例。

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