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    • 42. 发明授权
    • Communication control method and apparatus
    • 通信控制方法和装置
    • US5526161A
    • 1996-06-11
    • US262274
    • 1994-06-20
    • Noriyuki SuzukiKazutoshi ShimadaEisaku TatsumiShinichi SunakawaKatsuhiko Nagasaki
    • Noriyuki SuzukiKazutoshi ShimadaEisaku TatsumiShinichi SunakawaKatsuhiko Nagasaki
    • H04B10/00H04B10/077H04B10/11H04B10/116H04B10/54H04B10/548
    • H04B10/1143
    • A communication apparatus transmits a test message in one direction by the transmitting unit having narrow directivity capable of changing the transmitting direction, and an indication message which indicates that the test message is being transmitted by a transmitting unit having non directivity. Accordingly, the indication message is transmitted at least to the communicating party's apparatus. Subsequently, the transmitting direction of the test message is sequentially changed, and a similar process is performed. When the communicating party's apparatus detects a reception of the indication message, information indicating a level of the test message is transmitted to the transmitting apparatus as a response. The communication apparatus at the transmitting side detects the direction where the communicating party exists by receiving the information indicating the level. Hereinafter, the information communication is performed to adjust the transmitting unit of narrow directivity to the determined direction.
    • 通信装置通过具有能够改变发送方向的窄方向性的发送单元向一个方向发送测试消息,以及指示由具有非方向性的发送单元正在发送测试消息的指示消息。 因此,指示消息至少传送到通信方的装置。 随后,测试消息的发送方向被顺序地改变,并且执行类似的处理。 当通信方的装置检测到指示消息的接收时,作为响应将指示测试消息的级别的信息作为响应发送到发送装置。 发送侧的通信装置通过接收表示电平的信息来检测通信方存在的方向。 在下文中,执行信息通信以将指向性的发送单位调整到确定的方向。
    • 43. 发明授权
    • Memory control device
    • 内存控制装置
    • US5477490A
    • 1995-12-19
    • US289259
    • 1994-08-11
    • Hirotomo MiyawakiNoriyuki SuzukiShigeatsu SamukawaMasahiro ShiraiNaomi Ikeda
    • Hirotomo MiyawakiNoriyuki SuzukiShigeatsu SamukawaMasahiro ShiraiNaomi Ikeda
    • G06F12/02G11C7/00H04Q11/04G11C8/00
    • G11C7/00
    • An elastic memory determines an amount of delay of input data relative to other input data according to a phase difference between synchronous pulses each indicating a header of a frame of the associated input data. The elastic memory thus synchronizes both input data in the channel level. Both input data are time-division multiplied by a first multiplier. On the other hand, each counter receives synchronous pulses and thereby counting up to make a ROM produce address value of which order is determined previously according to the counted value. These address values are multiplied by a second multiplier. A decoder controls a RAM, a high-impedance control unit and a flip-flop to write in and read out of the RAM the input data. The read data are divided by a signal restoring device.
    • 弹性存储器根据同步脉冲之间的相位差确定输入数据相对于其他输入数据的延迟量,每个同步脉冲指示相关联的输入数据的帧的标题。 因此,弹性存储器使得信道级别中的两个输入数据同步。 两个输入数据都是时分乘以第一乘法器。 另一方面,每个计数器接收同步脉冲,从而向上计数,使得ROM根据计数值产生先前确定了顺序的地址值。 这些地址值乘以第二乘法器。 解码器控制RAM,高阻抗控制单元和触发器来写入和读出RAM中的输入数据。 读取的数据由信号恢复装置分割。