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41. 发明申请

US20070182014A1 Semiconductor device and method for manufacturing same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070182014A1
公开(公告)日：2007-08-09
申请号：US11702074
申请日：2007-02-05
申请人： Tatsuya Usami , Koichi Ohto
发明人： Tatsuya Usami , Koichi Ohto
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/53238 , H01L21/76832 , H01L21/76834 , H01L21/76838 , H01L2924/0002 , H01L2924/00
摘要： An improved migration resistance of the interconnect is provided and a diffusion of silicon into the inside of the interconnect is suppressed. A semiconductor device includes a silicon substrate, a first insulating film provided on the silicon substrate and composed of an SiCN film, an SiOC film and an SiO2 film, and a first copper interconnect provided in the first insulating film and essentially composed of a copper-containing metal. An Si—O unevenly distributed layer doped with injected silicon is included in the vicinity of the surface in the inside of the first copper interconnect, and injected atomic silicon at least partially creates Si—O bond.
摘要翻译：提供了互连的改进的耐迁移电阻，并且抑制了硅扩散到互连的内部。半导体器件包括硅衬底，设置在硅衬底上并由SiCN膜，SiOC膜和SiO 2膜构成的第一绝缘膜，以及设置在第一绝缘层中的第一铜互连并且基本上由含铜金属组成。掺杂有注入硅的Si-O不均匀分布层包含在第一铜互连内部表面附近，并且注入的原子硅至少部分地形成Si-O键。

42. 发明申请

US20080237793A1 Semiconductor device having projection on lower electrode and method for forming the same 失效
标题翻译：具有在下电极上的投影的半导体器件及其形成方法
公开(公告)号：US20080237793A1
公开(公告)日：2008-10-02
申请号：US12073545
申请日：2008-03-06
申请人： Daisuke Oshida , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
发明人： Daisuke Oshida , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
IPC分类号： H01L29/00 , H01L21/20
CPC分类号： H01L28/84
摘要： A method of forming a semiconductor device, includes forming a lower electrode including a metal and a nitrogen on a semiconductor substrate, irradiating a reducing gas to a surface of the lower electrode, and irradiating a gas containing silicon to the surface of the lower electrode to form a projection containing silicide by reacting the metal with the silicon in an island shape on the surface of the lower electrode. Then, a capacitor film is formed on the lower electrode and the projection, and an upper electrode is formed on the capacitor film.
摘要翻译：一种形成半导体器件的方法，包括在半导体衬底上形成包括金属和氮的下电极，将还原气体照射到下电极的表面，并将含硅的气体照射到下电极的表面，以通过在下电极的表面上使金属与岛状的硅反应形成包含硅化物的突起。然后，在下电极和突起上形成电容器膜，并且在电容器膜上形成上电极。

43. 发明申请

US20080217737A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080217737A1
公开(公告)日：2008-09-11
申请号：US11971925
申请日：2008-01-10
申请人： Daisuke OSHIDA , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
发明人： Daisuke OSHIDA , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
IPC分类号： H01L21/02 , H01L29/92
CPC分类号： H01L23/53238 , H01L21/76826 , H01L21/76829 , H01L21/76834 , H01L21/76883 , H01L21/76886 , H01L23/5223 , H01L23/5329 , H01L23/53295 , H01L28/60 , H01L2924/0002 , Y10S438/937 , H01L2924/00
摘要： A semiconductor device including: a substrate; an insulating film formed over the substrate; a copper interconnect, having a plurality of hillocks formed over the surface thereof, buried in the insulating film; a first insulating interlayer formed over the insulating film and the copper interconnect; a second insulating interlayer formed over the first insulating interlayer; and an electroconductive layer formed over the second insulating interlayer, wherein the top surface of at least one hillock highest of all hillocks is brought into contact with the lower surface of the second insulating interlayer is provided.
摘要翻译：一种半导体器件，包括：衬底; 形成在基板上的绝缘膜; 铜互连，其表面上形成有多个隐藏在绝缘膜中的小丘; 形成在所述绝缘膜和所述铜互连上的第一绝缘夹层; 形成在所述第一绝缘夹层上的第二绝缘夹层; 以及形成在所述第二绝缘中间层上的导电层，其中提供了所有小丘中至少一个小丘的最高顶部表面与所述第二绝缘中间层的下表面接触。

44. 发明申请

US20050159012A1 Semiconductor interconnect structure 有权
标题翻译：半导体互连结构
公开(公告)号：US20050159012A1
公开(公告)日：2005-07-21
申请号：US11068431
申请日：2005-03-01
申请人： Koichi Ohto , Takayuki Matsui
发明人： Koichi Ohto , Takayuki Matsui
IPC分类号： C23C16/30 , C23C16/32 , C23C16/34 , C23C16/36 , H01L21/318 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522 , H01L23/532 , H01L21/302 , H01L21/31
CPC分类号： H01L23/5329 , H01L21/76802 , H01L21/76832 , H01L23/53228 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： In a semiconductor device, an interlevel insulating film formed between a Cu interconnection, formed by damascene, and an upper metal interconnection layer on it has a multilayered structure made up of a Cu diffusion preventive insulating layer and another insulating film. The Cu diffusion preventive insulating layer has a multilayered structure made up of not less than two layers. A method for manufacturing the semiconductor device is also disclosed.
摘要翻译：在半导体器件中，形成在由镶嵌的Cu互连和其上的金属互连层之间形成的层间绝缘膜具有由Cu扩散防止绝缘层和另一绝缘膜构成的多层结构。 Cu扩散防止绝缘层具有不少于两层的多层结构。还公开了一种半导体器件的制造方法。

45. 发明授权

US06879042B2 Semiconductor device and method and apparatus for manufacturing the same 有权
标题翻译：半导体装置及其制造方法和装置
公开(公告)号：US06879042B2
公开(公告)日：2005-04-12
申请号：US09883370
申请日：2001-06-19
申请人： Koichi Ohto , Takayuki Matsui
发明人： Koichi Ohto , Takayuki Matsui
IPC分类号： C23C16/30 , C23C16/32 , C23C16/34 , C23C16/36 , H01L21/318 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/522 , H01L23/532 , H01L23/053
CPC分类号： H01L23/5329 , H01L21/76802 , H01L21/76832 , H01L23/53228 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： In a semiconductor device, an interlevel insulating film formed between a Cu interconnection, formed by damascene, and an upper metal interconnection layer on it has a multilayered structure made up of a Cu diffusion preventive insulating layer and another insulating film. The Cu diffusion preventive insulating layer has a multilayered structure made up of not less than two layers. A method for manufacturing the semiconductor device is also disclosed.
摘要翻译：在半导体器件中，形成在由镶嵌的Cu互连和其上的金属互连层之间形成的层间绝缘膜具有由Cu扩散防止绝缘层和另一绝缘膜构成的多层结构。 Cu扩散防止绝缘层具有不少于两层的多层结构。还公开了一种半导体器件的制造方法。

46. 发明授权

US08486836B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08486836B2
公开(公告)日：2013-07-16
申请号：US13228123
申请日：2011-09-08
申请人： Daisuke Oshida , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
发明人： Daisuke Oshida , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
IPC分类号： H01L21/02
CPC分类号： H01L23/53238 , H01L21/76826 , H01L21/76829 , H01L21/76834 , H01L21/76883 , H01L21/76886 , H01L23/5223 , H01L23/5329 , H01L23/53295 , H01L28/60 , H01L2924/0002 , Y10S438/937 , H01L2924/00
摘要： A semiconductor device including: a substrate; an insulating film formed over the substrate; a copper interconnect, having a plurality of hillocks formed over the surface thereof, buried in the insulating film; a first insulating interlayer formed over the insulating film and the copper interconnect; a second insulating interlayer formed over the first insulating interlayer; and an electroconductive layer formed over the second insulating interlayer, wherein the top surface of at least one hillock highest of all hillocks is brought into contact with the lower surface of the second insulating interlayer is provided.
摘要翻译：一种半导体器件，包括：衬底; 形成在基板上的绝缘膜; 铜互连，其表面上形成有多个隐藏在绝缘膜中的小丘; 形成在所述绝缘膜和所述铜互连上的第一绝缘夹层; 形成在所述第一绝缘夹层上的第二绝缘夹层; 以及形成在所述第二绝缘中间层上的导电层，其中提供了所有小丘中至少一个小丘的最高顶部表面与所述第二绝缘中间层的下表面接触。

47. 发明授权

US08030737B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08030737B2
公开(公告)日：2011-10-04
申请号：US11971925
申请日：2008-01-10
申请人： Daisuke Oshida , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
发明人： Daisuke Oshida , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
IPC分类号： H01L21/02 , H01L29/92
CPC分类号： H01L23/53238 , H01L21/76826 , H01L21/76829 , H01L21/76834 , H01L21/76883 , H01L21/76886 , H01L23/5223 , H01L23/5329 , H01L23/53295 , H01L28/60 , H01L2924/0002 , Y10S438/937 , H01L2924/00
摘要： A semiconductor device including: a substrate; an insulating film formed over the substrate; a copper interconnect, having a plurality of hillocks formed over the surface thereof, buried in the insulating film; a first insulating interlayer formed over the insulating film and the copper interconnect; a second insulating interlayer formed over the first insulating interlayer; and an electroconductive layer formed over the second insulating interlayer, wherein the top surface of at least one hillock highest of all hillocks is brought into contact with the lower surface of the second insulating interlayer is provided.
摘要翻译：一种半导体器件，包括：衬底; 形成在基板上的绝缘膜; 铜互连，其表面上形成有多个隐藏在绝缘膜中的小丘; 形成在所述绝缘膜和所述铜互连上的第一绝缘夹层; 形成在所述第一绝缘夹层上的第二绝缘夹层; 以及形成在所述第二绝缘中间层上的导电层，其中提供了所有小丘中至少一个小丘的最高顶部表面与所述第二绝缘中间层的下表面接触。

48. 发明授权

US07119441B2 Semiconductor interconnect structure 有权
标题翻译：半导体互连结构
公开(公告)号：US07119441B2
公开(公告)日：2006-10-10
申请号：US11068431
申请日：2005-03-01
申请人： Koichi Ohto , Takayuki Matsui
发明人： Koichi Ohto , Takayuki Matsui
IPC分类号： H01L23/52 , H01L29/40 , H01L23/48
CPC分类号： H01L23/5329 , H01L21/76802 , H01L21/76832 , H01L23/53228 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： In a semiconductor device, an interlevel insulating film formed between a Cu interconnection, formed by damascene, and an upper metal interconnection layer on it has a multilayered structure made up of a Cu diffusion preventive insulating layer and another insulating film. The Cu diffusion preventive insulating layer has a multilayered structure made up of not less than two layers. A method for manufacturing the semiconductor device is also disclosed.
摘要翻译：在半导体器件中，形成在由镶嵌的Cu互连和其上的金属互连层之间形成的层间绝缘膜具有由Cu扩散防止绝缘层和另一绝缘膜构成的多层结构。 Cu扩散防止绝缘层具有不少于两层的多层结构。还公开了一种半导体器件的制造方法。

49. 发明授权

US07897475B2 Semiconductor device having projection on lower electrode and method for forming the same 失效
标题翻译：具有在下电极上的投影的半导体器件及其形成方法
公开(公告)号：US07897475B2
公开(公告)日：2011-03-01
申请号：US12073545
申请日：2008-03-06
申请人： Daisuke Oshida , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
发明人： Daisuke Oshida , Toshiyuki Takewaki , Takuji Onuma , Koichi Ohto
IPC分类号： H01L21/20
CPC分类号： H01L28/84
摘要： A method of forming a semiconductor device, includes forming a lower electrode including a metal and a nitrogen on a semiconductor substrate, irradiating a reducing gas to a surface of the lower electrode, and irradiating a gas containing silicon to the surface of the lower electrode to form a projection containing silicide by reacting the metal with the silicon in an island shape on the surface of the lower electrode. Then, a capacitor film is formed on the lower electrode and the projection, and an upper electrode is formed on the capacitor film.
摘要翻译：一种形成半导体器件的方法，包括在半导体衬底上形成包括金属和氮的下电极，将还原气体照射到下电极的表面，并将含硅的气体照射到下电极的表面，以通过在下电极的表面上使金属与岛状的硅反应形成包含硅化物的突起。然后，在下电极和突起上形成电容器膜，并且在电容器膜上形成上电极。

50. 发明授权

US06335277B2 Method for forming metal nitride film 失效
标题翻译：形成金属氮化物膜的方法
公开(公告)号：US06335277B2
公开(公告)日：2002-01-01
申请号：US09318807
申请日：1999-05-26
申请人： Koichi Ohto
发明人： Koichi Ohto
IPC分类号： H01L2144
CPC分类号： H01L21/76864 , H01L21/28556 , H01L21/76843 , H01L21/76856
摘要： A method for forming a titanium nitride film of an excellent quality on a semiconductor substrate at a low temperature is achieved. With a heated semiconductor substrate on a susceptor held at a temperature of about 500° C., titanium tetrachloride and ammonia are introduced into a reactor to carry out the deposition of the titanium nitride film. After the deposition is completed, the semiconductor substrate within the reactor is continuously held at a temperature of 500° C. After a low pressure mercury lamp is turned on, while the inner part of the reactor is irradiated with ultraviolet rays with a wavelength of 170-280 nm emitted from the lamp, an ammonia gas is introduced, with the flow rate adjusted to about 1000 sccm, into the reactor held at a pressure of about 10 Torr to carry out annealing in an ammonia atmosphere for about 60 seconds.
摘要翻译：实现了在低温下在半导体基板上形成质量优异的氮化钛膜的方法。在保持在约500℃的温度下的基座上加热半导体衬底，将四氯化钛和氨引入反应器中以进行氮化钛膜的沉积。沉积完成后，反应器内的半导体衬底被连续地保持在500℃的温度。在低压汞灯开启之后，反应器的内部用紫外线照射波长为170 -280nm，将流量调节至约1000sccm的氨气引入保持在约10托的压力下的反应器中，以在氨气氛中进行退火约60秒。

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