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    • 45. 发明申请
    • Inverter circuit for discharge lamps for multi-lamp lighting and surface light source system
    • 用于多灯照明和表面光源系统的放电灯的逆变电路
    • US20080036393A1
    • 2008-02-14
    • US11898902
    • 2007-09-17
    • Masakazu UshijimaKoji KawamotoYouichi YamamotoMinoru Kijima
    • Masakazu UshijimaKoji KawamotoYouichi YamamotoMinoru Kijima
    • H05B41/24H05B37/02
    • H05B41/2822
    • An inverter circuit for discharge lamps for multi-lamp lighting in which the value of a negative resistance characteristic of a fluorescent lamp is controlled, and an excessively set reactance is eliminated by causing a shunt transformer to have a reactance exceeding the negative resistance characteristic. Two coils connected to a secondary winding of a step-up transformer of the inverter circuit are arranged and magnetically coupled to each other to form a shunt transformer for shunting current such that magnetic fluxes generated thereby cancel each other out. Discharge lamps are connected to the coils, respectively, with currents flowing therethrough being balanced. Each discharge lamp is lighted because a reactance of an inductance related to the balancing operation which is in an operating frequency of the inverter circuit, exceeds a negative resistance of the discharge lamps.
    • 一种用于多灯照明的放电灯的逆变器电路,其中荧光灯的负电阻特性的值被控制,并且通过使分流变压器具有超过负电阻特性的电抗而消除过大的电抗。 连接到逆变器电路的升压变压器的次级绕组的两个线圈被布置并彼此磁耦合以形成用于分流电流的并联变压器,使得由此产生的磁通相互抵消。 放电灯分别连接到线圈,其中流过的电流是平衡的。 由于与在逆变器电路的工作频率中的平衡动作相关的电感的电抗超过放电灯的负电阻,所以放电灯点亮。
    • 50. 发明授权
    • Address translation buffer system and method for invalidating address
translation buffer, the address translation buffer partitioned into
zones according to a computer attribute
    • 地址转换缓冲器系统和方法,使地址转换缓冲区无效,地址转换缓冲区根据计算机属性划分为区域
    • US5924127A
    • 1999-07-13
    • US714395
    • 1996-09-16
    • Koji KawamotoHiromichi KainohKuniki Tohbaru
    • Koji KawamotoHiromichi KainohKuniki Tohbaru
    • G06F12/10
    • G06F12/1036
    • An address translation buffer system in which a searching time of an address translation buffer is shortened. The address translation buffer includes an address translation buffer connected to a translation table for translating a virtual address to a real address, the address translation buffer containing a plurality of columns holding a plurality of entries each having a pair of the virtual address and the real address translated based on the translation table and also having a virtual machine classification indicative of a type of the virtual address, a plurality of column control circuits for specifying columns of the address translation buffer with a combination of a lower part of the virtual address and the virtual machine classification as an entry, and circuits, in accordance with an invalidation instruction for purging one of the entries of the address translation buffer, for searching one of the columns of the address translation buffer having one of the entries of the address translation buffer coincided with the virtual machine classification entry of the invalidation instruction and for invalidating the entry including a specified field. It is unnecessary to search a group of columns having values other than the specified virtual machine classification.
    • 一种地址转换缓冲器系统,其中地址转换缓冲器的搜索时间缩短。 地址转换缓冲器包括连接到用于将虚拟地址转换为实际地址的转换表的地址转换缓冲器,地址转换缓冲器包含多个列,每个列保存多个条目,每个条目具有一对虚拟地址和实际地址 基于所述翻译表转换并且还具有指示所述虚拟地址的类型的虚拟机分类;多个列控制电路,用于指定所述虚拟地址的下半部分与所述虚拟地址的组合的所述地址转换缓冲器的列 机器分类作为条目,并且根据用于清除地址转换缓冲器中的一个条目的无效指令,用于搜索具有地址转换缓冲器的一个条目的地址转换缓冲器的一列中的一个与 无效化指令的虚拟机分类条目a nd使包含指定字段的条目无效。 无需搜索具有指定虚拟机分类以外的值的一组列。