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41. 发明申请

US20110121459A1 SEMICONDUCTOR INTERCONNECTION 审中-公开
公开(公告)号：US20110121459A1
公开(公告)日：2011-05-26
申请号：US13003181
申请日：2009-07-10
申请人： Takashi Onishi , Masao Mizuno , Hirotaka Ito , Kazuyuki Kohama , Kazuhiro Ito , Susumu Tsukimoto , Masanori Murakami
发明人： Takashi Onishi , Masao Mizuno , Hirotaka Ito , Kazuyuki Kohama , Kazuhiro Ito , Susumu Tsukimoto , Masanori Murakami
IPC分类号： H01L23/535
CPC分类号： H01L21/76843 , H01L21/2855 , H01L21/76867 , H01L23/53238 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： Provided is a semiconductor interconnection wherein a barrier layer different from a TiO2 layer is formed on an interface between an insulating film and a Cu interconnection without increasing electrical resistivity of the Cu interconnection. In the semiconductor interconnection, a Cu interconnection containing Ti is embedded in a trench arranged on an insulating film on the semiconductor substrate, and a TiC layer is formed between the insulating film and the Cu interconnection. The insulating film is preferably composed of SiCO or SiCN. The thickness of the TiC layer is preferably 3-30 nm.
摘要翻译：提供了一种半导体互连，其中在绝缘膜和Cu互连之间的界面上形成不同于TiO 2层的阻挡层，而不增加Cu互连的电阻率。在半导体互连中，包含Ti的Cu互连嵌入设置在半导体衬底上的绝缘膜上的沟槽中，并且在绝缘膜和Cu互连之间形成TiC层。绝缘膜优选由SiCO或SiCN构成。 TiC层的厚度优选为3-30nm。

42. 发明授权

US07528801B2 Driving method of plasma display panel and driving apparatus thereof, and plasma display 失效
标题翻译：等离子体显示面板及其驱动装置的驱动方法以及等离子显示器
公开(公告)号：US07528801B2
公开(公告)日：2009-05-05
申请号：US11104264
申请日：2005-04-11
申请人： Kazuhiro Ito , Tae-Kyoung Kang , Byung-Gwon Cho
发明人： Kazuhiro Ito , Tae-Kyoung Kang , Byung-Gwon Cho
IPC分类号： G09G3/28
CPC分类号： G09G3/2022 , G09G3/2927 , G09G3/293 , G09G3/296
摘要： A driving method of a plasma display panel including a discharge space defined by a plurality of scan electrodes, a plurality of sustain electrodes and a plurality of address electrodes for preventing or reducing a misfiring address discharge. In the driving method, a low scan pulse voltage, which is lower than a low scan pulse voltage applied to a previously addressed scan electrode, is applied to a scan electrode which is scanned later in an address period. A low scan pulse voltage applied in an address period of a subfield having a sub-reset period is established to be lower than a low scan pulse voltage applied in an address period of a subfield having a main reset period.
摘要翻译：一种等离子体显示面板的驱动方法，其包括由多个扫描电极，多个维持电极和多个寻址电极限定的放电空间，用于防止或减少不发火寻址放电。在驱动方法中，向施加到先前寻址的扫描电极的低扫描脉冲电压的低扫描脉冲电压施加到在寻址周期中稍后扫描的扫描电极。在具有副复位周期的子场的地址周期中施加的低扫描脉冲电压被建立为低于在具有主复位周期的子场的寻址周期中施加的低扫描脉冲电压。

43. 发明授权

US07511707B2 Method and circuit for driving a plasma display panel and a plasma display device 失效
标题翻译：用于驱动等离子体显示面板和等离子体显示装置的方法和电路
公开(公告)号：US07511707B2
公开(公告)日：2009-03-31
申请号：US11133478
申请日：2005-05-18
申请人： Kazuhiro Ito , Jun-Hyung Kim , Byung-Gwon Cho
发明人： Kazuhiro Ito , Jun-Hyung Kim , Byung-Gwon Cho
IPC分类号： G09G5/00
CPC分类号： G09G3/291 , G09G3/2927 , G09G3/294 , G09G3/2942 , G09G3/2965 , G09G2300/0426 , G09G2310/066
摘要： According to an exemplary driving method of a plasma display panel of the present invention, waveforms having a reset function, an address function, and a sustain discharge function are applied to a scan electrode while sustain electrodes are biased at a ground voltage. A board for driving the sustain electrodes and a switch for supplying a ground voltage is eliminated and accordingly manufacturing cost of driving boards is reduced. Various circuits for generating the desirable waveforms and simplifications that do not compromise the effectiveness of the circuits are also presented.
摘要翻译：根据本发明的等离子体显示面板的示例性驱动方法，在扫描电极施加具有复位功能，地址功能和维持放电功能的波形，同时维持电极被偏置在接地电压。消除用于驱动维持电极的电路板和用于提供接地电压的开关，因此降低了驱动板的制造成本。还提出了用于产生不损害电路的有效性的期望波形和简化的各种电路。

44. 发明申请

US20080014743A1 METHOD OF FABRICATING SEMICONDUCTOR INTERCONNECTIONS 失效
标题翻译：制造半导体互连的方法
公开(公告)号：US20080014743A1
公开(公告)日：2008-01-17
申请号：US11765006
申请日：2007-06-19
申请人： Takashi Onishi , Mikako Takeda , Masao Mizuno , Susumu Tsukimoto , Tatsuya Kabe , Toshifumi Morita , Miki Moriyama , Kazuhiro Ito , Masanori Murakami
发明人： Takashi Onishi , Mikako Takeda , Masao Mizuno , Susumu Tsukimoto , Tatsuya Kabe , Toshifumi Morita , Miki Moriyama , Kazuhiro Ito , Masanori Murakami
IPC分类号： H01L21/768
CPC分类号： H01L21/76843 , H01L21/76864 , H01L21/76867
摘要： A method of fabricating semiconductor interconnections is provided which can form a Ti-rich layer as a barrier layer and which can embed pure Cu material as interconnection material into every corner of grooves provided in an insulating film even when the grooves have a narrow minimum width and are deep. The method may include the steps of forming one or more grooves in an insulating film on a semiconductor substrate, the recess having a minimum width of 0.15 μm or less and a ratio of a depth of the groove to the minimum width thereof (depth/minimum width) of 1 or more, forming a Cu alloy thin film containing 0.5 to 10 atomic % of Ti in the groove of the insulated film along a shape of the groove in a thickness of 10 to 50 nm, forming a pure Cu thin film in the groove with the Cu alloy thin film attached thereto, and annealing the substrate with the films at 350° C. or more to allow the Ti to be precipitated between the insulating film and the Cu alloy thin film.
摘要翻译：提供一种制造半导体互连的方法，其可以形成富Ti层作为阻挡层，并且即使当沟槽具有窄的最小宽度时，也可以将纯Cu材料作为互连材料嵌入设置在绝缘膜中的沟槽的每个角落，并且很深该方法可以包括以下步骤：在半导体衬底上的绝缘膜中形成一个或多个凹槽，凹槽具有0.15μm或更小的最小宽度以及凹槽的深度与其最小宽度的比（深度/最小值宽度）为1以上，沿着形状为10〜50nm的槽的形状，在绝缘膜的槽内形成含有0.5〜10原子％的Ti的Cu合金薄膜，形成纯Cu薄膜与Cu合金薄膜连接的槽，并使膜在350℃以上退火，使Ti在绝缘膜与Cu合金薄膜之间析出。

45. 发明申请

US20070218690A1 FABRICATION METHOD FOR SEMICONDUCTOR INTERCONNECTIONS 有权
标题翻译：半导体互连的制造方法
公开(公告)号：US20070218690A1
公开(公告)日：2007-09-20
申请号：US11532796
申请日：2006-09-18
申请人： Takashi Onishi , Masao Mizuno , Mikako Takeda , Susumu Tsukimoto , Tatsuya Kabe , Toshifumi Morita , Miki Moriyama , Kazuhiro Ito , Masanori Murakami
发明人： Takashi Onishi , Masao Mizuno , Mikako Takeda , Susumu Tsukimoto , Tatsuya Kabe , Toshifumi Morita , Miki Moriyama , Kazuhiro Ito , Masanori Murakami
IPC分类号： H01L21/44
CPC分类号： H01L21/76882 , H01L21/76843 , H01L21/76867 , H01L23/53233 , H01L2924/0002 , H01L2924/00
摘要： There is provided a fabrication method for interconnections, capable of embedding a Cu-alloy in recesses in an insulating film, and forming a barrier layer on an interface between the an insulating film and Cu-interconnections, without causing a rise in electric resistivity of the interconnections when fabricating semiconductor interconnections of the Cu-alloy embedded in the recesses provided in the insulating film on a semiconductor substrate. The fabrication method for the interconnections may comprise the steps of forming the respective recesses having a minimum width not more than 0.15 μm, and a ratio of a depth thereof to the minimum width (a depth/minimum width ratio) not less than 1, forming a Cu-alloy film containing Ti in a range of 0.5 to 3 at %, and N in a range of 0.4 to 2.0 at % over the respective recesses, and subsequently, annealing the Cu-alloy film to not lower than 200° C., and pressurizing the Cu-alloy film to not less than 50 MPa to thereby embed the Cu-alloy film into the respective recesses.
摘要翻译：提供了一种用于互连的制造方法，其能够将铜合金嵌入绝缘膜中的凹部中，并且在绝缘膜和Cu互连之间的界面上形成阻挡层，而不会导致电阻率的上升当制造嵌入在设置在半导体衬底上的绝缘膜中的凹部中的Cu合金的半导体互连时，互连。互连的制造方法可以包括以下步骤：形成具有不大于0.15μm的最小宽度的相应凹槽，以及其深度与最小宽度（深度/最小宽度比）的比不小于1，形成在各凹部中含有0.5〜3原子％的Ti，N为0.4〜2.0原子％的Ti的Cu合金膜，然后将Cu合金膜退火至200℃以上。并将Cu合金膜加压至50MPa以上，从而将Cu合金膜嵌入各凹部。

46. 发明申请

US20060158388A1 Plasma display device and driving method 审中-公开
标题翻译：等离子显示装置及驱动方法
公开(公告)号：US20060158388A1
公开(公告)日：2006-07-20
申请号：US11301788
申请日：2005-12-12
申请人： Myoung-Kyu Lee , Kazuhiro Ito
发明人： Myoung-Kyu Lee , Kazuhiro Ito
IPC分类号： G09G3/28
CPC分类号： G09G3/2932 , G09G3/2927 , G09G2310/066
摘要： A plasma display device driving method that sets the voltage applied to the sustain electrode in the falling period of the reset period to be higher than the voltage applied to the sustain electrode in the address period. As a result, the address voltage applied to the address electrode in the address period can be reduced.
摘要翻译：等离子体显示装置驱动方法，其将在复位周期的下降周期中施加到维持电极的电压设定为高于在寻址周期中施加到维持电极的电压。结果，可以减少在寻址周期中施加到地址电极的地址电压。

47. 发明申请

US20060071379A1 Liquid-sealed vibration control device 审中-公开
标题翻译：液体密封振动控制装置
公开(公告)号：US20060071379A1
公开(公告)日：2006-04-06
申请号：US10496479
申请日：2003-09-19
申请人： Akihiko Kato , Kazuhiro Ito
发明人： Akihiko Kato , Kazuhiro Ito
IPC分类号： F16F9/00
CPC分类号： F16F13/1409
摘要： One pair of first rubber-like elastomer bodies (27) are interposed between an inner cylinder (1) and an intermediate cylinder (4); one pair of second rubber-like elastomer bodies (37) are interposed between the intermediate cylinder (4) outside the first rubber-like elastomer bodies (27) and an outer cylinder (2); and one pair of liquid chambers (5) and an orifice (6) are formed between the intermediate cylinder (4) and the outer cylinder (2). Further, end walls of the liquid chambers (5) are formed as rubber walls (12); third rubber-like elastomer bodies (11) shorter in length are interposed between the intermediate cylinder (4) on the rear side of the liquid chambers (5) and the inner cylinder (1); and one pair of inclination amount-limiting stoppers (16) for limiting the inclination amount of the outer cylinder (2) to the intermediate cylinder (4) are provided respectively separately between one end of the outer cylinder (2) and one end of the intermediate cylinder, and between the other end of the outer cylinder (2) and the other end of the intermediate cylinder.
摘要翻译：一对第一橡胶状弹性体（27）插入在内筒（1）和中间筒（4）之间; 一对第二橡胶状弹性体（37）插入在第一橡胶状弹性体（27）外侧的中间圆筒（4）和外筒（2）之间。并且在中间气缸（4）和外筒（2）之间形成有一对液体室（5）和孔口（6）。此外，液体室（5）的端壁形成为橡胶壁（12）; 较短长度的第三橡胶状弹性体（11）插入在液体室（5）和内筒（1）的后侧的中间圆筒（4）之间。并且分别在外筒（2）的一端和外筒（2）的一端分别设置一对限制外筒（2）到中间筒（4）的倾斜量的倾斜量限制挡块（16）中间气缸，并且在外筒（2）的另一端和中间气缸的另一端之间。

48. 发明申请

US20060065898A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060065898A1
公开(公告)日：2006-03-30
申请号：US11233113
申请日：2005-09-23
申请人： Masanori Murakami , Teppei Watanabe , Susumu Tsukimoto , Kazuhiro Ito , Jun Ito , Miki Moriyama , Naoki Shibata
发明人： Masanori Murakami , Teppei Watanabe , Susumu Tsukimoto , Kazuhiro Ito , Jun Ito , Miki Moriyama , Naoki Shibata
IPC分类号： H01L29/15
CPC分类号： H01L21/28575 , H01L21/0237 , H01L21/0242 , H01L21/02488 , H01L21/02491 , H01L21/0254 , H01L33/007 , H01L33/12
摘要： In a semiconductor device in which a group III nitride compound semiconductor layer is formed without a low temperature grown buffer layer provided on an undercoat layer formed by a metal nitride layer, the metal nitride layer is formed of reddish brown titanium nitride. The reddish brown titanium nitride can be obtained by causing nitrogen to be rich in the titanium nitride.
摘要翻译：在其中形成III族氮化物化合物半导体层的半导体器件中，没有设置在由金属氮化物层形成的底涂层上的低温生长缓冲层，金属氮化物层由红棕色氮化钛形成。可以通过使氮富含氮化钛来获得微红棕色的氮化钛。

49. 发明申请

US20050264235A1 Plasma display apparatus 失效
标题翻译：等离子显示装置
公开(公告)号：US20050264235A1
公开(公告)日：2005-12-01
申请号：US11140014
申请日：2005-05-26
申请人： Kazuhiro Ito
发明人： Kazuhiro Ito
IPC分类号： G09G3/20 , G09F9/00 , G09F9/313 , G09G3/10 , G09G3/288 , G09G3/291 , G09G3/292 , G09G3/293 , G09G3/294 , G09G3/296 , G09G3/298 , H01J17/16 , H01J17/49
CPC分类号： H01J11/12 , G09G3/294 , G09G3/296 , H01J2211/46
摘要： A plasma display apparatus minimizing the occupying area of the driving boards in the chassis base by using an integrated driving board capable of driving scan electrodes sustain electrodes. A plasma display panel includes: a plurality of first electrodes (sustain electrodes or X electrodes), a plurality of second electrodes (scan electrodes or Y electrodes), a plurality of third electrodes (address electrodes) extending in a direction crossing the plurality of the first and the second electrodes, and a chassis base to which the plasma display panel is fixed. Driving boards are attached on a second side of the chassis base, the driving boards generating a driving voltage and applying the driving voltage to the electrodes. The first electrodes are grounded to the chassis base.
摘要翻译：一种等离子体显示装置，其通过使用能够驱动扫描电极维持电极的集成驱动板来最小化底盘中的驱动板的占据面积。等离子体显示面板包括：多个第一电极（维持电极或X电极），多个第二电极（扫描电极或Y电极），多个第三电极（寻址电极），其沿与多个第一电极第一和第二电极以及固定有等离子体显示面板的底座。驱动板附接在底盘的第二侧上，驱动板产生驱动电压并将驱动电压施加到电极。第一个电极接地到底盘。

50. 发明授权

US6118416A Method of controlling alternating current plasma display panel with positive priming discharge pulse and negative priming discharge pulse 失效
标题翻译：控制交流等离子体显示面板的方法，采用正引脚放电脉冲和负引发放电脉冲
公开(公告)号：US6118416A
公开(公告)日：2000-09-12
申请号：US941203
申请日：1997-09-30
申请人： Tadashi Nakamura , Kazuhiro Ito
发明人： Tadashi Nakamura , Kazuhiro Ito
IPC分类号： G09G3/288 , G09G3/291 , G09G3/292 , G09G3/294 , G09G3/298 , G09G3/28
CPC分类号： G09G3/2927 , G09G3/2932 , G09G2320/0228 , G09G2320/0238
摘要： A plasma display panel produces a visual image through selective firing in indicating cells, and all of the indicating cells are faintly fired in a priming discharge period before the selective firing; a positive pulse and a negative pulse are applied to scanning electrodes and sustain electrodes in such a manner as to be partially overlapped with each other, and the pulse amplitude of each pulse is relatively low so as to prevent data electrodes from undesirable discharge, thereby making the luminance in the priming discharge period small.
摘要翻译：等离子体显示面板通过选择性地烧制指示细胞产生视觉图像，并且所有指示细胞在选择性烧制之前的初始放电期间被微弱地烧制; 将正脉冲和负脉冲施加到扫描电极和维持电极以使其部分重叠，并且每个脉冲的脉冲幅度相对较低，以防止数据电极不期望的放电，从而使得起动放电期间的亮度小。

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