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41. 发明授权

US08516426B2 Vertical power budgeting and shifting for three-dimensional integration 有权
标题翻译：垂直功率预算和三维一体化转移
公开(公告)号：US08516426B2
公开(公告)日：2013-08-20
申请号：US13217429
申请日：2011-08-25
申请人： Pradip Bose , Gary D. Carpenter , Michael S. Floyd , Eren Kursun , Phillip J. Restle , Michael R. Scheuermann
发明人： Pradip Bose , Gary D. Carpenter , Michael S. Floyd , Eren Kursun , Phillip J. Restle , Michael R. Scheuermann
IPC分类号： G06F17/50 , G06F9/455 , G06F11/22
CPC分类号： H01L23/50 , G06F17/5045 , G06F2217/78 , H01L25/0657 , H01L2224/16145 , H01L2225/06513 , H01L2225/06544 , H01L2225/06565
摘要： A method is provided for managing power distribution on a three-dimensional chip stack having two or more strata, a plurality of vertical power delivery structures, and multiple stack components. At least two stack components are on different strata. Operating modes are stored that respectively have different power dissipations. A respective effective power budget is determined for each of the at least two stack components based on respective ones of the operating modes targeted therefor, and power characteristics and thermal characteristics of at least some of the stack components inclusive or exclusive of the at least two stack components. The respective ones of the plurality of operating modes targeted for the at least two stack components are selectively accepted or re-allocated based on the respective effective power budget for each of the at least two stack components, power constraints, and thermal constraints. The power constraints include vertical structure electrical constraints.
摘要翻译：提供了一种用于管理具有两个或更多个层，多个垂直功率传递结构和多个堆叠组件的三维芯片堆叠上的功率分配的方法。至少两个堆叠组件位于不同的层。存储分别具有不同功耗的工作模式。基于针对其的各个操作模式确定所述至少两个堆叠组件中的每一个的相应的有效功率预算，以及包括或排除所述至少两个堆叠的至少一些堆叠组件的功率特性和热特性组件。基于用于至少两个堆叠组件中的每一个，功率约束和热约束的相应的有效功率预算来选择性地接受或重新分配针对至少两个堆叠组件的多个操作模式中的各个操作模式。功率约束包括垂直结构电气约束。

42. 发明授权

US08405413B2 Critical path monitor having selectable operating modes and single edge detection 有权
标题翻译：关键路径监视器具有可选择的操作模式和单边缘检测
公开(公告)号：US08405413B2
公开(公告)日：2013-03-26
申请号：US12861289
申请日：2010-08-23
申请人： Gary D. Carpenter , Alan J. Drake , Michael S. Floyd , Robert M. Senger
发明人： Gary D. Carpenter , Alan J. Drake , Michael S. Floyd , Robert M. Senger
IPC分类号： G01R31/3187
CPC分类号： G01R31/31725
摘要： A critical path monitor having selectable data output modes provides additional information about critical path delay variation. A pulse is propagated through a synthesized path representing a critical path in a functional logic circuit and a synthesized path delay is measured by a monitoring circuit that detects the arrival of an edge of the pulse at the output of the synthesized delay. The measured delay is provided as a real-time output and a processed result of the measured delay is processed according to a data output mode selected from multiple selectable output modes, thereby providing different information describing the real-time data about critical path delay, such as a range of edge positions corresponding to a variation of the critical path delay.
摘要翻译：具有可选数据输出模式的关键路径监视器提供关于关键路径延迟变化的附加信息。脉冲通过表示功能逻辑电路中的关键路径的合成路径传播，合成路径延迟由检测脉冲边缘在合成延迟的输出处的监控电路测量。测量的延迟被提供为实时输出，并且根据从多个可选输出模式中选择的数据输出模式来处理测量的延迟的处理结果，从而提供描述关于关键路径延迟的实时数据的不同信息，例如作为对应于关键路径延迟的变化的边缘位置的范围。

43. 发明申请

US20120200293A1 NON-CONTACT CURRENT AND VOLTAGE SENSING METHOD 审中-公开
标题翻译：非接触式电流和电压传感方法
公开(公告)号：US20120200293A1
公开(公告)日：2012-08-09
申请号：US13451524
申请日：2012-04-19
申请人： Gary D. Carpenter , Wael El-Essawy , Alexandre Peixoto Ferreira , Thomas Walter Keller , Juan C. Rubio , Michael A. Schappert
发明人： Gary D. Carpenter , Wael El-Essawy , Alexandre Peixoto Ferreira , Thomas Walter Keller , Juan C. Rubio , Michael A. Schappert
IPC分类号： G01R33/02
CPC分类号： G01R21/06 , G01R1/22 , G01R15/142 , G01R33/02 , G01R33/072
摘要： A method of measurement using a detachable current and voltage sensor provides an isolated and convenient technique for to measuring current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage.
摘要翻译：使用可拆卸电流和电压传感器的测量方法提供了隔离和方便的技术来测量通过诸如AC分支电路线的导体的电流，以及提供线上静电电位的指示，其可以是用于指示电线上的电压的相位，以及可选的电压幅度。该装置包括壳体，其包含电流和电压传感器，其可以是具有设置在沿着圆周的间隙中的霍尔效应传感器以测量电流的铁氧体磁体，或者替代地，沿着其轴线提供通过气缸的绕组和电容板或配置在铁氧体磁体附近或内部，以提供电压的指示。

44. 发明申请

US20120200291A1 NON-CONTACT CURRENT AND VOLTAGE SENSOR 有权
标题翻译：非接触式电流和电压传感器
公开(公告)号：US20120200291A1
公开(公告)日：2012-08-09
申请号：US13024181
申请日：2011-02-09
申请人： Gary D. Carpenter , Wael El-Essawy , Alexandre Peixoto Ferreira , Thomas Walter Keller , Juan C. Rubio , Michael A. Schappert
发明人： Gary D. Carpenter , Wael El-Essawy , Alexandre Peixoto Ferreira , Thomas Walter Keller , Juan C. Rubio , Michael A. Schappert
IPC分类号： G01R33/02 , G01R1/04
CPC分类号： G01R21/06 , G01R1/22 , G01R15/142 , G01R33/02 , G01R33/072
摘要： A detachable current and voltage sensor provides an isolated and convenient device to measure current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage.
摘要翻译：可拆卸的电流和电压传感器提供隔离和方便的装置来测量通过诸如AC分支电路线的导体的电流，并且提供线上的静电电位的指示，其可以用于指示相位导线上的电压，以及可选的电压幅度。该装置包括壳体，其包含电流和电压传感器，其可以是具有设置在沿着圆周的间隙中的霍尔效应传感器以测量电流的铁氧体磁体，或者替代地，沿着其轴线提供通过气缸的绕组和电容板或配置在铁氧体磁体附近或内部，以提供电压的指示。

45. 发明申请

US20110018511A1 INTEGRATABLE EFFICIENT SWITCHING DOWN CONVERTER 有权
标题翻译：可高效切换转换器
公开(公告)号：US20110018511A1
公开(公告)日：2011-01-27
申请号：US12508235
申请日：2009-07-23
申请人： Gary D. Carpenter , Brian L. Ji , Wonyoung Kim
发明人： Gary D. Carpenter , Brian L. Ji , Wonyoung Kim
IPC分类号： G05F1/10
CPC分类号： H02M3/158
摘要： A converter circuit and methods for operating the same. The converter circuit includes a supply voltage, a capacitor, an inductor, and four stacked switching elements. Each switching element is adjustable from a low resistance state to a high resistance state by a control signal. The inductor outputs current to a circuit load. The circuit may be operated in a first mode such that the output is adjustable between the supply voltage and half the supply voltage. Alternatively, in a second mode of operation, the output is adjustable from half the supply voltage to a ground voltage.
摘要翻译： A转换器电路及其操作方法。转换器电路包括电源电压，电容器，电感器和四个堆叠的开关元件。每个开关元件可通过控制信号从低电阻状态调节到高电阻状态。电感将电流输出到电路负载。电路可以在第一模式下操作，使得输出在电源电压和电源电压的一半之间是可调节的。或者，在第二操作模式中，输出可从电源电压的一半调整到接地电压。

46. 发明授权

US07576569B2 Circuit for dynamic circuit timing synthesis and monitoring of critical paths and environmental conditions of an integrated circuit 失效
标题翻译：用于动态电路定时合成和监控集成电路的关键路径和环境条件的电路
公开(公告)号：US07576569B2
公开(公告)日：2009-08-18
申请号：US11549138
申请日：2006-10-13
申请人： Gary D. Carpenter , Alan J. Drake , Harmander S. Deogun , Michael S. Floyd , Norman K. James , Robert M. Senger
发明人： Gary D. Carpenter , Alan J. Drake , Harmander S. Deogun , Michael S. Floyd , Norman K. James , Robert M. Senger
IPC分类号： G01R29/02 , G06F17/50 , H03K5/22
CPC分类号： G06F17/5031 , G06F17/5036
摘要： A circuit for dynamically monitoring the operation of an integrated circuit under differing temperature, frequency, and voltage (including localized noise and droop), and for detecting early life wear-out mechanisms (e.g., NBTI, hot electrons).
摘要翻译：用于在不同的温度，频率和电压（包括局部噪声和下垂）下动态地监测集成电路的操作以及用于检测早期寿命磨损机制（例如，NBTI，热电子）的电路。

47. 发明授权

US5177374A Current mode gate drive for power MOS transistors 失效
标题翻译：功率MOS晶体管的电流模式门驱动
公开(公告)号：US5177374A
公开(公告)日：1993-01-05
申请号：US592148
申请日：1990-10-03
申请人： Gary D. Carpenter , Martin B. Lundberg
发明人： Gary D. Carpenter , Martin B. Lundberg
IPC分类号： H03F3/30 , H03F3/345 , H03F3/50
CPC分类号： H03F3/505 , H03F3/3455
摘要： A power amplifier having a power MOS transistor output device. The gate drive for the power device is a bidirectional current source. In one form of the gate driver circuit, the bidirectional current source includes the capability of controlling the liimts of the gate current, which in turn controls the slew rate of the power amplifier.

48. 发明授权

US5128568A Self-biasing timing circuit for achieving long time delays 失效
标题翻译：用于实现长时间延迟的自偏转时序电路
公开(公告)号：US5128568A
公开(公告)日：1992-07-07
申请号：US592156
申请日：1990-10-03
申请人： Gary D. Carpenter
发明人： Gary D. Carpenter
IPC分类号： G11B5/596 , G04F1/00 , H03K17/26 , H03K17/28 , H03K17/284
CPC分类号： H03K17/26 , G04F1/005
摘要： A timing circuit in which an output can be held at a certain level or state for a particular time after the circuit is enabled. The time is established by an external resistor and capacitor. The timing circuit is self-biasing to permit operation after associated power supplies have dropped to zero. The timing of the circuit is independent of supply voltage and substantially independent of temperature variations. The timing circuit includes a number of MOSFET's which are diode connected between two nodes, and another MOSFET having a gate and one conduction electrode connected across the two nodes. The voltage between the two nodes at the beginning of the timing interval is the sum of the threshold voltages of the diode connected MOSFET's. At the end of the timing interval, the voltage between the two nodes has fallen to the threshold voltage of the single MOSFET. The timing interval is therefore dependent upon the discharge rate set by the external resistor and capacitor and the ratio of the sum of the threshold voltages of the plurality of MOSFET's to the threshold voltage of the single MOSFET. Relatively long time intervals can be achieved using this circuit with standard surface mount components for the resistor and capacitor. The circuit finds particular use in a disk drive in which a head actuator must be braked for a period of time and then retracted, with the period of time determined in an environment where the disk drive power supplies are falling to zero.

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