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41. 发明授权

US08431999B2 Low capacitance transient voltage suppressor 有权
标题翻译：低电容瞬态电压抑制器
公开(公告)号：US08431999B2
公开(公告)日：2013-04-30
申请号：US13072138
申请日：2011-03-25
申请人： Yu-Shu Shen , Kun-Hsien Lin , Che-Hao Chuang , Ryan Hsin-Chin Jiang
发明人： Yu-Shu Shen , Kun-Hsien Lin , Che-Hao Chuang , Ryan Hsin-Chin Jiang
IPC分类号： H01L23/62 , H01L21/336
CPC分类号： H01L27/0255 , H01L29/861
摘要： A low capacitance transient voltage suppressor is disclosed. The suppressor comprises an N-type heavily doped substrate and an epitaxial layer formed on the substrate. At least one steering diode structure formed in the epitaxial layer comprises a diode lightly doped well and a first P-type lightly doped well, wherein a P-type heavily doped area is formed in the diode lightly doped well and a first N-type heavily doped area and a second P-type heavily doped area are formed in the first P-type lightly doped well. A second P-type lightly doped well having two N-type heavily doped areas is formed in the epitaxial layer. In addition, an N-type heavily doped well and at least one deep isolation trench are formed in the epitaxial layer, wherein the trench has a depth greater than or equal to depths of all the doped wells, so as to separate at least one doped well.
摘要翻译：公开了一种低电容瞬态电压抑制器。抑制器包括N型重掺杂衬底和形成在衬底上的外延层。形成在外延层中的至少一个转向二极管结构包括二极管轻掺杂阱和第一P型轻掺杂阱，其中在二极管轻掺杂阱中形成P型重掺杂区，并且第一N型重掺杂阱在第一P型轻掺杂阱中形成掺杂区域和第二P型重掺杂区域。在外延层中形成具有两个N型重掺杂区的第二P型轻掺杂阱。此外，在外延层中形成N型重掺杂阱和至少一个深隔离沟槽，其中沟槽的深度大于或等于所有掺杂阱的深度，以便分离至少一个掺杂的好。

42. 发明授权

US08237193B2 Lateral transient voltage suppressor for low-voltage applications 有权
标题翻译：用于低压应用的侧向瞬态电压抑制器
公开(公告)号：US08237193B2
公开(公告)日：2012-08-07
申请号：US12837128
申请日：2010-07-15
申请人： Che-Hao Chuang , Kun-Hsien Lin , Ryan Hsin-Chin Jiang
发明人： Che-Hao Chuang , Kun-Hsien Lin , Ryan Hsin-Chin Jiang
IPC分类号： H01L29/06
CPC分类号： H01L27/0255
摘要： A lateral transient voltage suppressor for low-voltage applications. The suppressor includes an N-type heavily doped substrate and at least two clamp diode structures horizontally arranged in the N-type heavily doped substrate. Each clamp diode structure further includes a clamp well arranged in the N-type heavily doped substrate and having a first heavily doped area and a second heavily doped area. The first and second heavily doped areas respectively belong to opposite conductivity types. There is a plurality of deep isolation trenches arranged in the N-type heavily doped substrate and having a depth greater than depth of the clamp well. The deep isolation trenches can separate each clamp well. The present invention avoids the huge leakage current to be suitable for low-voltage application.
摘要翻译：用于低电压应用的横向瞬态电压抑制器。抑制器包括N型重掺杂衬底和水平地布置在N型重掺杂衬底中的至少两个钳位二极管结构。每个钳位二极管结构还包括在N型重掺杂衬底中布置的具有第一重掺杂区域和第二重掺杂区域的钳位阱。第一和第二重掺杂区域分别属于相反的导电类型。在N型重掺杂衬底中布置有多个深的隔离沟槽，其深度大于夹具阱的深度。深的隔离沟槽可以很好地分离每个夹具。本发明避免了巨大的漏电流适合于低电压应用。

43. 发明授权

US08217462B2 Transient voltage suppressors 有权
公开(公告)号：US08217462B2
公开(公告)日：2012-07-10
申请号：US12888151
申请日：2010-09-22
申请人： Kun-Hsien Lin , Che-Hao Chuang , Ryan Hsin-Chin Jiang
发明人： Kun-Hsien Lin , Che-Hao Chuang , Ryan Hsin-Chin Jiang
IPC分类号： H01L23/62
CPC分类号： H01L29/8613 , H01L27/0255 , H01L27/0259 , H01L29/866
摘要： The present invention relates a transient voltage suppressor (TVS) for directional ESD protection. The TVS includes: a conductivity type substrate; a first type lightly doped region, having a first type heavily doped region arranged therein; a second type lightly doped region, having a second type heavily doped region and a third type heavily doped region arranged therein; a third type lightly doped region, having a fourth type heavily doped region arranged therein; a plurality of closed isolation trenches, arranged on the conductivity type substrate, wherein at least one of the plurality of closed isolation trenches is neighbored one of the type lightly doped regions; and a first pin. Accordingly, the TVS of present invention may adaptively provide effective ESD protection under positive and negative ESD stresses, improve the efficiency of ESD protection within the limited layout area.

44. 发明申请

US20120080716A1 INITIAL-ON SCR DEVICE FOR ON-CHIP ESD PROTECTION 审中-公开
标题翻译：用于片上ESD保护的初始化SCR器件
公开(公告)号：US20120080716A1
公开(公告)日：2012-04-05
申请号：US13327171
申请日：2011-12-15
申请人： Ming-Dou Ker , Shih-Hung Chen , Kun-Hsien Lin
发明人： Ming-Dou Ker , Shih-Hung Chen , Kun-Hsien Lin
IPC分类号： H01L29/772
CPC分类号： H01L23/62 , H01L27/0262 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device for electrostatic discharge (ESD) protection comprises a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.
摘要翻译：一种用于静电放电（ESD）保护的半导体器件包括可控硅整流器（SCR），其包括半导体衬底，形成在衬底中的第一阱，在衬底中形成的第二阱，形成在第一阱中的第一p型区用作阳极，以及部分地形成在第二阱中用作阴极的第一n型区域，形成在包括栅极的第一阱中的p型金属氧化物半导体（PMOS）晶体管，第一扩散层区域和与第一扩散区域分离的第二扩散区域，形成在电连接到PMOS晶体管的第一扩散区域的第一阱中的第二n型区域和形成在衬底中的第二p型区域电连接到PMOS晶体管的第二扩散区域。

45. 发明申请

US20090315803A1 ANTENNA RADOME 有权
标题翻译：天线射线
公开(公告)号：US20090315803A1
公开(公告)日：2009-12-24
申请号：US12335585
申请日：2008-12-16
申请人： Chun-Yih Wu , Hung-Hsuan Lin , Ken-Huang Lin , Kun-Hsien Lin , Yu-Feng Yeh
发明人： Chun-Yih Wu , Hung-Hsuan Lin , Ken-Huang Lin , Kun-Hsien Lin , Yu-Feng Yeh
IPC分类号： H01Q1/42 , H01Q1/38
CPC分类号： H01Q1/42 , H01Q1/422 , H01Q9/0407 , H01Q19/06
摘要： An antenna radome is provided. The antenna radome comprises an antenna radome substrate and a unit cell. The unit cell is formed on a surface of the antenna radome substrate, and the unit cell is perpendicular to a magnetic field direction of an antenna.
摘要翻译：提供天线雷达罩。天线天线罩包括天线天线罩基板和单元电池。单位电池形成在天线罩天线罩基板的表面上，并且单位电池垂直于天线的磁场方向。

46. 发明授权

US07542253B2 Silicon controlled rectifier for the electrostatic discharge protection 有权
标题翻译：可控硅整流器用于静电放电保护
公开(公告)号：US07542253B2
公开(公告)日：2009-06-02
申请号：US10857836
申请日：2004-06-02
申请人： Ming-Dou Ker , Kun-Hsien Lin
发明人： Ming-Dou Ker , Kun-Hsien Lin
IPC分类号： H02H9/00
CPC分类号： H01L27/0262 , H01L29/7436
摘要： The present invention relates to an SCR (Silicon Controlled Rectifier) for the ESD (electrostatic discharge) protection comprising two terminal electrodes of a first electrode and a second electrode, a PMOS, an NMOS and an SCR structure. By utilizing an embedded SCR, a whole-chip ESD protection circuit design can be obtained. The present invention is suitable for IC products, and for applications by IC design industries and IC foundry industries.
摘要翻译：本发明涉及一种用于ESD（静电放电）保护的SCR（硅控整流器），其包括第一电极和第二电极，PMOS，NMOS和SCR结构的两个端电极。通过利用嵌入式SCR，可以获得全芯片ESD保护电路设计。本发明适用于IC产品，适用于IC设计行业和IC铸造行业。

47. 发明申请

US20060110917A1 Method of metallization in the fabrication of integrated circuit devices 审中-公开
标题翻译：集成电路器件制造中的金属化方法
公开(公告)号：US20060110917A1
公开(公告)日：2006-05-25
申请号：US11163055
申请日：2005-10-03
申请人： Shu-Jen Chen , Chia-Lin Hsu , Kun-Hsien Lin
发明人： Shu-Jen Chen , Chia-Lin Hsu , Kun-Hsien Lin
IPC分类号： H01L21/44
CPC分类号： H01L21/7684 , H01L21/76877
摘要： The method of metallization in the fabrication of an integrated circuit device comprises the steps as follows. First, a dielectric layer overlying a semiconductor substrate is provided. The dielectric layer has a top surface and a plurality of openings. Next, a metal layer is formed on the dielectric layer and filling the openings. Subsequently, a first removing process is performed to partially removing the metal layer. A first annealing process is performed on the metal layer. Finally, a second removing process is performed to remove the metal layer completely to leave the metal layer only within the openings.
摘要翻译：集成电路器件制造中的金属化方法包括以下步骤。首先，提供覆盖在半导体衬底上的电介质层。电介质层具有顶表面和多个开口。接下来，在电介质层上形成金属层并填充开口。随后，执行第一去除处理以部分地去除金属层。在金属层上进行第一退火处理。最后，进行第二次去除处理，以完全去除金属层，仅将金属层留在开口内。

48. 发明申请

US20050133871A1 Electrostatic discharge protection device 有权
标题翻译：静电放电保护装置
公开(公告)号：US20050133871A1
公开(公告)日：2005-06-23
申请号：US10992362
申请日：2004-11-19
申请人： Ming-Dou Ker , Kun-Hsien Lin , Geeng-Lih Lin
发明人： Ming-Dou Ker , Kun-Hsien Lin , Geeng-Lih Lin
IPC分类号： H01L23/62 , H01L27/02 , H01L29/06 , H01L29/417 , H01L29/78
CPC分类号： H01L27/0266 , H01L29/0653 , H01L29/0692 , H01L29/41725 , H01L29/7835
摘要： An ESD protection device. The ESD protection device has a substrate; a channel region, a source region, and a drain region. The channel region is formed on a predetermined area of a surface of the substrate, the channel region has a first side and a second side. The source region is formed adjacent to the first side. The drain region which has a heavily doped region and a lightly doped region formed below the heavily doped region is formed adjacent to the second side. The width along a longitudinal axis of the heavily doped region has variable length and thus the length between one side of the heavily doped region to the second side has variable length.
摘要翻译： ESD保护装置。 ESD保护装置具有基板; 沟道区，源极区和漏极区。沟道区形成在基板的表面的预定区域上，沟道区具有第一面和第二面。源区域与第一侧相邻地形成。具有重掺杂区域和形成在重掺杂区域下方的轻掺杂区域的漏区形成为与第二侧相邻。沿着重掺杂区域的纵轴的宽度具有可变长度，因此重掺杂区域的一侧与第二侧之间的长度具有可变长度。

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