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41. 发明申请

US20100264753A1 INTERFACE DEVICE FOR HOST DEVICE, INTERFACE DEVICE FOR SLAVE DEVICE, HOST DEVICE, SLAVE DEVICE, COMMUNICATION SYSTEM AND INTERFACE VOLTAGE SWITCHING METHOD 有权
标题翻译：用于主机设备的接口设备，用于从设备的接口设备，主机设备，从设备，通信系统和接口电压切换方法
公开(公告)号：US20100264753A1
公开(公告)日：2010-10-21
申请号：US12810521
申请日：2009-02-27
申请人： Masayuki Toyama , Takaharu Yoshida , Keisuke Sakai
发明人： Masayuki Toyama , Takaharu Yoshida , Keisuke Sakai
IPC分类号： H02B99/00
CPC分类号： G06F1/26 , Y10T307/858
摘要： A communication system in which an operating voltage can be selected from a plurality of interface voltages enables an interface voltage to be switched in a stable manner during operation of the system. When the interface voltage is to be switched, a host device (1) and a slave device (2) perform the switching while maintaining the signal level of buses in a stable manner. This structure enables the communication system to switch an interface voltage using a small number of signal lines.
摘要翻译：可以从多个接口电压中选择工作电压的通信系统使得能够在系统的操作期间以稳定的方式切换接口电压。当要切换接口电压时，主机设备（1）和从设备（2）执行切换，同时保持总线的信号电平稳定。该结构使得通信系统能够使用少量信号线来切换接口电压。

42. 发明申请

US20100191901A1 NON-VOLATILE STORAGE DEVICE, HOST DEVICE, NON-VOLATILE STORAGE SYSTEM, DATA RECORDING METHOD, AND PROGRAM 有权
标题翻译：非易失存储设备，主机设备，非易失存储系统，数据记录方法和程序
公开(公告)号：US20100191901A1
公开(公告)日：2010-07-29
申请号：US12670454
申请日：2009-07-28
申请人： Masayuki Toyama
发明人： Masayuki Toyama
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G06F12/0246 , G06F3/0613 , G06F3/0659 , G06F3/0679 , G06F2212/7205
摘要： A memory controller, a non-volatile storage device, a host device, and a non-volatile storage system capable of performing real-time recording even in the case where normal data and file management information/auxiliary information are written in alternating manner are provided. The host device (2) issues a memory management command before the start, after the end, or both before and after the start and end of real-time recording. When the non-volatile storage device (1) receives the memory management command, an internal memory controller (11) clears memory control information and performs garbage collection as necessary.
摘要翻译：提供即使在正常数据和文件管理信息/辅助信息以交替方式写入的情况下也能够执行实时记录的存储器控制器，非易失性存储设备，主机设备和非易失性存储系统。主机设备（2）在开始，结束之后，或在实时记录开始和结束之前和之后发出存储器管理命令。当非易失性存储装置（1）接收到存储器管理命令时，内部存储器控制器（11）根据需要清除存储器控制信息并进行垃圾收集。

43. 发明申请

US20090019194A1 STORAGE DEVICE 有权
标题翻译：储存设备
公开(公告)号：US20090019194A1
公开(公告)日：2009-01-15
申请号：US11909749
申请日：2006-03-24
申请人： Masayuki Toyama , Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue
发明人： Masayuki Toyama , Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue
IPC分类号： G06F3/00
CPC分类号： G06F3/0659 , G06F3/061 , G06F3/0656 , G06F3/0658 , G06F3/0676 , G06F11/1441
摘要： When a control unit (160) in a storage device (100) detects that a write end command or a data amount to be written has been transmitted from a host device (110), the control unit (160) saves control information required for writing data in a control information save memory (142). The control unit (160) also saves data which has not been written in storage medium into a buffer save memory (152) from a data buffer (151) and releases the busy state for the host device (110). The control unit (160) writes the saved data into a storage medium (120). Even if the power is turned OFF before completion of write, write can be performed into the storage medium (120) by using the saved data when the power is turned ON next time.
摘要翻译：当存储装置（100）中的控制单元（160）检测到从主机（110）发送写入结束命令或写入数据量时，控制单元（160）保存写入所需的控制信息控制信息中的数据保存存储器（142）。控制单元（160）还将从存储介质中未被写入的数据从数据缓冲器（151）保存到缓冲存储器（152）中，并且释放主机设备（110）的忙状态。控制单元（160）将保存的数据写入存储介质（120）。即使在完成写入之前电源被关闭，当下一次接通电源时，也可以通过使用保存的数据来对存储介质（120）进行写入。

44. 发明授权

US08464020B2 Non-volatile storage device, host device, storage system, data communication method and program 有权
标题翻译：非易失性存储设备，主机设备，存储系统，数据通信方式和程序
公开(公告)号：US08464020B2
公开(公告)日：2013-06-11
申请号：US13144594
申请日：2010-12-01
申请人： Masayuki Toyama , Tadashi Ono , Shinichiro Nishioka
发明人： Masayuki Toyama , Tadashi Ono , Shinichiro Nishioka
IPC分类号： G06F13/00
CPC分类号： G06F9/4403
摘要： In a memory system including a host device and one or more nonvolatile memory devices, the host device reads, from a nonvolatile memory device connected in the system, a boot code used to operate a CPU of the host device before the CPU is activated. The boot code reading process is required to be performed with a simple method. A host device (2) transmits a first symbol including a synchronous code to a nonvolatile memory device (1). The nonvolatile memory device (1) receives the first symbol from the host device (2), and transmits a first symbol that is identical to the received first symbol to the host device (2), and then transmits a boot code to the host device (2). In this manner, the host device (2) reads a boot code from the nonvolatile memory device 1 with a simple method.
摘要翻译：在包括主机设备和一个或多个非易失性存储设备的存储器系统中，主机设备从连接在系统中的非易失性存储设备中读取用于在CPU被激活之前操作主机设备的CPU的引导代码。引导代码读取过程需要以简单的方法执行。主机设备（2）将包括同步码的第一符号发送到非易失性存储设备（1）。非易失性存储器件（1）从主机（2）接收第一符号，并将与接收到的第一符号相同的第一符号发送到主机（2），然后将引导代码发送到主机（2）。以这种方式，主机设备（2）以简单的方法从非易失性存储设备1读取引导代码。

45. 发明授权

US08327068B2 Memory module, memory controller, nonvolatile storage, nonvolatile storage system, and memory read/write method 失效
标题翻译：内存模块，内存控制器，非易失性存储，非易失性存储系统和内存读/写方式
公开(公告)号：US08327068B2
公开(公告)日：2012-12-04
申请号：US11817532
申请日：2006-03-01
申请人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue , Masayuki Toyama , Kunihiro Maki
发明人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Manabu Inoue , Masayuki Toyama , Kunihiro Maki
IPC分类号： G06F12/00
CPC分类号： G06F12/0638 , G06F11/1666 , G06F12/0246 , G06F2212/7201
摘要： In a storage having a nonvolatile RAM of destructive read type, the number of restorations attributed to data read from the nonvolatile RAM is decreased, and the overall life of the storage is prolonged. In a storage having a nonvolatile RAM of destructive read type and a volatile RAM and holding the same data in the nonvolatile and volatile RAMs, data is read out of the volatile RAM in reading and data is written in both volatile and nonvolatile RAMs in writing.
摘要翻译：在具有破坏性读取类型的非易失性RAM的存储器中，归因于从非易失性RAM读取的数据的修复数量减少，并且存储器的总体寿命延长。在具有破坏性读取类型的非易失性RAM和易失性RAM的存储器中，并且在非易失性和易失性RAM中保持相同的数据，在读取时从易失性RAM中读出数据，并将数据写入易失性和非易失性RAM两者中。

46. 再颁专利

USRE42263E1 Address conversion unit for memory device 有权
标题翻译：存储设备的地址转换单元
公开(公告)号：USRE42263E1
公开(公告)日：2011-03-29
申请号：US11896278
申请日：2007-08-30
申请人： Masayuki Toyama , Tsutomu Sekibe
发明人： Masayuki Toyama , Tsutomu Sekibe
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/0292 , G06F2212/2022 , G06F2212/7201
摘要： A memory device with a nonvolatile memory and RAM for accessing the nonvolatile memory is generally provided with a table to convert a logical address to a physical address, however, in the invention, the table is divided to a first table on RAM and a second table on the nonvolatile memory. The first table converts specific bits of the logical address to a first physical address indicating a location of the second table. The second table converts the other bits of the logical address to a physical address of a representative page of pages contained in a storage area corresponding to the logical address. A unit operable to access data (a writing unit operable to, a reading unit operable to, and an erasing unit operable to) reaches a target physical address based on the logical address. Such configuration can reduce the capacity of each conversion table.
摘要翻译：具有用于访问非易失性存储器的非易失性存储器和RAM的存储器件通常设置有用于将逻辑地址转换为物理地址的表，然而，在本发明中，该表被划分为RAM上的第一表和第二表在非易失性存储器上。第一表将逻辑地址的特定比特转换成指示第二表的位置的第一物理地址。第二表将逻辑地址的其他位转换为与逻辑地址对应的存储区域中包含的页面的代表页的物理地址。可操作以访问数据的单元（可操作的读取单元，可操作的读取单元和可擦除单元）可以基于逻辑地址到达目标物理地址。这样的配置可以减少每个转换表的容量。

47. 发明申请

US20100122017A1 MEMORY CONTROLLER, NON-VOLATILE MEMORY SYSTEM, AND HOST DEVICE 审中-公开
标题翻译：内存控制器，非易失性存储器系统和主机设备
公开(公告)号：US20100122017A1
公开(公告)日：2010-05-13
申请号：US12527234
申请日：2008-03-13
申请人： Masayuki Toyama
发明人： Masayuki Toyama
IPC分类号： G06F12/00 , G06F12/02 , G06F12/08
CPC分类号： G06F12/0246 , G06F9/4403 , G06F2212/7201
摘要： Provided is a nonvolatile memory system which can be used for a boot program storage and easily controlled by a host device. At the time of reading a boot code 201 from a flash memory 200, a memory controller 100 executes a first operation mode based on an instruction from a host device 300, and specifies a physical address of the flash memory 200 so that the boot code 201 is read from a specific area of the flash memory 200.
摘要翻译：提供了一种非易失性存储器系统，其可用于引导程序存储并且易于由主机设备控制。在从闪存200读取引导代码201时，存储器控制器100基于来自主机设备300的指令执行第一操作模式，并且指定闪存200的物理地址，使得引导代码201 从闪速存储器200的特定区域读取。

48. 发明申请

US20090210612A1 MEMORY CONTROLLER, NONVOLATILE MEMORY DEVICE, AND NONVOLATILE MEMORY SYSTEM 审中-公开
标题翻译：内存控制器，非易失性存储器件和非易失性存储器系统
公开(公告)号：US20090210612A1
公开(公告)日：2009-08-20
申请号：US12282693
申请日：2007-03-12
申请人： Masahiro Nakanishi , Masayuki Toyama , Yutaka Nakamura , Yasushi Gohou , Masanori Matsuura , Manabu Inoue , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Shunichi Iwanari , Shinichi Tokumitsu
发明人： Masahiro Nakanishi , Masayuki Toyama , Yutaka Nakamura , Yasushi Gohou , Masanori Matsuura , Manabu Inoue , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Shunichi Iwanari , Shinichi Tokumitsu
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7203
摘要： In rewriting processing of logical sectors, data of the transferred logical sectors are temporarily stored in a memory buffer. When the buffer memory has been full filled with data, the data is written into a flash memory. In rewriting processing for the flash memory including a writing unit (page) having a capacity larger than a minimum writing unit (sector) from outside, the number of executions of the evacuation processing can be reduced and the fast data rewriting can be performed. Thus, it is possible to rationalize the evacuation processing for old data caused in the rewriting in units of sectors and to improve the data rewriting speed.
摘要翻译：在逻辑扇区的重写处理中，传送的逻辑扇区的数据被临时存储在存储缓冲器中。当缓冲存储器已经完全填满数据时，数据被写入闪存。在包括具有大于来自外部的最小写入单位（扇区）的容量的写入单元（页）的闪存的重写处理中，可以减少撤离处理的执行次数并且可以执行快速数据重写。因此，可以使以扇区为单位重写的旧数据的撤离处理合理化，并提高数据重写速度。

49. 发明申请

US20090100290A1 MEMORY CONTROLLER, NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND DATA WRITING METHOD 审中-公开
标题翻译：存储器控制器，非易失性存储器件，非易失性存储器系统和数据写入方法
公开(公告)号：US20090100290A1
公开(公告)日：2009-04-16
申请号：US12064469
申请日：2006-08-09
申请人： Masahiro Nakanishi , Masayuki Toyama , Manabu Inoue , Hirofumi Nakagaki
发明人： Masahiro Nakanishi , Masayuki Toyama , Manabu Inoue , Hirofumi Nakagaki
IPC分类号： G06F11/20 , G06F12/16
CPC分类号： G11C11/5628 , G11C16/102 , G11C16/105 , G11C29/00
摘要： A nonvolatile memory device comprises a nonvolatile memory and a memory controller. The nonvolatile memory includes the same memory cells striding over a plurality of pages. A page information instruction part has the page structure information of the nonvolatile memory. According to this information, a related page identification part identifies a page (related page) in which the data may change. The relation data stored in the related page are temporarily stored into a save memory before an error occurs, and if an error exists, these relation data are used to repair the data that have changed. By this method, in a memory device using a nonvolatile memory including the same memory cells striding over a plurality of pages, even if an error occurs during data writing, the error is repaired and the reliability can be ensured.
摘要翻译：非易失性存储器件包括非易失性存储器和存储器控制器。非易失性存储器包括跨越多个页面的相同存储器单元。页面信息指示部分具有非易失性存储器的页面结构信息。根据该信息，相关的页面识别部件识别数据可能改变的页面（相关页面）。存储在相关页面中的关系数据在错误发生之前临时存储到保存存储器中，并且如果存在错误，则这些关系数据用于修复已经改变的数据。通过这种方法，在使用包括跨越多个页面的相同存储单元的非易失性存储器的存储器件中，即使在数据写入期间发生错误，也可以修复错误并且可靠性得到确保。

50. 发明申请

US20090055576A1 MEMORY CONTROLLER, NONVOLATILE STORAGE DEVICE, NONVOLATILE STORAGE SYSTEM, AND DATA WRITING METHOD 有权
标题翻译：存储器控制器，非易失存储器件，非易失性存储系统和数据写入方法
公开(公告)号：US20090055576A1
公开(公告)日：2009-02-26
申请号：US11908715
申请日：2006-03-09
申请人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Yutaka Nakamura , Masayuki Toyama , Yasushi Goho , Syunichi Iwanari , Yoshihisa Kato , Manabu Inoue
发明人： Masahiro Nakanishi , Tomoaki Izumi , Tetsushi Kasahara , Kazuaki Tamura , Kiminori Matsuno , Yutaka Nakamura , Masayuki Toyama , Yasushi Goho , Syunichi Iwanari , Yoshihisa Kato , Manabu Inoue
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F3/0656 , G06F3/0613 , G06F3/0619 , G06F3/0643 , G06F3/0679 , G06F12/0246 , G06F2212/1016 , G06F2212/7203
摘要： A nonvolatile storage device is provided with a nonvolatile main storage memory (114) whose erase size is larger than a cluster size, and a buffer (106), i.e. a nonvolatile auxiliary storage memory. At the time of writing data in the memory, the data is temporarily stored in the buffer (106), then, a plurality of data in the buffer (106) are collectively taken out to be stored in the main storage memory (114). Data in an original block is saved in a write block in the main storage memory. Thus, the data can be written in the main storage memory (114) at a high speed.
摘要翻译：非易失性存储装置具有擦除大小大于簇大小的非易失性主存储存储器（114）和缓冲器（106），即非易失性辅助存储存储器。在将数据写入存储器时，将数据临时存储在缓冲器（106）中，然后将缓冲器（106）中的多个数据集中取出以存储在主存储器（114）中。原始块中的数据保存在主存储器中的写入块中。因此，可以高速地将数据写入主存储存储器（114）。

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