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41. 发明授权

US07132703B2 Field-effect transistor 有权
标题翻译：场效应晶体管
公开(公告)号：US07132703B2
公开(公告)日：2006-11-07
申请号：US11014893
申请日：2004-12-20
申请人： Masahiro Hikita , Manabu Yanagihara
发明人： Masahiro Hikita , Manabu Yanagihara
IPC分类号： H01I29/80
CPC分类号： H01L29/66462 , H01L29/7783
摘要： A field-effect transistor includes: a carrier supply layer supplying carriers; a Schottky contact layer forming a Schottky barrier; and an intermediate layer formed between the carrier supply layer and the Schottky contact layer. Here, the intermediate layer has an electron affinity which is higher than an electron affinity of the carrier supply layer but lower than an electron affinity of the Schottky contact layer.
摘要翻译：场效应晶体管包括：提供载体的载流子供应层; 形成肖特基势垒的肖特基接触层; 以及形成在载体供给层和肖特基接触层之间的中间层。这里，中间层的电子亲和力高于载流子供给层的电子亲和力，但低于肖特基接触层的电子亲和力。

42. 发明授权

US06797996B1 Compound semiconductor device and method for fabricating the same 失效
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：US06797996B1
公开(公告)日：2004-09-28
申请号：US10445035
申请日：2003-05-27
申请人： Masahiro Hikita , Manabu Yanagihara , Tuyoshi Tanaka
发明人： Masahiro Hikita , Manabu Yanagihara , Tuyoshi Tanaka
IPC分类号： H01L29737
CPC分类号： H01L29/66318 , H01L29/0821 , H01L29/1004 , H01L29/365 , H01L29/7371
摘要： A compound semiconductor device includes an emitter layer, a base layer which is in contact with the emitter layer and formed of a first compound semiconductor, a collector layer which is in contact with the base layer and formed of a second compound semiconductor having a wider bandgap than that of the first compound semiconductor. In the device, a delta doped layer having a higher concentration of an impurity than that of the collector layer is formed at the heterojunction interface between the collector layer and the base layer or in a region of the collector layer located at about 10 nm or less from the heterojunction interface with the base layer.
摘要翻译：化合物半导体器件包括发射极层，与发射极层接触并由第一化合物半导体形成的基极层，与基极层接触并由具有较宽带隙的第二化合物半导体形成的集电极层比第一化合物半导体。在器件中，在集电极层和基极层之间的异质结界面处或在位于约10nm以下的集电极层的区域中形成杂质浓度高于集电极层的Δ掺杂层从与基层的异质结界面。

43. 发明授权

US08569797B2 Field effect transistor and method of manufacturing the same 有权
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US08569797B2
公开(公告)日：2013-10-29
申请号：US13185818
申请日：2011-07-19
申请人： Hidekazu Umeda , Masahiro Hikita , Tetsuzo Ueda
发明人： Hidekazu Umeda , Masahiro Hikita , Tetsuzo Ueda
IPC分类号： H01L29/80
CPC分类号： H01L29/7783 , H01L29/1066 , H01L29/2003 , H01L29/66462 , H01L29/7787
摘要： A field-effect transistor includes a first semiconductor layer formed on a substrate, and a second semiconductor layer. The first semiconductor layer has a containing region provided as an isolation region which contains non-conductive impurities, and a non-containing region which contains no non-conductive impurities. A first region is defined by a vicinity of a portion of the interface between the containing region and the non-containing region, the portion of the interface being below a gate electrode, the vicinity including the portion of the interface and being included in the containing region. The second semiconductor layer includes a second region which is located directly above the first region. The concentration of the non-conductive impurities of the second region is lower than that of the first region.
摘要翻译：场效应晶体管包括形成在衬底上的第一半导体层和第二半导体层。第一半导体层具有设置为包含非导电杂质的隔离区域的含有区域和不含非导电杂质的非含有区域。第一区域由容纳区域和非含有区域之间的界面的一部分的附近限定，界面的部分在栅电极下方，包括界面部分的附近包含在包含地区。第二半导体层包括位于第一区域正上方的第二区域。第二区域的非导电性杂质的浓度低于第一区域的浓度。

44. 外观设计

USD686564S1 Tire for motorcycle 有权
公开(公告)号：USD686564S1
公开(公告)日：2013-07-23
申请号：US29398046
申请日：2011-07-26
申请人： Masahiro Hikita
设计人： Masahiro Hikita

45. 外观设计

USD678180S1 Tire for motorcycle 有权
公开(公告)号：USD678180S1
公开(公告)日：2013-03-19
申请号：US29433013
申请日：2012-09-25
申请人： Masahiro Hikita
设计人： Masahiro Hikita

46. 发明授权

US07838904B2 Nitride based semiconductor device with concave gate region 有权
标题翻译：氮化物半导体器件，具有凹入栅极区域
公开(公告)号：US07838904B2
公开(公告)日：2010-11-23
申请号：US12023461
申请日：2008-01-31
申请人： Kazushi Nakazawa , Satoshi Nakazawa , Tetsuzo Ueda , Tsuyoshi Tanaka , Masahiro Hikita
发明人： Kazushi Nakazawa , Satoshi Nakazawa , Tetsuzo Ueda , Tsuyoshi Tanaka , Masahiro Hikita
IPC分类号： H01L29/778
CPC分类号： H01L29/7787 , H01L29/1029 , H01L29/1066 , H01L29/2003 , H01L29/41766 , H01L29/42316 , H01L29/4236 , H01L29/66462
摘要： In FET, a second nitride semiconductor layer is provided on a first nitride semiconductor layer, and a source electrode and a drain electrode are each provided to have at least a portion thereof in contact with the second nitride semiconductor layer. A concave portion is formed in the upper surface of the second nitride semiconductor layer to be located between the source electrode and the drain electrode. A gate electrode is provided over the concave portion to cover the opening of the concave portion.
摘要翻译：在FET中，第二氮化物半导体层设置在第一氮化物半导体层上，并且源电极和漏电极分别设置成使其至少一部分与第二氮化物半导体层接触。在第二氮化物半导体层的上表面上形成凹部，位于源电极和漏电极之间。在所述凹部上设置有栅电极以覆盖所述凹部的开口。

47. 发明授权

US08598628B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08598628B2
公开(公告)日：2013-12-03
申请号：US13231514
申请日：2011-09-13
申请人： Masahiro Hikita , Manabu Yanagihara
发明人： Masahiro Hikita , Manabu Yanagihara
IPC分类号： H01L29/72
CPC分类号： H01L29/42316 , H01L29/1066 , H01L29/2003 , H01L29/518 , H01L29/7786
摘要： A normally off semiconductor device with a reduced off-state leakage current, which is applicable to a power switching element, includes: a substrate; an undoped GaN layer formed above the substrate; an undoped AlGaN layer formed on the undoped GaN layer; a source electrode and a drain electrode, formed on the undoped GaN layer or the undoped AlGaN layer; a P-type GaN layer formed on the undoped AlGaN layer and disposed between the source electrode and the drain electrode; and a gate electrode formed on the P-type GaN layer, wherein the undoped GaN layer includes an active region including a channel and an inactive region not including the channel, and the P-type GaN layer is disposed to surround the source electrode.
摘要翻译：具有减小的截止状态漏电流的常闭半导体器件，其适用于功率开关元件，包括：衬底; 在衬底上形成未掺杂的GaN层; 在未掺杂的GaN层上形成未掺杂的AlGaN层; 源电极和漏电极，形成在未掺杂的GaN层或未掺杂的AlGaN层上; 形成在未掺杂的AlGaN层上并设置在源电极和漏电极之间的P型GaN层; 以及形成在所述P型GaN层上的栅电极，其中所述未掺杂的GaN层包括包括沟道的有源区和不包括所述沟道的非活性区，并且所述P型GaN层设置为围绕所述源电极。

48. 外观设计

USD670233S1 Tire for motorcycle 有权
公开(公告)号：USD670233S1
公开(公告)日：2012-11-06
申请号：US29417594
申请日：2012-04-05
申请人： Masahiro Hikita
设计人： Masahiro Hikita

49. 发明申请

US20110297960A1 TRANSISTOR ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：晶体管组件及其制造方法
公开(公告)号：US20110297960A1
公开(公告)日：2011-12-08
申请号：US13213967
申请日：2011-08-19
申请人： Kenichiro Tanaka , Tetsuzo Ueda , Hisayoshi Matsuo , Masahiro Hikita
发明人： Kenichiro Tanaka , Tetsuzo Ueda , Hisayoshi Matsuo , Masahiro Hikita
IPC分类号： H01L21/60 , H01L29/78
CPC分类号： H01L29/7786 , H01L23/053 , H01L23/562 , H01L29/2003 , H01L29/225 , H01L29/452 , H01L29/475 , H01L2224/72 , H01L2924/01079 , H01L2924/12032 , H01L2924/00
摘要： A method for manufacturing a transistor assembly includes the steps of: (a) forming a transistor; (b) polishing a base substrate; and (c) securing the transistor of which the base substrate is polished to a support substrate. The step (a) is a step of forming a first semiconductor layer and a second semiconductor layer on a principle surface of the base substrate. The step (b) is a step of polishing a surface of the base substrate opposite to the principle surface. The step (c) is a step of securing the transistor on the support substrate in the presence of a stress applied on the base substrate in such a direction that a warp of the base substrate is reduced. The base substrate is made of a material different from that of the first semiconductor layer and the second semiconductor layer, and a tensile stress is applied on the second semiconductor layer.
摘要翻译：晶体管组件的制造方法包括以下步骤：（a）形成晶体管; （b）抛光基底; 和（c）将基底基板抛光的晶体管固定到支撑基板上。步骤（a）是在基底基板的主表面上形成第一半导体层和第二半导体层的工序。步骤（b）是对基材的与主面相反的表面进行研磨的工序。步骤（c）是在施加到基底基板上的应力存在下，使晶体管固定在支撑基板上，使基板的翘曲减小的方向。基底由不同于第一半导体层和第二半导体层的材料制成，并且在第二半导体层上施加拉伸应力。

50. 发明授权

US07863649B2 Nitride semiconductor device and method for fabricating the same 有权
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US07863649B2
公开(公告)日：2011-01-04
申请号：US12331668
申请日：2008-12-10
申请人： Masahiro Hikita , Tetsuzo Ueda
发明人： Masahiro Hikita , Tetsuzo Ueda
IPC分类号： H01L29/739
CPC分类号： H01L29/2003 , H01L29/1066 , H01L29/42316 , H01L29/7786 , H01L29/808
摘要： A nitride semiconductor device includes: first through third nitride semiconductor layers formed in sequence over a substrate. The second nitride semiconductor layer has a band gap energy larger than that of the first nitride semiconductor layer. The third nitride semiconductor layer has an opening. A p-type fourth nitride semiconductor layer is formed so that the opening is filled therewith. A gate electrode is formed on the fourth nitride semiconductor layer.
摘要翻译：氮化物半导体器件包括：顺序地在衬底上形成的第一至第三氮化物半导体层。第二氮化物半导体层的带隙能量大于第一氮化物半导体层的带隙能量。第三氮化物半导体层具有开口。形成p型第四氮化物半导体层，使得开口被填充。在第四氮化物半导体层上形成栅电极。

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