专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明申请

US20110207282A1 Methods for Producing a Tunnel Field-Effect Transistor 有权
标题翻译：隧道场效应晶体管的制造方法
公开(公告)号：US20110207282A1
公开(公告)日：2011-08-25
申请号：US13081180
申请日：2011-04-06
申请人： Ronald Kakoschke , Helmut Tews
发明人： Ronald Kakoschke , Helmut Tews
IPC分类号： H01L21/336
CPC分类号： H01L21/823418 , H01L21/2815 , H01L27/088 , H01L29/665 , H01L29/66545 , H01L29/66553 , H01L29/66628 , H01L29/66659 , H01L29/7311 , H01L29/78 , H01L29/7835
摘要： A method for producing a tunnel field-effect transistor is disclosed. Connection regions of different doping types are produced by means of self-aligning implantation methods.
摘要翻译：公开了一种用于制造隧道场效应晶体管的方法。通过自对准注入方法产生不同掺杂类型的连接区域。

42. 发明授权

US07986023B2 Semiconductor device with inductor 有权
标题翻译：带电感的半导体器件
公开(公告)号：US07986023B2
公开(公告)日：2011-07-26
申请号：US11856089
申请日：2007-09-17
申请人： Helmut Tews , Hans-Gerd Jetten , Hans-Joachim Barth
发明人： Helmut Tews , Hans-Gerd Jetten , Hans-Joachim Barth
IPC分类号： H01L29/00 , H05K7/00
CPC分类号： H01L23/5389 , H01L23/5388 , H01L24/82 , H01L24/96 , H01L2224/04105 , H01L2224/12105 , H01L2224/24195 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/01058 , H01L2924/01059 , H01L2924/01063 , H01L2924/01064 , H01L2924/01066 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01105 , H01L2924/181 , H01L2924/18162 , H01L2924/00
摘要： One or more embodiments are directed to a semiconductor structure, comprising: a support; a semiconductor chip at least partially embedded within the support; and an inductor electrically coupled to the chip, at least a portion of the inductor overlying the support outside the lateral boundary of the chip.
摘要翻译：一个或多个实施例涉及半导体结构，包括：支撑件; 至少部分地嵌入所述支撑件内的半导体芯片; 以及电耦合到所述芯片的电感器，所述电感器的至少一部分覆盖在所述芯片的横向边界外侧的所述支撑件。

43. 发明授权

US07943973B2 Method for producing a field-effect transistor, field-effect transistor and integrated circuit arrangement 有权
标题翻译：场效应晶体管的制造方法，场效应晶体管和集成电路装置
公开(公告)号：US07943973B2
公开(公告)日：2011-05-17
申请号：US11814364
申请日：2005-12-09
申请人： Ronald Kakoschke , Helmut Tews
发明人： Ronald Kakoschke , Helmut Tews
IPC分类号： H01L29/76
CPC分类号： H01L21/823418 , H01L21/2815 , H01L27/088 , H01L29/665 , H01L29/66545 , H01L29/66553 , H01L29/66628 , H01L29/66659 , H01L29/7311 , H01L29/78 , H01L29/7835
摘要： A method for producing a tunnel field-effect transistor is disclosed. Connection regions of different doping types are produced by means of self-aligning implantation methods.
摘要翻译：公开了一种用于制造隧道场效应晶体管的方法。通过自对准注入方法产生不同掺杂类型的连接区域。

44. 发明授权

US07824993B2 Field-effect transistor with local source/drain insulation and associated method of production 有权
标题翻译：具有局部源/漏绝缘和相关生产方法的场效应晶体管
公开(公告)号：US07824993B2
公开(公告)日：2010-11-02
申请号：US12431214
申请日：2009-04-28
申请人： Juergen Holz , Klaus Schruefer , Helmut Tews
发明人： Juergen Holz , Klaus Schruefer , Helmut Tews
IPC分类号： H01L21/336
CPC分类号： H01L29/66636 , H01L21/283 , H01L21/30604 , H01L21/31 , H01L21/3205 , H01L29/0653 , H01L29/41783
摘要： A method for fabricating a field-effect transistor with local source/drain insulation. The method includes forming and patterning a gate stack with a gate layer and a gate dielectric on a semiconductor substrate; forming source and drain depressions at the gate stack in the semiconductor substrate; forming a depression insulation layer at least in a bottom region of the source and drain depressions; and filling the at least partially insulated source and drain depressions with a filling layer for realizing source and drain regions. Further, the step of forming source and drain depressions at the gate stack in the semiconductor substrate includes that first depressions are formed for realizing channel connection regions in the semiconductor substrate, spacers are formed at the gate stack, and second depressions are formed using the spacers as a mask in the first depressions and in the semiconductor substrate.
摘要翻译：一种制造具有局部源极/漏极绝缘的场效应晶体管的方法。该方法包括在半导体衬底上形成和图案化具有栅极层和栅极电介质的栅叠层; 在半导体衬底中的栅极堆叠处形成源极和漏极凹陷; 至少在所述源极和漏极凹陷的底部区域中形成凹陷绝缘层; 以及用用于实现源极和漏极区域的填充层填充所述至少部分绝缘的源极和漏极凹部。此外，在半导体衬底中的栅极堆叠处形成源极和漏极凹陷的步骤包括形成用于实现半导体衬底中的沟道连接区域的第一凹陷，在栅极堆叠处形成间隔物，并且使用间隔件形成第二凹陷作为第一凹部和半导体衬底中的掩模。

45. 发明授权

US07816792B2 Semiconductor device with conductive interconnect 有权
标题翻译：具有导电互连的半导体器件
公开(公告)号：US07816792B2
公开(公告)日：2010-10-19
申请号：US11855170
申请日：2007-09-14
申请人： Helmut Tews , Hans-Gerd Jetten , Hans-Joachim Barth
发明人： Helmut Tews , Hans-Gerd Jetten , Hans-Joachim Barth
IPC分类号： H01L23/48
CPC分类号： H01L23/5389 , H01L23/3121 , H01L23/49838 , H01L23/645 , H01L24/24 , H01L24/82 , H01L24/96 , H01L28/10 , H01L2224/24137 , H01L2224/24195 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/04953 , H01L2924/181 , H01L2924/18162 , H01L2924/19042 , H01L2924/19104 , H01L2924/30107 , H01L2924/00
摘要： One or more embodiments are related to a semiconductor structure, comprising: a semiconductor chip; a conductive layer comprising at least a first conductive pathway and a second conductive pathway spacedly disposed from the first conductive pathway, the first conductive pathway electrically coupled to the chip, at least a portion of the first conductive pathway disposed outside the lateral boundary of the chip, at least a portion of the second conductive pathway disposed outside the lateral boundary of the chip; and a conductive interconnect disposed outside the lateral boundary of the chip, the conductive interconnect electrically coupling the first conductive pathway to the second conductive pathway.
摘要翻译：一个或多个实施例涉及半导体结构，包括：半导体芯片; 导电层，包括至少第一导电路径和与第一导电路径间隔设置的第二导电路径，第一导电路径电耦合到芯片，第一导电路径的至少一部分设置在芯片的横向边界外侧所述第二导电通路的至少一部分设置在所述芯片的横向边界的外侧; 以及布置在所述芯片的横向边界外侧的导电互连，所述导电互连将所述第一导电路径电耦合到所述第二导电路径。

46. 发明授权

US07767518B2 Field effect transistor 有权
标题翻译：场效应晶体管
公开(公告)号：US07767518B2
公开(公告)日：2010-08-03
申请号：US12266876
申请日：2008-11-07
申请人： Helmut Tews
发明人： Helmut Tews
IPC分类号： H01L21/8242
CPC分类号： H01L27/10841 , H01L27/1082 , H01L27/10823 , H01L27/10832 , H01L27/10858 , H01L27/10864 , H01L27/10876 , H01L29/161 , H01L29/4916 , H01L29/517 , H01L29/518 , H01L29/66666 , H01L29/7827 , Y10T29/41
摘要： A field effect transistor is provided. The field effect transistor includes a channel region, electrically conductive channel connection regions, and a control region. The electrically conductive channel connection regions adjoin the channel region along with a transistor dielectric. The control region is separated from the channel region by the transistor dielectric. In addition, the control region may comprise a monocrystalline material.
摘要翻译：提供场效应晶体管。场效应晶体管包括沟道区，导电沟道连接区和控制区。导电沟道连接区域与晶体管电介质连接在沟道区域上。控制区域通过晶体管电介质与沟道区域分离。此外，控制区域可以包括单晶材料。

47. 发明申请

US20090236647A1 SEMICONDUCTOR DEVICE WITH CAPACITOR 审中-公开
标题翻译：具有电容器的半导体器件
公开(公告)号：US20090236647A1
公开(公告)日：2009-09-24
申请号：US12050192
申请日：2008-03-18
申请人： Hans-Joachim Barth , Helmut Tews
发明人： Hans-Joachim Barth , Helmut Tews
IPC分类号： H01L29/00 , H01L21/00
CPC分类号： H01L23/5389 , H01L23/49861 , H01L23/50 , H01L23/642 , H01L24/24 , H01L24/82 , H01L24/96 , H01L28/40 , H01L2224/24137 , H01L2224/24195 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01044 , H01L2924/01046 , H01L2924/01047 , H01L2924/01068 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04953 , H01L2924/10329 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/00
摘要： An embodiment of the invention is a semiconductor structure, comprising: a semiconductor chip at least partially embedded within a support; and a capacitor disposed outside the lateral boundary of the chip, the capacitor electrically coupled to the chip.
摘要翻译：本发明的实施例是一种半导体结构，包括：半导体芯片，其至少部分地嵌入在支撑体内; 以及设置在所述芯片的横向边界外侧的电容器，所述电容器电耦合到所述芯片。

48. 发明申请

US20090068806A1 FIELD EFFECT TRANSISTOR 有权
标题翻译：场效应晶体管
公开(公告)号：US20090068806A1
公开(公告)日：2009-03-12
申请号：US12266876
申请日：2008-11-07
申请人： Helmut Tews
发明人： Helmut Tews
IPC分类号： H01L21/336 , H01L21/67
CPC分类号： H01L27/10841 , H01L27/1082 , H01L27/10823 , H01L27/10832 , H01L27/10858 , H01L27/10864 , H01L27/10876 , H01L29/161 , H01L29/4916 , H01L29/517 , H01L29/518 , H01L29/66666 , H01L29/7827 , Y10T29/41
摘要： A field effect transistor is provided. The field effect transistor includes a channel region, electrically conductive channel connection regions, and a control region. The electrically conductive channel connection regions adjoin the channel region along with a transistor dielectric. The control region is separated from the channel region by the transistor dielectric. In addition, the control region may comprise a monocrystalline material.
摘要翻译：提供场效应晶体管。场效应晶体管包括沟道区，导电沟道连接区和控制区。导电沟道连接区域与晶体管电介质连接在沟道区域上。控制区域通过晶体管电介质与沟道区域分离。此外，控制区域可以包括单晶材料。

49. 发明申请

US20070004149A1 Method for producing a vertical field effect transistor 有权
标题翻译：垂直场效应晶体管的制造方法
公开(公告)号：US20070004149A1
公开(公告)日：2007-01-04
申请号：US11414478
申请日：2006-04-28
申请人： Helmut Tews
发明人： Helmut Tews
IPC分类号： H01L21/336 , H01L31/00
CPC分类号： H01L29/66825 , H01L21/28273 , H01L21/28282 , H01L29/66666 , H01L29/66742 , H01L29/66833 , H01L29/7828 , H01L29/78642 , H01L29/7883 , H01L29/7885 , H01L29/792
摘要： A method for producing a field effect transistor, in which a plurality of layers are in each case deposited, planarized and etched back, in particular a gate electrode layer, is disclosed. This method allows the manufacturing of transistors having outstanding electrical properties and having outstanding reproducibility.
摘要翻译：公开了一种场效应晶体管的制造方法，其中在各种情况下沉积，平坦化和回蚀刻多个层，特别是栅极电极层。该方法允许制造具有优异的电性能并具有出色的再现性的晶体管。

50. 发明申请

US20060234138A1 Hard mask arrangement 审中-公开
标题翻译：硬面罩布置
公开(公告)号：US20060234138A1
公开(公告)日：2006-10-19
申请号：US11393017
申请日：2006-03-30
申请人： Rodger Fehlhaber , Helmut Tews
发明人： Rodger Fehlhaber , Helmut Tews
IPC分类号： G03F1/00 , H01L21/311
CPC分类号： H01L21/0337 , H01L21/0338
摘要： An interconnect connection structure having first and second interconnects and multiple connection elements that electrically connect the first interconnect to the second interconnect is described. The multiple connection elements are formed laterally in a lateral region of the first and second interconnects relative to an overlay orientation of the interconnects. A central region may be free of connection elements so that electro-migration properties of the connection structure are improved and the current-carrying capacity is increased.
摘要翻译：描述了具有第一和第二互连的互连连接结构以及将第一互连电连接到第二互连的多个连接元件。多个连接元件相对于互连件的覆盖取向横向地形成在第一和第二互连件的横向区域中。中心区域可以没有连接元件，使得连接结构的电迁移特性得到改善并且载流能力增加。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式