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41. 发明授权

US06942155B1 Integrated circuits with persistent data storage 有权
标题翻译：具有持久数据存储的集成电路
公开(公告)号：US06942155B1
公开(公告)日：2005-09-13
申请号：US10140589
申请日：2002-05-07
申请人： Roger G. Stewart , John Rolin
发明人： Roger G. Stewart , John Rolin
IPC分类号： G06K19/00 , G06K19/07 , G06K19/073 , G11C17/00
CPC分类号： G06K19/07381 , G06K19/0723
摘要： The circuitry introduced in this invention selectively slows down the functioning of an electronic circuit maintaining a particular state for a prolonged period of time. This circuitry is used not only to achieve the desired effect in maintaining security from electronic thieves trying to circumvent codes but also in other applications such as enabling a circuit to continue to function in the event of a brief loss of power. For example, in an RFID system, if a reader is frequency hopping, a tag loses power for as long as about 400 milliseconds when the reader changes to other frequencies. In a preferred embodiment, the disclosed circuitry is used in conjunction with a destruct sequence.
摘要翻译：在本发明中引入的电路选择性地减慢保持特定状态长时间的电子电路的功能。该电路不仅用于在维护电子窃贼试图绕过代码的安全性方面实现期望的效果，而且在其他应用中，例如使电路在短暂的功率损失的情况下继续工作。例如，在RFID系统中，如果读取器跳频，当读取器改变到其他频率时，标签失去长达约400毫秒的功率。在优选实施例中，所公开的电路与破坏序列结合使用。

42. 发明授权

US5302966A Active matrix electroluminescent display and method of operation 失效
标题翻译：有源矩阵电致发光显示和操作方法
公开(公告)号：US5302966A
公开(公告)日：1994-04-12
申请号：US892464
申请日：1992-06-02
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G09G3/20 , G09G3/30 , H05B33/08
CPC分类号： G09G3/2011 , G09G3/30 , G09G2300/0842 , G09G2310/0259 , G09G2310/027 , G09G3/2018
摘要： An active matrix electroluminescent display (AMELD) having an improved light emitting efficiency and methods of operating the AMELD to produce gray scale operation comprises a plurality of pixels, each pixel including a first transistor having its gate connected to a select line, its source connected to a data line and its drain connected to the gate of a second transistor, the second transistor having its source connected to the data line and its drain connected to a first electrode of an electroluminescent (EL) cell. The EL cell's second electrode is connected to alternating high voltage means. A method for producing gray scale performance including the step of varying the length of time the second transistor is on while the alternating voltage is applied to the EL cell is also disclosed.
摘要翻译：具有改进的发光效率的有源矩阵电致发光显示器（AMELD）和操作AMELD以产生灰度级操作的方法包括多个像素，每个像素包括其栅极连接到选择线的第一晶体管，其源极连接到数据线及其漏极连接到第二晶体管的栅极，第二晶体管的源极连接到数据线，其漏极连接到电致发光（EL）单元的第一电极。 EL单元的第二电极连接到交流高压装置。还公开了一种用于产生灰度级性能的方法，包括在将交流电压施加到EL单元的同时改变第二晶体管导通的时间长度的步骤。

43. 发明授权

US4903094A Memory cell structure having radiation hardness 失效
标题翻译：存储单元结构具有辐射硬度
公开(公告)号：US4903094A
公开(公告)日：1990-02-20
申请号：US218425
申请日：1988-07-12
申请人： Dora Plus , Roger G. Stewart
发明人： Dora Plus , Roger G. Stewart
IPC分类号： H01L27/11
CPC分类号： H01L27/1104 , H01L27/11 , Y10S257/906
摘要： A memory cell structure has a thin insulating oxide barrier layer between an insulating body, such as sapphire, and a conducting layer, such as polysilicon, to prevent photoconduction between the body and the layer. Upper and lower conducting layers form a capacitor with a source and a drain in the lower layer and a gate in the upper layer to isolate the sensitive gate from a substrate during photoconduction. These features help the cell resist a radiation-induced logic state change.
摘要翻译：存储单元结构在绝缘体（例如蓝宝石）和导电层（例如多晶硅）之间具有薄的绝缘氧化物阻挡层，以防止体和层之间的光电导。上下导电层形成在下层具有源极和漏极的电容器，以及上层中的栅极，用于在感光期间将敏感栅极与衬底隔离。这些特征有助于细胞抵抗辐射诱发的逻辑状态变化。

44. 发明授权

US4738514A Crystal variation compensation circuit for liquid crystal displays 失效
标题翻译：液晶显示器的水晶变差补偿电路
公开(公告)号：US4738514A
公开(公告)日：1988-04-19
申请号：US819287
申请日：1986-01-16
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G09G3/18 , G01D7/00 , G02F1/133 , G09G3/36 , G02F1/13
CPC分类号： G02F1/133382 , G09G3/36 , G09G2320/041
摘要： A circuit for compensating for crystal variations in a liquid crystal display (LCD) utilizes four crystals arranged outside of the viewing area. Two of the crystals have a capacitance different from that of the other two and serve as reference crystals. The other two crystals serve as detection crystals and can have a capacitance equal to that of the display crystals. The detection crystals are biased to have a capacitance equal to that of the reference crystals. Changes in the detection crystal capacitance results in changes in the voltage across the crystals. The voltage changes are detected in a detection circuit and are applied to an adjustment circuit. The adjustment circuit produces an adjustment signal which is used to adjust the crystal drive voltage and to adjust the detection circuit.
摘要翻译：用于补偿液晶显示器（LCD）中的晶体变化的电路利用布置在观察区域外部的四个晶体。两个晶体的电容与其他两个不同，并且用作参考晶体。另外两个晶体用作检测晶体，并且可以具有与显示晶体相同的电容。检测晶体被偏置为具有等于参考晶体的电容的电容。检测晶体电容的变化导致晶体两端电压的变化。在检测电路中检测电压变化，并将其施加到调整电路。调整电路产生用于调节晶体驱动电压并调整检测电路的调整信号。

45. 发明授权

US4558240A Multi mode amplifier 失效
标题翻译：多模放大器
公开(公告)号：US4558240A
公开(公告)日：1985-12-10
申请号：US487083
申请日：1983-04-21
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： H03K3/356 , H03K5/24 , G01R19/165 , G11C7/06 , H03K3/023
CPC分类号： H03K3/356017 , H03K3/356113
摘要： The operating potential to an amplifying section is selectively altered to cause the stages of the amplifying section to operate in the voltage follower mode during one time period and as inverters during another, succeeding time period. A selectively enabled preamplifier adapted to receive small signals which are offset with respect to the voltage rail level and which produces at its outputs, signals which tend to be centered about the midpoint of the operating potential is coupled to the amplifying section to control its gain during certain portions of the amplifying section operation.
摘要翻译：选择性地改变放大部分的工作电位，以使放大部分的阶段在一个时间段期间以电压跟随器模式工作，而在另一个后续时间段期间作为逆变器工作。一种有选择地使能的前置放大器，适于接收相对于电压轨迹电平偏移的小信号，并且在其输出处产生趋于以工作电位的中点为中心的信号耦合到放大部分以控制其增益放大部分的某些部分操作。

46. 发明授权

US4464754A Memory system with redundancy for error avoidance 失效
标题翻译：具有冗余的存储系统，用于避免错误
公开(公告)号：US4464754A
公开(公告)日：1984-08-07
申请号：US362462
申请日：1982-03-26
申请人： Roger G. Stewart , Andrew G. F. Dingwall
发明人： Roger G. Stewart , Andrew G. F. Dingwall
IPC分类号： G06F11/10 , G11C29/00
CPC分类号： G11C29/74 , G06F11/1008 , G06F11/1076
摘要： A memory system in which two or more memory modules containing the same information have their respective data outputs connected to the same data line. Each module includes means for checking the parity of the data being read-out at its output and in the event of a parity error indication effectively disconnects its output from the data line.
摘要翻译：其中包含相同信息的两个或更多个存储器模块具有连接到相同数据线的各自的数据输出的存储器系统。每个模块包括用于在其输出处检查正在读出的数据的奇偶校验以及在奇偶校验错误指示的情况下有效地将其输出与数据线断开的装置。

47. 发明授权

US08350588B2 Deactivation of integrated circuits 有权
标题翻译：集成电路的停用
公开(公告)号：US08350588B2
公开(公告)日：2013-01-08
申请号：US13079754
申请日：2011-04-04
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： H03K19/00
CPC分类号： H03K19/173 , G06F21/35 , G06F21/6209 , G06F21/77 , G06F2221/2143 , G06F2221/2147 , G06K19/07309
摘要： Integrated circuits and methods of permanently disabling integrated circuits are disclosed. An integrated circuit having an erasable non-volatile memory adapted to store an activation code and logic to disable the integrated circuit when the code in the erasable non-volatile memory has been altered or erased after it has been separated from a substrate, is placed into an electromagnetic field of sufficient power to erase or reprogram the erasable non-volatile memory. The entire integrated circuit is permanently disabled by erasing, altering, or reprogramming the erasable non-volatile memory. In preferred embodiments, the integrated circuit comprises a non-erasable non-volatile memory storing the activation code, and circuitry adapted to permanently disable the integrated circuit when the code in the erasable non-volatile memory does not match the activation code in the non-erasable non-volatile memory. Erasing, altering, or reprogramming the erasable non-volatile memory results in a mismatch of the non-volatile memories, which permanently deactivates the integrated circuit.
摘要翻译：公开了永久禁用集成电路的集成电路和方法。一种具有可擦除非易失性存储器的集成电路，其适于存储当可擦除非易失性存储器中的代码在与基板分离之后被改变或擦除时禁用集成电路的激活码和逻辑，具有足够功率以消除或重新编程可擦除非易失性存储器的电磁场。整个集成电路通过擦除，更改或重新编程可擦除的非易失性存储器而永久禁用。在优选实施例中，集成电路包括存储激活码的不可擦除非易失性存储器，以及适于在可擦除非易失性存储器中的代码与非易失性存储器中的激活码不匹配时永久禁用集成电路的电路，可擦除非易失性存储器。擦除，改变或重新编程可擦除的非易失性存储器会导致永久停用集成电路的非易失性存储器的不匹配。

48. 发明申请

US20120146769A1 INTEGRATED CIRCUITS WITH PERSISTENT DATA STORAGE 有权
标题翻译：具有持续数据存储的集成电路
公开(公告)号：US20120146769A1
公开(公告)日：2012-06-14
申请号：US13276222
申请日：2011-10-18
申请人： Curtis L. Carrender , Roger G. Stewart , John H. Rolin , Ronald Gilbert
发明人： Curtis L. Carrender , Roger G. Stewart , John H. Rolin , Ronald Gilbert
IPC分类号： G06K7/01 , G06K19/073
CPC分类号： G06K19/0723 , G06K7/10019 , G06K19/07381
摘要： The circuitry introduced in this invention selectively slows down the functioning of an electronic circuit maintaining a particular state for a prolonged period of time. This circuitry is used not only to achieve the desired effect in maintaining security from electronic thieves trying to circumvent codes but also in other applications such as enabling a circuit to continue to function in the event of a brief loss of power. For example, in an RFID system, if a reader is frequency hopping, a tag loses power for as long as about 400 milliseconds when the reader changes to other frequencies. In a preferred embodiment, the disclosed circuitry is used in conjunction with a destruct sequence.
摘要翻译：在本发明中引入的电路选择性地减慢保持特定状态长时间的电子电路的功能。该电路不仅用于在维护电子窃贼试图绕过代码的安全性方面实现期望的效果，而且在其他应用中，例如使电路在短暂的功率损失的情况下继续工作。例如，在RFID系统中，如果读取器跳频，当读取器改变到其他频率时，标签失去长达约400毫秒的功率。在优选实施例中，所公开的电路与破坏序列结合使用。

49. 发明授权

US08059478B2 Low cost testing and sorting for integrated circuits 有权
标题翻译：集成电路的低成本测试和排序
公开(公告)号：US08059478B2
公开(公告)日：2011-11-15
申请号：US12328675
申请日：2008-12-04
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G11C29/00
CPC分类号： G11C29/006 , G11C29/38 , G11C2029/4002
摘要： Methods of testing and sorting integrated circuits in clusters are disclosed. Each cluster has power and data terminals connected to common power and data busses providing a common power supply. Each integrated circuit has a first non-volatile memory storing an activation code and a second programmable non-volatile memory that is capable of storing the activation code. If an integrated circuit passes testing, the activation code stored in the first non-volatile memory is written into the second non-volatile memory. An integrated circuit is independently functional upon separation from the cluster if the codes in the first and second non-volatile memories match. Upon separation, integrated circuits are queried to determine which respond. Each integrated circuit includes logic adapted to determine whether the codes in the first and second non-volatile memories match. If the codes do not match, the logic permanently disables the integrated circuit upon separation from the cluster.
摘要翻译：公开了集群中集成电路的测试和分类方法。每个集群的电源和数据终端连接到公共电源和数据总线，提供公共电源。每个集成电路具有存储激活码的第一非易失性存储器和能够存储激活码的第二可编程非易失性存储器。如果集成电路通过测试，则将存储在第一非易失性存储器中的激活码写入第二非易失性存储器。如果第一和第二非易失性存储器中的代码匹配，则与集群分离时，集成电路是独立的。分离后，查询集成电路以确定哪些响应。每个集成电路包括适于确定第一和第二非易失性存储器中的代码是否匹配的逻辑。如果代码不匹配，则与集群分离时，逻辑将永久禁用集成电路。

50. 发明授权

US08056818B2 Integrated circuits with persistent data storage 有权
标题翻译：具有持久数据存储的集成电路
公开(公告)号：US08056818B2
公开(公告)日：2011-11-15
申请号：US12111140
申请日：2008-04-28
申请人： Roger G. Stewart , John Rolin
发明人： Roger G. Stewart , John Rolin
IPC分类号： G06K19/06
CPC分类号： G06K19/0723 , G06K7/10019 , G06K19/07381
摘要： The circuitry introduced in this invention selectively slows down the functioning of an electronic circuit maintaining a particular state for a prolonged period of time. This circuitry is used not only to achieve the desired effect in maintaining security from electronic thieves trying to circumvent codes but also in other applications such as enabling a circuit to continue to function in the event of a brief loss of power. For example, in an RFID system, if a reader is frequency hopping, a tag loses power for as long as about 400 milliseconds when the reader changes to other frequencies. In a preferred embodiment, the disclosed circuitry is used in conjunction with a destruct sequence.
摘要翻译：在本发明中引入的电路选择性地减慢保持特定状态长时间的电子电路的功能。该电路不仅用于在维护电子窃贼试图绕过代码的安全性方面实现期望的效果，而且在其他应用中，例如使电路在短暂的功率损失的情况下继续工作。例如，在RFID系统中，如果读取器跳频，当读取器改变到其他频率时，标签失去长达约400毫秒的功率。在优选实施例中，所公开的电路与破坏序列结合使用。

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