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41. 发明授权

US09275933B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09275933B2
公开(公告)日：2016-03-01
申请号：US13526533
申请日：2012-06-19
申请人： Chien-Li Kuo , Yung-Chang Lin
发明人： Chien-Li Kuo , Yung-Chang Lin
IPC分类号： H01L29/49 , H01L23/48 , H01L21/768
CPC分类号： H01L21/76898 , H01L21/76802 , H01L21/76843 , H01L21/76877 , H01L21/823475 , H01L23/481 , H01L29/0649 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device includes a substrate; an inter layer dielectric disposed on the substrate; a TSV penetrating the substrate and the ILD. In addition, a plurality of shallow trench isolations (STI) is disposed in the substrate, and a shield ring is disposed in the ILD surrounding the TSV on the STI. During the process of forming the TSV, the contact ring can protect adjacent components from metal contamination.
摘要翻译：半导体器件包括衬底; 设置在所述基板上的层间电介质; 穿透底物和ILD的TSV。此外，在衬底中设置多个浅沟槽隔离（STI），并且屏蔽环设置在围绕STI上的TSV的ILD中。在形成TSV的过程中，接触环可以保护邻近部件免受金属污染。

42. 发明授权

US08871302B2 Chemical vapor deposition of graphene on dielectrics 有权
标题翻译：石墨烯化学气相沉积在电介质上
公开(公告)号：US08871302B2
公开(公告)日：2014-10-28
申请号：US13592957
申请日：2012-08-23
申请人： Po-Yuan Teng , Yung-Chang Lin , Po-Wen Chiu
发明人： Po-Yuan Teng , Yung-Chang Lin , Po-Wen Chiu
IPC分类号： C23C16/26
CPC分类号： C23C16/02 , B82Y30/00 , B82Y40/00 , C01B32/186 , C23C16/26
摘要： A method for synthesizing graphene films is disclosed. Monolayer or multilayer graphene can be directly grown on the dielectric materials. The method includes the following steps: disposing dielectric materials and metals in a reactor, introducing reaction gases into the reactor and decomposing the reaction gases by heating, thus directly depositing graphene films on the surfaces of the dielectrics. High crystalline quality and low-defect graphene films can be synthesized directly on dielectric materials, without the process of wet etching and transfer. The method opens up a more direct route to apply graphene on electronics, optoelectronics, and bio-medical devices.
摘要翻译：公开了一种用于合成石墨烯薄膜的方法。单层或多层石墨烯可直接生长在电介质材料上。该方法包括以下步骤：将电介质材料和金属放置在反应器中，将反应气体引入反应器并通过加热分解反应气体，从而在电介质的表面上直接沉积石墨烯膜。可以直接在电介质材料上合成高结晶质量和低缺陷石墨烯膜，无需湿蚀刻和转印。该方法开辟了一条更直接的途径，将石墨烯应用于电子，光电子和生物医疗设备。

43. 发明授权

US08748961B2 Buried bit line process and scheme 有权
标题翻译：埋位式流程和方案
公开(公告)号：US08748961B2
公开(公告)日：2014-06-10
申请号：US12940207
申请日：2010-11-05
申请人： Le-Tien Jung , Yung-Chang Lin
发明人： Le-Tien Jung , Yung-Chang Lin
IPC分类号： H01L29/94
CPC分类号： H01L27/10885 , H01L21/743 , H01L27/10876 , H01L27/10888
摘要： The embodiment provides a buried bit line process and scheme. The buried bit line is disposed in a trench formed in a substrate. The buried bit line includes a diffusion region formed in a portion of the substrate adjacent the trench. A blocking layer is formed on a portion sidewall of the trench. A conductive plug is formed in the trench, covering sidewalls of the diffusion region and the blocking layer.
摘要翻译：该实施例提供了一种掩埋位线处理和方案。掩埋位线设置在形成在衬底中的沟槽中。掩埋位线包括形成在与沟槽相邻的衬底的一部分中的扩散区域。阻挡层形成在沟槽的一部分侧壁上。导电插塞形成在沟槽中，覆盖扩散区域和阻挡层的侧壁。

44. 发明申请

US20130334699A1 SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130334699A1
公开(公告)日：2013-12-19
申请号：US13526546
申请日：2012-06-19
申请人： Chien-Li Kuo , Yung-Chang Lin
发明人： Chien-Li Kuo , Yung-Chang Lin
IPC分类号： H01L23/498 , H01L21/768
CPC分类号： H01L21/76898 , H01L21/0228 , H01L21/02282 , H01L21/28026 , H01L21/31111 , H01L21/76224 , H01L21/76802 , H01L21/76831 , H01L21/76843 , H01L21/76877 , H01L2224/05009 , H01L2224/0557 , H01L2224/06181
摘要： A semiconductor device includes a substrate with a front side and a back side, an ILD, disposed on the substrate, a cap layer disposed on the backside of the substrate, a TSV penetrating the cap layer, the substrate and the ILD, wherein a cap layer sidewall in the TSV juts out beyond the substrate sidewall the TSV with a predetermined distance, and a liner is disposed on the substrate sidewall, wherein the liner partially overlaps with the cap layer.
摘要翻译：一种半导体器件包括具有正面和背面的衬底，设置在衬底上的ILD，设置在衬底背面上的覆盖层，穿透覆盖层，衬底和ILD的TSV，其中帽 TSV中的层侧壁突出超过基板侧壁具有预定距离的TSV，并且衬垫设置在衬底侧壁上，其中衬垫部分地与盖层重叠。

45. 发明申请

US20130334669A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130334669A1
公开(公告)日：2013-12-19
申请号：US13526533
申请日：2012-06-19
申请人： Chien-Li Kuo , Yung-Chang Lin
发明人： Chien-Li Kuo , Yung-Chang Lin
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H01L21/76898 , H01L21/76802 , H01L21/76843 , H01L21/76877 , H01L21/823475 , H01L23/481 , H01L29/0649 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device includes a substrate; an inter layer dielectric disposed on the substrate; a TSV penetrating the substrate and the ILD. In addition, a plurality of shallow trench isolations (STI) is disposed in the substrate, and a shield ring is disposed in the ILD surrounding the TSV on the STI. During the process of forming the TSV, the contact ring can protect adjacent components from metal contamination.
摘要翻译：半导体器件包括衬底; 设置在所述基板上的层间电介质; 穿透底物和ILD的TSV。此外，在衬底中设置多个浅沟槽隔离（STI），并且屏蔽环设置在围绕STI上的TSV的ILD中。在形成TSV的过程中，接触环可以保护邻近部件免受金属污染。

46. 发明申请

US20130236051A1 COMPUTER READABLE MEDIA CAN PERFORM INTERFERENCE IMAGE DETERMINING METHOD AND INTERFERENCE IMAGE DETERMINING APPARATUS 有权
标题翻译：计算机可读介质可以执行干扰图像确定方法和干扰图像确定设备
公开(公告)号：US20130236051A1
公开(公告)日：2013-09-12
申请号：US13562285
申请日：2012-07-30
申请人： Hsin-Chia Chen , Yen-Min Chang , Yu-Hao Huang , Wen-Han Yao , Ching-Lin Chung , Yung-Chang Lin , Tsung-Fa Wang , Ming-Tsan Kao
发明人： Hsin-Chia Chen , Yen-Min Chang , Yu-Hao Huang , Wen-Han Yao , Ching-Lin Chung , Yung-Chang Lin , Tsung-Fa Wang , Ming-Tsan Kao
IPC分类号： G06K9/62
CPC分类号： G06F3/03547 , G06F3/042 , G06F2203/0338
摘要： A computer readable media having at least one program code recorded thereon. An interference image determining method can be performed when the program code is read and executed. The interference image determining method comprises: (a) controlling a light source to illuminate an object on a detecting surface to generate an image; (b) controlling a sensor to catch a current frame of the image; (c) utilizing an image characteristic included in the current frame to determine a interference image part of the current frame; and (d) updating a defined interference image according to the determined interference image part.
摘要翻译：一种其上记录有至少一个程序代码的计算机可读介质。当读取和执行程序代码时，可以执行干涉图像确定方法。干扰图像确定方法包括：（a）控制光源照射检测表面上的物体以产生图像; （b）控制传感器以捕获图像的当前帧; （c）利用包括在当前帧中的图像特性来确定当前帧的干扰图像部分; 以及（d）根据确定的干涉图像部分更新所定义的干涉图像。

47. 发明申请

US20120225524A1 METHOD OF FORMING AN ELECTRICAL FUSE AND A METAL GATE TRANSISTOR AND THE RELATED ELECTRICAL FUSE 有权
公开(公告)号：US20120225524A1
公开(公告)日：2012-09-06
申请号：US13469069
申请日：2012-05-10
申请人： Yung-Chang Lin , Kuei-Sheng Wu , Chang-Chien Wong
发明人： Yung-Chang Lin , Kuei-Sheng Wu , Chang-Chien Wong
IPC分类号： H01L21/8232
CPC分类号： H01L23/5256 , H01L21/823807 , H01L21/823814 , H01L27/0629 , H01L27/112 , H01L27/11206 , H01L29/7843 , H01L29/7848 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method of integrating an electrical fuse process into a high-k/metal gate process. The method simultaneously forms a dummy gate stack of a transistor and a dummy gate stack of an e-fuse; and simultaneously removes the polysilicon of the dummy gate stack in the transistor region and the polysilicon of the dummy gate stack in the e-fuse region. Thereafter, the work function metal layer disposed in the opening of the e-fuse region is removed; and the opening in the transistor region and the opening in the e-fuse region with metal conductive structures are filled to form an e-fuse and a metal gate of a transistor.

48. 发明申请

US20110244640A1 METHOD OF MANUFACTURING FLASH MEMORY CELL 有权
标题翻译：制造闪存存储单元的方法
公开(公告)号：US20110244640A1
公开(公告)日：2011-10-06
申请号：US13047758
申请日：2011-03-14
申请人： Yung-Chang Lin , Nan-Ray Wu , Le-Tien Jung
发明人： Yung-Chang Lin , Nan-Ray Wu , Le-Tien Jung
IPC分类号： H01L21/336 , H01L21/3205 , H01L21/76
CPC分类号： H01L27/11524 , H01L21/28273 , H01L27/11526 , H01L27/11536 , H01L27/1157 , H01L29/4983 , H01L29/512 , H01L29/6659 , H01L29/7833 , H01L29/7881
摘要： A method of manufacturing a flash memory cell includes providing a substrate having a first dielectric layer formed thereon, forming a control gate on the first dielectric layer, forming an oxide-nitride-oxide (ONO) spacer on sidewalls of the control gate, forming a second dielectric layer on the substrate at two sides of the ONO spacer, and forming a floating gate at outer sides of the ONO spacer on the second dielectric layer, respectively.
摘要翻译：制造闪速存储单元的方法包括提供其上形成有第一介电层的基板，在第一介电层上形成控制栅极，在控制栅极的侧壁上形成氧化物 - 氧化物（ONO）间隔物，形成在ONO间隔物两侧的衬底上的第二电介质层，并分别在第二电介质层上的ONO间隔物的外侧形成浮栅。

49. 发明授权

US07876111B1 System for measuring opposite sides of a wireless communication apparatus 有权
标题翻译：用于测量无线通信装置的相对侧的系统
公开(公告)号：US07876111B1
公开(公告)日：2011-01-25
申请号：US12880468
申请日：2010-09-13
申请人： Yung-Chang Lin
发明人： Yung-Chang Lin
IPC分类号： G01R31/01
CPC分类号： G01R31/2815 , G01R31/3025
摘要： A measuring system for testing and measuring a wireless communication apparatus includes a plurality of first probes, a plurality of second probes, and a control module. The first probes are arranged to face toward a first side of the wireless communication apparatus for testing and measuring a plurality of first test points provided on the first side of the wireless communication apparatus. The second probes are arranged to face toward an opposite second side of the wireless communication apparatus for testing and measuring a plurality of second test points provided on the second side of the wireless communication apparatus. The first and second probes detect wireless signals of the wireless communication apparatus via the first and second test points, respectively. The control module is electrically connected to the first probes and the second probes for receiving a plurality of measuring signals transmitted from the first and the second probes.
摘要翻译：用于测试和测量无线通信设备的测量系统包括多个第一探针，多个第二探针和控制模块。第一探针被布置为面向无线通信设备的第一侧，用于测试和测量设置在无线通信设备的第一侧上的多个第一测试点。第二探针被布置为面向无线通信设备的相对的第二侧，用于测试和测量设置在无线通信设备的第二侧上的多个第二测试点。第一和第二探针分别经由第一和第二测试点检测无线通信设备的无线信号。控制模块电连接到第一探头和第二探头，用于接收从第一和第二探头发送的多个测量信号。

50. 发明申请

US20090236583A1 Method of fabricating a phase change memory and phase change memory 有权
标题翻译：制造相变存储器和相变存储器的方法
公开(公告)号：US20090236583A1
公开(公告)日：2009-09-24
申请号：US12053623
申请日：2008-03-24
申请人： Chien-Li Kuo , Kuei-Sheng Wu , Yung-Chang Lin
发明人： Chien-Li Kuo , Kuei-Sheng Wu , Yung-Chang Lin
IPC分类号： H01L45/00
CPC分类号： H01L45/1233 , G11C13/0004 , G11C13/0069 , G11C2013/008 , H01L27/2436 , H01L45/06 , H01L45/126 , H01L45/143 , H01L45/144 , H01L45/1683 , Y10S438/90
摘要： The present invention relates to a phase change memory and a method of fabricating a phase change memory. The phase change memory includes a heater structure disposed on a phase change material pattern, wherein the heater structure is in a tapered shape with a bottom portion contacting the phase change material pattern. The fabrication of the phase change memory is compatible with the fabrication of logic devices, and accordingly an embedded phase change memory can be fabricated.
摘要翻译：本发明涉及相变存储器和相变存储器的制造方法。相变存储器包括设置在相变材料图案上的加热器结构，其中加热器结构呈锥形，底部接触相变材料图案。相变存储器的制造与逻辑器件的制造兼容，因此可以制造嵌入式相变存储器。

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