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41. 发明授权

US08786054B2 Structure for integrated circuit alignment 有权
标题翻译：集成电路对准的结构
公开(公告)号：US08786054B2
公开(公告)日：2014-07-22
申请号：US12619460
申请日：2009-11-16
申请人： Yu-Chyi Harn , Sophia Wang , Chun-Hung Lin , Hsien-Wei Chen , Ming-Yen Chiu
发明人： Yu-Chyi Harn , Sophia Wang , Chun-Hung Lin , Hsien-Wei Chen , Ming-Yen Chiu
IPC分类号： H01L23/48
CPC分类号： G03F9/7084 , H01L2924/0002 , H01L2924/00
摘要： A method and device for pattern alignment are disclosed. The device can include an exposure field; a die within the exposure field, wherein the die comprises an integrated circuit region, a seal ring region, and a corner stress relief region; and a die alignment mark disposed between the seal ring region and the corner stress relief region.
摘要翻译：公开了一种用于图案对准的方法和装置。该装置可以包括曝光场; 在所述曝光场内的管芯，其中所述管芯包括集成电路区域，密封环区域和拐角应力释放区域; 以及设置在密封环区域和角部应力消除区域之间的模具对准标记。

42. 发明授权

US08674355B2 Integrated circuit test units with integrated physical and electrical test regions 有权
标题翻译：集成电路测试单元，具有集成的物理和电气测试区域
公开(公告)号：US08674355B2
公开(公告)日：2014-03-18
申请号：US12980865
申请日：2010-12-29
申请人： Huan-Chi Tseng , Heng-Hsin Liu , Shu-Cheng Kuo , Chien-Chang Lee , Chun-Hung Lin
发明人： Huan-Chi Tseng , Heng-Hsin Liu , Shu-Cheng Kuo , Chien-Chang Lee , Chun-Hung Lin
IPC分类号： H01L23/58
CPC分类号： H01L23/544 , H01L22/34 , H01L23/4824 , H01L2223/54426 , H01L2924/0002 , H01L2924/00
摘要： A device includes a test unit in a die. The test unit includes a physical test region including an active region, and a plurality of conductive lines over the active region and parallel to each other. The plurality of conductive lines has substantially a uniform spacing, wherein no contact plugs are directly over and connected to the plurality of conductive lines. The test unit further includes an electrical test region including a transistor having a gate formed of a same material, and at a same level, as the plurality of conductive lines; and contact plugs connected to a source, a drain, and the gate of the transistor. The test unit further includes an alignment mark adjacent the physical test region and the electrical test region.
摘要翻译：一种装置包括在模具中的测试单元。测试单元包括物理测试区域，该物理测试区域包括有源区域和在该有源区域上并且彼此平行的多个导电线。多个导线具有基本上均匀的间隔，其中没有接触插塞直接在多个导线上并连接到多个导线。测试单元还包括电测试区域，该电测试区域包括晶体管，该晶体管具有由相同材料形成的栅极，并且处于与多个导线相同的电平; 以及连接到晶体管的源极，漏极和栅极的接触插塞。测试单元还包括邻近物理测试区域和电测试区域的对准标记。

43. 发明申请

US20130320463A1 PACKAGE STRUCTURE HAVING MEMS ELEMENT AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：具有MEMS元件的包装结构及其制造方法
公开(公告)号：US20130320463A1
公开(公告)日：2013-12-05
申请号：US13588113
申请日：2012-08-17
申请人： Hong-Da Chang , Cheng-Hsiang Liu , Kuang-Wei Huang , Chun-Hung Lin , Hsin-Yi Liao
发明人： Hong-Da Chang , Cheng-Hsiang Liu , Kuang-Wei Huang , Chun-Hung Lin , Hsin-Yi Liao
IPC分类号： H01L29/84 , H01L21/60
CPC分类号： H01L24/19 , B81B7/007 , B81B2207/098 , H01L21/561 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/92 , H01L24/94 , H01L24/97 , H01L2223/54426 , H01L2224/12105 , H01L2224/32145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48464 , H01L2224/49107 , H01L2224/49109 , H01L2224/73265 , H01L2224/83191 , H01L2224/92247 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/06562 , H01L2924/00014 , H01L2924/12042 , H01L2924/1433 , H01L2924/1461 , H01L2924/181 , H01L2224/85 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A package structure includes: a substrate having a plurality of first conductive pads and a plurality of second conductive pads; an MEMS element disposed on the substrate; a cover member disposed on the MEMS element and having a metal layer formed thereon; a plurality of bonding wires electrically connected to the MEMS element and the second conductive pads of the substrate; a plurality of first wire segments, each having one end electrically connected to a corresponding one of the first conductive pads; and an encapsulant formed on the substrate and encapsulating the MEMS element, the cover member, the first wire segments and the bonding wires, wherein the other end of each of the first wire segments is exposed from the encapsulant. Compared with the prior art, the package structure of the present invention has improved overall yield and functionality.
摘要翻译：封装结构包括：具有多个第一导电焊盘和多个第二导电焊盘的衬底; 设置在所述基板上的MEMS元件; 盖构件，其设置在所述MEMS元件上并且在其上形成有金属层; 电连接到所述MEMS元件和所述基板的所述第二导电焊盘的多个接合线; 多个第一线段，每个第一线段的一端电连接到相应的一个第一导电焊盘; 以及形成在所述衬底上并封装所述MEMS元件，所述盖构件，所述第一线段和所述接合线的密封剂，其中所述第一线段中的每一个的另一端从所述密封剂暴露。与现有技术相比，本发明的封装结构具有改善的总产率和功能。

44. 发明授权

US08390991B2 Stacked solid-state electrolytic capacitor with multi-directional product lead frame structure 有权
标题翻译：堆叠式固态电解电容器具有多方向产品引线框架结构
公开(公告)号：US08390991B2
公开(公告)日：2013-03-05
申请号：US12833421
申请日：2010-07-09
申请人： Chi-Hao Chiu , Yui-Shin Fran , Ching-Feng Lin , Chun-Chia Huang , Chun-Hung Lin , Wen-Yen Huang
发明人： Chi-Hao Chiu , Yui-Shin Fran , Ching-Feng Lin , Chun-Chia Huang , Chun-Hung Lin , Wen-Yen Huang
IPC分类号： H01G9/04 , H01G9/15 , H01G4/228
CPC分类号： H01G9/00
摘要： A stacked solid state solid electrolytic capacitor includes a plurality of capacitor units, a substrate unit and a package unit. The substrate unit includes a positive guiding substrate and a negative guiding substrate. The positive guiding substrate has a positive exposed end integrally extended therefrom along a first predetermined direction. The negative guiding substrate has a first negative exposed end integrally extended therefrom along a second predetermined direction, a second negative exposed end integrally extended therefrom along a third predetermined direction, and a third negative exposed end integrally extended therefrom along a fourth predetermined direction. The first, the second, the third and the fourth predetermined directions are different. The capacitor units are stacked on top of one another and disposed on the negative guiding substrate. The package unit encloses the capacitor units, one part of the positive and one part of the negative guiding substrate.
摘要翻译：堆叠的固态固体电解电容器包括多个电容器单元，基板单元和封装单元。基板单元包括正引导基板和负引导基板。正引导基板具有沿着第一预定方向从其一体延伸的正露出端。负引导基板具有沿着第二预定方向从其一体地延伸的第一负外露端，沿着第三预定方向从其一体地延伸的第二负外露端，以及沿着第四预定方向从其一体地延伸的第三负外露端。第一，第二，第三和第四预定方向是不同的。电容器单元堆叠在彼此的顶部并且设置在负引导基板上。封装单元包围电容器单元，正极的一部分和负引导基板的一部分。

45. 发明授权

US08253010B2 Solar cell with two exposed surfaces of ARC layer disposed at different levels 失效
标题翻译：具有ARC层的两个暴露表面的太阳能电池处于不同的水平
公开(公告)号：US08253010B2
公开(公告)日：2012-08-28
申请号：US12100786
申请日：2008-04-10
申请人： Sheng Yung Liu , Chin-Tien Yang , Chun-Hung Lin
发明人： Sheng Yung Liu , Chin-Tien Yang , Chun-Hung Lin
IPC分类号： H01L31/00
CPC分类号： H01L31/022433 , H01L31/02168 , Y02E10/50 , Y02E10/52
摘要： A solar cell includes a substrate, a conductor layer and an anti-reflection coating (ARC) layer. The substrate has a front side, a back side and a doped region adjacent to the front side. The conductor layer has a first portion embedded into the doped region and a second portion other than the first portion. The ARC layer has first and second exposed surfaces, first and second side surfaces and a bottom surface. The first side surface is connected to the first and second exposed surfaces. The second side surface is connected to the second exposed surface and the bottom surface disposed on the front side. The second portion is disposed in the ARC layer. The conductor layer has an exposed surface, which is exposed out of the ARC layer, and higher than the second exposed surface and substantially flush with an exposed surface of the ARC layer.
摘要翻译：太阳能电池包括基板，导体层和抗反射涂层（ARC）层。衬底具有与前侧相邻的前侧，后侧和掺杂区。导体层具有嵌入掺杂区域中的第一部分和除第一部分之外的第二部分。 ARC层具有第一和第二暴露表面，第一和第二侧表面和底表面。第一侧表面连接到第一和第二暴露表面。第二侧表面连接到第二暴露表面和设置在前侧的底表面。第二部分设置在ARC层中。导体层具有暴露于ARC层之外的暴露表面，并且高于第二暴露表面并且基本上与ARC层的暴露表面齐平。

46. 发明申请

US20120168751A1 Integrated Circuit Test Units with Integrated Physical and Electrical Test Regions 有权
标题翻译：具有综合物理和电气测试区域的集成电路测试单元
公开(公告)号：US20120168751A1
公开(公告)日：2012-07-05
申请号：US12980865
申请日：2010-12-29
申请人： Huan-Chi Tseng , Heng-Hsin Liu , Shu-Cheng Kuo , Chien-Chang Lee , Chun-Hung Lin
发明人： Huan-Chi Tseng , Heng-Hsin Liu , Shu-Cheng Kuo , Chien-Chang Lee , Chun-Hung Lin
IPC分类号： H01L23/58
CPC分类号： H01L23/544 , H01L22/34 , H01L23/4824 , H01L2223/54426 , H01L2924/0002 , H01L2924/00
摘要： A device includes a test unit in a die. The test unit includes a physical test region including an active region, and a plurality of conductive lines over the active region and parallel to each other. The plurality of conductive lines has substantially a uniform spacing, wherein no contact plugs are directly over and connected to the plurality of conductive lines. The test unit further includes an electrical test region including a transistor having a gate formed of a same material, and at a same level, as the plurality of conductive lines; and contact plugs connected to a source, a drain, and the gate of the transistor. The test unit further includes an alignment mark adjacent the physical test region and the electrical test region.
摘要翻译：一种装置包括在模具中的测试单元。测试单元包括物理测试区域，该物理测试区域包括有源区域和在该有源区域上并且彼此平行的多个导电线。多个导线具有基本上均匀的间隔，其中没有接触插塞直接在多个导线上并连接到多个导线。测试单元还包括电测试区域，该电测试区域包括晶体管，该晶体管具有由相同材料形成的栅极，并且处于与多个导线相同的电平; 以及连接到晶体管的源极，漏极和栅极的接触插塞。测试单元还包括邻近物理测试区域和电测试区域的对准标记。

47. 发明申请

US20120114949A1 pH-Adjusting Textile Containing Amphoteric Polymer Composite Nanoparticles 审中-公开
标题翻译：含有两性聚合物复合纳米颗粒的pH调节纺织品
公开(公告)号：US20120114949A1
公开(公告)日：2012-05-10
申请号：US13347755
申请日：2012-01-11
申请人： Jia-Peng Lin , Pui-Leng Lai , Wan-Ling Lu , Ding-Han Huang , Chao-Huei Liu , Chun-Hung Lin
发明人： Jia-Peng Lin , Pui-Leng Lai , Wan-Ling Lu , Ding-Han Huang , Chao-Huei Liu , Chun-Hung Lin
IPC分类号： B32B27/08 , C08L33/26
CPC分类号： C08L33/26 , C08F212/08 , C08F285/00 , C08F2438/03 , C08L33/02 , C08L35/06 , C08L51/003 , C08L67/02 , C08L2203/02 , D01F1/10 , D01F1/103 , Y10T428/249938 , Y10T428/2998 , Y10T442/68 , Y10T442/681 , Y10T442/696 , Y10T442/698 , Y10T442/699 , C08F220/06 , C08L2666/02 , C08L2666/24 , C08F220/56
摘要： Amphoteric polymer composite nanoparticles are added into the polymer grains of synthetic fibers. The synthetic fibers are woven to form a textile capable of adjusting pH value.
摘要翻译：将两性聚合物复合纳米颗粒加入到合成纤维的聚合物颗粒中。合成纤维被织造以形成能够调节pH值的织物。

48. 发明授权

US08158211B2 Anti-reflection plate and method for manufacturing anti-reflection structure thereof 有权
标题翻译：防反射板及其防反射结构的制造方法
公开(公告)号：US08158211B2
公开(公告)日：2012-04-17
申请号：US12343540
申请日：2008-12-24
申请人： Chih-Wei Chen , Chin-Jyi Wu , Wen-Tzong Hsieh , Wen-Tung Hsu , Chun-Hung Lin
发明人： Chih-Wei Chen , Chin-Jyi Wu , Wen-Tzong Hsieh , Wen-Tung Hsu , Chun-Hung Lin
IPC分类号： H05H1/00 , C23C4/00
CPC分类号： G02B1/118 , B32B1/08 , C23C4/00 , Y10T428/24496 , Y10T428/24612
摘要： A method for manufacturing an anti-reflection structure is provided. The method includes the following steps: First, a to-be-treated object is provided in a reactive area. Next, a plasma source is provided in the reactive area. Then, the plasma source is ionized to form plasma in atmospheric pressure. Next, the surface of the to-be-treated object is treated by plasma so as to form a plurality of micro-protuberances on the surface of the to-be-treated object.
摘要翻译：提供一种制造防反射结构的方法。该方法包括以下步骤：首先，在被动对象区域中提供被处理对象。接下来，在反应区域中设置等离子体源。然后，等离子体源被离子化以在大气压下形成等离子体。接下来，待处理物体的表面通过等离子体处理，以在待处理物体的表面上形成多个微突起。

49. 发明申请

US20120036566A1 AUTOMATIC CONFIGURATION AND CONTINUATION OF FEDERATION RELATIONSHIPS 有权
标题翻译：自动配置与联合关系的持续性
公开(公告)号：US20120036566A1
公开(公告)日：2012-02-09
申请号：US12852209
申请日：2010-08-06
申请人： David J. Nicholson , David Lewis Fisher , Michael D. Ritche , Chun-Hung Lin , Christopher B. Dove , Kavitha Radhakrishnan
发明人： David J. Nicholson , David Lewis Fisher , Michael D. Ritche , Chun-Hung Lin , Christopher B. Dove , Kavitha Radhakrishnan
IPC分类号： G06F21/20 , G06F11/07
CPC分类号： H04L63/0815 , H04L63/0876 , H04L63/126
摘要： Embodiments are directed to establishing the integrity of a portion of data on at least one level of a plurality of network stack levels and automatically continuing an established federation relationship between at least two federation computer systems. In an embodiment, a first federation computer system receives a digital signature corresponding to a computer system signed by a digital signature which includes the computer system's identity and other federation relationship information configured to establish a trusted federation relationship between a first federation computer system and a second federation computer system. The first federation computer system attempts to validate the received digital signature at a first level of a network stack and determines that the validation at the first network stack layer was unsuccessful. The first federation computer system then validates the received digital signature at a second, different level of the network stack.
摘要翻译：实施例涉及在多个网络堆栈级别的至少一个级别上建立数据的一部分的完整性，并且自动地在至少两个联合计算机系统之间继续建立的联合关系。在一个实施例中，第一联合计算机系统接收与由数字签名签名的计算机系统相对应的数字签名，数字签名包括计算机系统的身份和其他联合关系信息，其被配置为在第一联合计算机系统和第二联合计算机系统之间建立信任的联合关系联合计算机系统。第一联合计算机系统尝试在网络堆栈的第一级验证接收到的数字签名，并确定第一网络堆栈层的验证不成功。第一联合计算机系统然后在网络堆栈的第二个不同级别验证所接收的数字签名。

50. 发明授权

US08068208B2 System and method for improving immersion scanner overlay performance 有权
标题翻译：提高浸没式扫描仪覆盖性能的系统和方法
公开(公告)号：US08068208B2
公开(公告)日：2011-11-29
申请号：US11677949
申请日：2007-02-22
申请人： Jui-Chung Peng , Tzung-Chi Fu , Chin-Hsiang Lin , Chien-Hsun Lin , Chun-Hung Lin , Yao-Wen Guo , Shy-Jay Lin , Heng-Hsin Liu
发明人： Jui-Chung Peng , Tzung-Chi Fu , Chin-Hsiang Lin , Chien-Hsun Lin , Chun-Hung Lin , Yao-Wen Guo , Shy-Jay Lin , Heng-Hsin Liu
IPC分类号： G03B27/52 , G03B27/68 , G03B27/42 , G03B27/58 , G03B27/60 , G03B27/32
CPC分类号： G03F7/70875 , G03F7/70341 , G03F7/70783
摘要： System and method for improving immersion scanner overlay performance are described. One embodiment is a method of improving overlay performance of an photolithography immersion scanner including a wafer table having lens cooling water (“LCW”) disposed in a water channel therein, the wafer table having an input for receiving the LCW into the water channel and an output for expelling the LCW from the water channel. The method includes providing a water tank that connects to at least one of the wafer table input and the wafer table output; monitoring a pressure of water in the water tank; and maintaining the pressure of the water in the water tank at a predetermined level.
摘要翻译：描述了用于提高浸没式扫描仪覆盖性能的系统和方法。一个实施例是一种提高光刻浸没扫描仪的覆盖性能的方法，该扫描仪包括设置在其中的水通道中的具有透镜冷却水（“LCW”）的晶片台，晶片台具有用于将LCW接收到水通道中的输入端，输出用于从水道排出LCW。该方法包括：提供连接到晶片台输入和晶片台输出中的至少一个的水箱; 监测水箱内的水压; 并且将水箱中的水的压力保持在预定水平。

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