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41. 发明申请

US20080308803A1 Thin film transistor and display panel having the same 有权
标题翻译：薄膜晶体管和显示面板具有相同的功能
公开(公告)号：US20080308803A1
公开(公告)日：2008-12-18
申请号：US12157007
申请日：2008-06-05
申请人： Sung-Hoon Kim
发明人： Sung-Hoon Kim
IPC分类号： H01L29/04
CPC分类号： H01L29/41733 , H01L27/124 , H01L29/42384 , H01L29/78633
摘要： A thin film transistor includes a gate part which includes a gate electrode and a light blocking electrode extending from the gate electrode. The light blocking electrode prevents a light provided from beneath the gate electrode from being guided to a semiconductor layer. The light blocking electrode is overlapped by two source electrodes and a drain electrode arranged between the two source electrodes, all of which have an I-shape. The width of the light blocking electrode is selected so that a parasitic capacitance between a source part and the gate part may be controlled. Thus, a photocurrent of the thin film transistor may be reduced, and a kickback voltage difference between pixels in the display panel may also be reduced.
摘要翻译：薄膜晶体管包括栅极部分，其包括栅电极和从栅电极延伸的遮光电极。遮光电极防止从栅极下方提供的光被引导到半导体层。遮光电极由布置在两个源电极之间的两个源电极和漏电极重叠，所有这些都具有I形。选择遮光电极的宽度，使得可以控制源极部分和栅极部分之间的寄生电容。因此，可以减小薄膜晶体管的光电流，并且还可以减小显示面板中的像素之间的反冲电压差。

42. 发明授权

US07372842B2 Apparatus and method for minimizing a non-transmittable period due to a compressed mode in a mobile communication system supporting HSDPA 失效
标题翻译：一种用于在支持HSDPA的移动通信系统中将由于压缩模式导致的不可发送周期最小化的装置和方法
公开(公告)号：US07372842B2
公开(公告)日：2008-05-13
申请号：US10306528
申请日：2002-11-27
申请人： Sung-Hoon Kim , Sung-Ho Choi , Ju-Ho Lee
发明人： Sung-Hoon Kim , Sung-Ho Choi , Ju-Ho Lee
IPC分类号： H04J3/00
CPC分类号： H04W36/0094 , H04L1/0003 , H04L1/0026 , H04L1/1803 , H04L1/1819 , H04L1/1854 , H04L1/1887
摘要： An apparatus and method for minimizing a non-transmittable period where high-speed packet data transmission is impossible. In the apparatus, a non-transmittable period calculator receives transmission gap-related information for a UE from a radio network controller, calculates a transmission gap starting point based on the transmission gap-related information, defines a period determined by excluding the downlink transmission period from the transmission gap starting point as the non-transmittable period, and suspends transmission of the high-speed packet data to the UE for the non-transmittable period. A scheduler performs scheduling on the high-speed packet data under the control of the non-transmittable period calculator so that transmission of the high-speed packet data to the UE is suspended for the downlink transmission period.
摘要翻译：一种用于使不可传输的时段最小化的装置和方法，其中高速分组数据传输是不可能的。在该设备中，不可发送周期计算器从无线网络控制器接收用于UE的传输间隙相关信息，基于传输间隙相关信息计算传输间隙起始点，定义通过排除下行链路传输周期从传输间隙起始点作为不可发送周期，并且在不可发送周期期间暂停向UE发送高速分组数据。调度器在不可发送周期计算器的控制下对高速分组数据执行调度，使得在下行链路传输周期期间向UE停止发送高速分组数据。

43. 发明申请

US20080013438A1 RECORDING MEDIUM, APPARATUS FOR RECORDING/REPRODUCING DATA ON/FROM THE SAME AND METHOD THEREOF 有权
标题翻译：记录介质，记录/复制数据的装置及其方法
公开(公告)号：US20080013438A1
公开(公告)日：2008-01-17
申请号：US11776410
申请日：2007-07-11
申请人： Chan PARK , Hyug Kwon , Sung-Hoon Kim
发明人： Chan PARK , Hyug Kwon , Sung-Hoon Kim
IPC分类号： G11B7/24
CPC分类号： G11B20/1217 , G11B7/00736 , G11B7/0079 , G11B7/1267 , G11B7/24038 , G11B27/329 , G11B2020/1275 , G11B2020/1277 , G11B2220/237 , G11B2220/2541
摘要： A physical structure, apparatus for recording/reproducing on/from a recording medium using the same and method thereof are disclosed, by which the physical structure suitable for such a recording medium as BD and the like may be provided. The present invention includes a plurality of recording layers. Each of the recording layers includes a power test area not provided to a physically same position and a management area not provided to a physically same position, wherein a layer having the power test zone and the management area allocated consecutively includes a test area buffer allocated to the power test zone.
摘要翻译：公开了一种物理结构，用于使用该记录介质记录/再现记录介质的装置及其方法，通过该物理结构可以提供适合于BD等记录介质的物理结构。本发明包括多个记录层。每个记录层包括未提供给物理相同位置的功率测试区域和未提供给物理相同位置的管理区域，其中具有功率测试区域和管理区域连续分配的层包括分配给电源测试区。

44. 发明授权

US07304520B2 Delay circuit and semiconductor device including same 有权
标题翻译：延迟电路和包括其的半导体器件
公开(公告)号：US07304520B2
公开(公告)日：2007-12-04
申请号：US11332148
申请日：2006-01-17
申请人： Young-Chul Cho , Joung-Yeal Kim , Sung-Hoon Kim
发明人： Young-Chul Cho , Joung-Yeal Kim , Sung-Hoon Kim
IPC分类号： H03H11/26
CPC分类号： H03K5/133 , H03K2005/00058
摘要： A delay circuit comprises a plurality of delay blocks connected in series, and a driving portion adapted to logically combine signals transmitted by the plurality of delay blocks to generate a delay circuit output signal. Each of the plurality of delay blocks delays an output signal from an immediately previous delay block and transmits a resulting delayed output signal to a next delay block when a delay operation is enabled based on a corresponding control signal. However, where the delay operation of a delay block is disabled based on the corresponding control signal, the delay block transmits the output signal of the immediately previous delay block to the driving portion.
摘要翻译：延迟电路包括串联连接的多个延迟块和适于逻辑组合由多个延迟块发送的信号以产生延迟电路输出信号的驱动部分。多个延迟块中的每一个延迟来自紧接在前的延迟块的输出信号，并且当基于相应的控制信号启用延迟操作时，将结果延迟的输出信号发送到下一个延迟块。然而，在延迟块的延迟操作基于相应的控制信号被禁用的情况下，延迟块将紧接在前的延迟块的输出信号发送到驱动部分。

45. 发明申请

US20070222889A1 Dual Stream Structure Digital Television Transmission and Receiving Method Using Hybrid of E-8Vsb, E-4Vsb and P2Vsb 有权
标题翻译：使用E-8Vsb，E-4Vsb和P2Vsb混合的双流结构数字电视传输和接收方法
公开(公告)号：US20070222889A1
公开(公告)日：2007-09-27
申请号：US10594467
申请日：2005-04-01
申请人： Jae-Young Lee , Kum-Ran Ji , Sung-Hoon Kim , Seung-Won Kim , Soo-In Lee , Chieteuk Ahn
发明人： Jae-Young Lee , Kum-Ran Ji , Sung-Hoon Kim , Seung-Won Kim , Soo-In Lee , Chieteuk Ahn
IPC分类号： H04N7/01
CPC分类号： H03M13/256 , H03M13/253 , H03M13/2732 , H03M13/2936 , H03M13/356 , H04L1/0057 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071
摘要： Provided are a Vestigial Side Band (VSB) Digital Television (DTV) transmitter and receiver based on the Advanced Television System Committee (ATSC) A/53, and a method thereof. The present invention provides 8-VSB DTV transmitter and receiver that can improve reception performance of the receiver by transmitting and receiving robust data mixed with P-2VSB, E-4 VSB, and/or E-8 VSB. The DTV transmitter includes an input means for receiving a digital video data stream including normal data and robust data; an encoding means for coding the digital video data stream into data symbols; and a transmitting means for modulating and transmitting an output signal of the encoding means, wherein the encoding means performs trellis coding on the robust data by mixing and using a plurality of methods.
摘要翻译：提供了基于高级电视系统委员会（ATSC）A / 53的残留边带（VSB）数字电视（DTV）发射机和接收机及其方法。本发明提供了通过发送和接收与P-2VSB，E-4 VSB和/或E-8 VSB混合的鲁棒数据来提高接收机的接收性能的8-VSB DTV发射机和接收机。 DTV发射机包括用于接收包括正常数据和鲁棒数据的数字视频数据流的输入装置; 用于将数字视频数据流编码成数据符号的编码装置; 以及发送装置，用于调制和发送编码装置的输出信号，其中编码装置通过混合和使用多种方法对鲁棒数据进行格状编码。

46. 发明申请

US20070140368A1 Digital television transmitter and receiver for using 16 state trellis coding 有权
标题翻译：数字电视发射机和接收机，用于使用16个状态网格编码
公开(公告)号：US20070140368A1
公开(公告)日：2007-06-21
申请号：US10594464
申请日：2005-04-01
申请人： Sung-Hoon Kim , Kum-Ran Ji , Jae-Young Lee , Seung-Won Kim , Soo-In Lee , Chieteuk Ahn
发明人： Sung-Hoon Kim , Kum-Ran Ji , Jae-Young Lee , Seung-Won Kim , Soo-In Lee , Chieteuk Ahn
IPC分类号： H04L23/02
CPC分类号： H03M13/256 , H03M13/253 , H03M13/2732 , H03M13/2936 , H03M13/356 , H04L1/006 , H04L1/007 , H04L1/0071
摘要： Provided are a Vestigial Side Band (VSB) Digital Television (DTV) transmitter and receiver based on the Advanced Television System Committee (ATSC) A/53, and a method thereof. The present invention provides 8-VSB DTV transmitter and receiver that can improve reception performance of the receiver by transmitting and double streams formed of normal data and robust data without increasing an average power level, regardless of the ratio of the normal data and robust data, by including an encoding unit for performing 16-state trellis coding on the robust data when a data stream includes robust data, and a method thereof.
摘要翻译：提供了基于高级电视系统委员会（ATSC）A / 53的残留边带（VSB）数字电视（DTV）发射机和接收机及其方法。本发明提供8-VSB数字电视发射机和接收机，无论普通数据和鲁棒数据的比例如何，都可以通过发送和正常数据和鲁棒数据形成的双流来提高接收机的接收性能，而不增加平均功率电平，通过在数据流包含鲁棒数据时，包括用于对鲁棒数据执行16状态网格编码的编码单元及其方法。

47. 发明授权

US07230862B2 Semiconductor memory devices and methods of delaying data sampling signal 失效
标题翻译：半导体存储器件和延迟数据采样信号的方法
公开(公告)号：US07230862B2
公开(公告)日：2007-06-12
申请号：US11212843
申请日：2005-08-29
申请人： Sung-Hoon Kim , Joung-Yeal Kim
发明人： Sung-Hoon Kim , Joung-Yeal Kim
IPC分类号： G11C7/00
CPC分类号： G11C7/1051 , G11C7/1048 , G11C7/106 , G11C7/1069
摘要： According to the example embodiments of semiconductor memory devices and the methods of delaying a sample data signal of the present invention, the delay characteristics of the data sampling signal (FRT) are adjusted based on the location of the memory unit in a row direction and/or in a column direction with respect to the input/output sense amplifier.
摘要翻译：根据半导体存储器件的示例实施例和延迟本发明的采样数据信号的方法，数据采样信号（FRT）的延迟特性基于存储器单元在行方向上的位置和/ 或相对于输入/输出读出放大器在列方向上。

48. 发明申请

US20070034868A1 Semiconductor device and test system thereof 有权
标题翻译：半导体器件及其测试系统
公开(公告)号：US20070034868A1
公开(公告)日：2007-02-15
申请号：US11499661
申请日：2006-08-07
申请人： Joung-Yeal Kim , Ho-Young Song , Sung-Hoon Kim
发明人： Joung-Yeal Kim , Ho-Young Song , Sung-Hoon Kim
IPC分类号： H01L23/58
CPC分类号： G01R31/3173 , G01R31/31727
摘要： A semiconductor device that includes a clock buffer, which generates an internal clock signal in response to a clock signal and a complementary clock signal if the semiconductor device is operating in a first mode and generates the internal clock signal in response to the clock signal and a reference voltage if the semiconductor device is operating in a second mode.
摘要翻译：一种半导体器件，包括时钟缓冲器，其如果半导体器件工作在第一模式中，则响应于时钟信号和互补时钟信号产生内部时钟信号，并且响应于时钟信号产生内部时钟信号，并且如果半导体器件在第二模式下操作，则参考电压。

49. 发明申请

US20060275032A1 Actuator for mobile terminal 审中-公开
标题翻译：移动终端执行器
公开(公告)号：US20060275032A1
公开(公告)日：2006-12-07
申请号：US11444318
申请日：2006-06-01
申请人： Goo Hong , Sung-Hoon Kim , Jang-Young Im
发明人： Goo Hong , Sung-Hoon Kim , Jang-Young Im
IPC分类号： G03B17/00
CPC分类号： H04N5/2254 , G02B7/08 , H04N5/23212
摘要： An actuator for a mobile terminal using suspension wires is disclosed. By using an actuator for a mobile terminal comprising a holder, magnets mounted inside the holder, a coil mounted inside the holder and positioned on the inside of the magnets, a bobbin joined with the coil and having a lens in its center, and suspension wires, the ends of which are joined to the holder, bent at a particular angle to elastically press the bobbin, the manufacturing process may be simplified and the manufacturing cost may be reduced.
摘要翻译：公开了一种使用悬挂线的移动终端的致动器。通过使用用于移动终端的致动器，其包括保持器，安装在保持器内部的磁体，安装在保持器内部并位于磁体内部的线圈，与线圈接合并具有其中心的透镜的线圈和悬挂线其端部被接合到保持器，以特定角度弯曲以弹性地压制线轴，可以简化制造工艺并且可以降低制造成本。

50. 发明申请

US20060060986A1 Semiconductor memory device and power line arrangement method thereof 有权
公开(公告)号：US20060060986A1
公开(公告)日：2006-03-23
申请号：US11229257
申请日：2005-09-16
申请人： Sung-Hoon Kim , Young-Chul Cho , Kwang-Il Park , Seong-Jin Jang
发明人： Sung-Hoon Kim , Young-Chul Cho , Kwang-Il Park , Seong-Jin Jang
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L23/5286 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor memory device and a power line arrangement method are disclosed. The semiconductor memory device includes a plurality of pads, each pad including an upper pad and a lower pad arranged below the upper pad, wherein pad power lines are arranged below the lower pads of the plurality of pads in a direction of crossing the pads to interconnect the pads that transmit the same level of electrical power among the plurality of pads.

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