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    • 44. 发明申请
    • LIFETIME UNIFORMITY PARAMETER EXTRACTION METHODS
    • LIFETIME均质参数提取方法
    • US20110227964A1
    • 2011-09-22
    • US13050006
    • 2011-03-17
    • GHOLAMREZA CHAJIJavid JaffariArokia Nathan
    • GHOLAMREZA CHAJIJavid JaffariArokia Nathan
    • G09G5/10
    • G09G3/006G09G3/3225G09G2320/0233G09G2320/0285G09G2320/029G09G2320/043G09G2320/045G09G2330/12G09G2360/14
    • A system and method for deriving a sequence of OLED non-uniformity test patterns. A pattern generator generates a full sequence of display patterns according to a transform function, such as a discrete cosine transformation or wavelet transformation. A driver drives a display with each of the sequence of patterns. A sensor senses a property of the display, such as a total current for the display, for each of the sequence of patterns. An extraction unit derives a pixel non-uniformity model using the sensed properties and an inverse of the transform function. Patterns that contribute less than a threshold amount to the non-uniformity model can be identified and deleted to derive a sparse sequence of patterns, which can be stored in a memory. The sparse sequence of patterns can be used to test the display and extract a set of pixel non-uniformity values. The pixel non-uniformity values can be used to generate a correction signal for the display.
    • 用于导出OLED非均匀性测试图案序列的系统和方法。 模式发生器根据变换函数(如离散余弦变换或小波变换)生成完整的显示模式序列。 驱动器驱动具有每个模式序列的显示器。 对于每个图案序列,传感器感测显示器的属性,例如显示器的总电流。 提取单元使用感测到的属性和变换函数的逆,得出像素非均匀性模型。 可以识别和删除贡献小于非均匀性模型的阈值量的模式以导出可以存储在存储器中的模式的稀疏序列。 模式的稀疏序列可用于测试显示并提取一组像素非均匀性值。 可以使用像素非均匀性值来产生用于显示的校正信号。
    • 47. 发明授权
    • Vertical thin film transistor with short-channel effect suppression
    • 具有短沟道效应抑制的垂直薄膜晶体管
    • US07629633B2
    • 2009-12-08
    • US11332483
    • 2006-01-17
    • Isaac Wing Tak ChanArokia Nathan
    • Isaac Wing Tak ChanArokia Nathan
    • H01L31/112
    • H01L29/78642H01L29/66787H01L29/78696
    • A vertical thin film transistor (TFT) structure allows for a channel length to be scaled down, below that allowed by lateral TFT structures, to nanoscale (i.e., below 100 nm). However, while reducing the channel length, short-channel effects have been found in previous VTFT structures. Aspects of the new vertical TFT structure allow for the suppression of some of the short-channel effects. Advantageously, the capability of defining nanoscale channel length with short-channel effect suppression allows for p-channel vertical TFTs, where previously these were impractical. Furthermore, in aspects of the vertical TFT structure, the gate electrode is entirely vertical and by eliminating the horizontal overlap of the gate electrode over the drain electrode that present in earlier vertical TFT structures, parasitic gate-to-drain capacitance is eliminated. The vertical TFT structure provides size advantages over lateral TFTs and, furthermore, allows a TFT to be built at the intersection of electrode lines in an active-matrix configuration.
    • 垂直薄膜晶体管(TFT)结构允许将沟道长度按比例缩小到低于横向TFT结构允许的长度,达到纳米尺度(即,低于100nm)。 然而,在减少通道长度的同时,在以前的VTFT结构中也发现了短通道效应。 新的垂直TFT结构的方面允许抑制一些短信道效应。 有利地,通过短沟道效应抑制来限定纳米尺度通道长度的能力允许p沟道垂直TFT,其中先前是不切实际的。 此外,在垂直TFT结构的方面,栅极完全是垂直的,并且通过消除在较早的垂直TFT结构中存在的漏极上的栅电极的水平重叠,消除了寄生栅 - 漏电容。 垂直TFT结构提供了超过横向TFT的尺寸优点,此外,允许在有源矩阵配置的电极线的交叉处构建TFT。
    • 48. 发明申请
    • PIXEL CIRCUIT, DISPLAY SYSTEM AND DRIVING METHOD THEREOF
    • 像素电路,显示系统及其驱动方法
    • US20090262101A1
    • 2009-10-22
    • US12424185
    • 2009-04-15
    • Arokia NathanG. Reza ChajiJ. Marcel Dionne
    • Arokia NathanG. Reza ChajiJ. Marcel Dionne
    • G09G5/00
    • G09G3/3233G09G3/3291G09G2300/0819G09G2300/0842G09G2310/0254G09G2310/0256G09G2320/043G09G2320/045G09G2320/048G09G2330/027
    • A display system and method for the same is provided. A display includes a plurality of pixels, each having a light emitting device and a driving transistor for driving the light emitting device, the driving transistor and the light emitting device being coupled in series between a first power supply and a second power supply. The method includes: at a first frame, programming a pixel with a first programming voltage different from a programming voltage for a valid image, and charging at least one of the first power supply and the second power supply so that at least one of the driving transistor and the light emitting device is under a negative bias. The pixel circuit includes: a light emitting device; a driving transistor for driving the light emitting device, the driving transistor having a gate terminal, a first terminal coupled to the light emitting device, and a second terminal; a storage capacitor; a first switch transistor coupled to a data line for providing a programming data and the gate terminal of the driving transistor; and a second switch transistor for reducing a threshold voltage shift of the driving transistor, the storage capacitor and the second switch transistor being coupled in parallel to the gate terminal of the driving transistor and the first terminal of the driving transistor. The method includes: at a first cycle, implementing an image display operation having programming the pixel circuit for a valid image and driving the light emitting device; and at a second cycle, implementing a relaxation operation for reducing a stress on the pixel circuit, including: selecting a relaxation switch transistor coupled to the storage capacitor in parallel.
    • 提供了一种显示系统及其方法。 显示器包括多个像素,每个像素具有发光器件和用于驱动发光器件的驱动晶体管,驱动晶体管和发光器件串联耦合在第一电源和第二电源之间。 该方法包括:在第一帧处,编程具有不同于有效图像的编程电压的第一编程电压的像素,以及对第一电源和第二电源中的至少一个进行充电,使得至少一个驱动 晶体管,发光器件处于负偏压状态。 像素电路包括:发光器件; 用于驱动所述发光器件的驱动晶体管,所述驱动晶体管具有栅极端子,耦合到所述发光器件的第一端子和第二端子; 存储电容器; 耦合到用于提供编程数据的数据线和驱动晶体管的栅极端子的第一开关晶体管; 以及用于减小驱动晶体管的阈值电压偏移的第二开关晶体管,存储电容器和第二开关晶体管并联耦合到驱动晶体管的栅极端子和驱动晶体管的第一端子。 该方法包括:在第一周期,实现具有用于有效图像的像素电路编程并驱动发光器件的图像显示操作; 并且在第二周期,实现用于减小像素电路上的应力的松弛操作,包括:选择并联耦合到存储电容器的松弛开关晶体管。