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41. 发明授权

US06294438B1 Semiconductor device having capacitor and manufacturing method thereof 失效
标题翻译：具有电容器的半导体器件及其制造方法
公开(公告)号：US06294438B1
公开(公告)日：2001-09-25
申请号：US09589520
申请日：2000-06-08
申请人： Koji Arita , Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Toru Nasu , Akihiro Matsuda , Yoshihisa Nagano , Atsuo Inoue , Taketoshi Matsuura , Tatsuo Otsuki
发明人： Koji Arita , Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Toru Nasu , Akihiro Matsuda , Yoshihisa Nagano , Atsuo Inoue , Taketoshi Matsuura , Tatsuo Otsuki
IPC分类号： H01L2100
CPC分类号： H01L27/11502 , H01L27/10852 , H01L27/11585 , H01L27/1159 , H01L28/40 , H01L28/55 , H01L28/60 , H01L28/75 , Y10S438/958
摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 1021 atoms/cm3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.
摘要翻译：一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连在其他方面。通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

42. 发明授权

US6107657A Semiconductor device having capacitor and manufacturing method thereof 失效
标题翻译：具有电容器的半导体器件及其制造方法
公开(公告)号：US6107657A
公开(公告)日：2000-08-22
申请号：US71121
申请日：1998-05-04
申请人： Koji Arita , Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Toru Nasu , Akihiro Matsuda , Yoshihisa Nagano , Atsuo Inoue , Taketoshi Matsuura , Tatsuo Otsuki
发明人： Koji Arita , Eiji Fujii , Yasuhiro Shimada , Yasuhiro Uemoto , Toru Nasu , Akihiro Matsuda , Yoshihisa Nagano , Atsuo Inoue , Taketoshi Matsuura , Tatsuo Otsuki
IPC分类号： H01L21/02 , H01L21/8242 , H01L21/8246 , H01L27/115 , H01L29/72
CPC分类号： H01L27/11502 , H01L27/10852 , H01L27/11585 , H01L27/1159 , H01L28/40 , H01L28/55 , H01L28/60 , H01L28/75 , Y10S438/958
摘要： A semiconductor device forming a capacitor through an interlayer insulating layer on a semiconductor substrate on which an integrated circuit is formed. This semiconductor device has an interlayer insulating layer with moisture content of 0.5 g/cm.sup.3 or less, which covers the capacitor in one aspect, and has a passivation layer with hydrogen content of 10.sup.21 atoms/cm.sup.3 or less, which covers the interconnections of the capacitor in other aspect. By thus constituting, deterioration of the capacitor dielectric can be prevented which brings about the electrical reliability of the ferroelectric layer or high dielectric layer.
摘要翻译：一种通过半导体衬底上的层间绝缘层形成电容器的半导体器件，其上形成集成电路。该半导体装置具有含水量为0.5g / cm 3以下的层间绝缘层，其在一个方面覆盖电容器，并且具有氢含量为1021原子/ cm3以下的钝化层，其覆盖电容器的互连在其他方面。通过这样构成，可以防止导致铁电层或高介电层的电可靠性的电容器电介质的劣化。

43. 发明授权

US5837591A Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5837591A
公开(公告)日：1998-11-17
申请号：US803144
申请日：1997-02-19
申请人： Yasuhiro Shimada , Atsuo Inoue , Koji Arita , Toru Nasu , Yoshihisa Nagano , Akihiro Matsuda
发明人： Yasuhiro Shimada , Atsuo Inoue , Koji Arita , Toru Nasu , Yoshihisa Nagano , Akihiro Matsuda
IPC分类号： H01L21/28 , H01L21/02 , H01L21/822 , H01L27/04 , H01L27/10 , H01L27/115 , H01L21/20
CPC分类号： H01L27/11502 , H01L28/40
摘要： A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.
摘要翻译：半导体器件包括其上形成有集成电路的硅衬底1，形成在硅衬底1上的第一绝缘层6，包括形成在第一绝缘层6上的下电极7的电容器，具有高介电常数的电介质膜8和上电极9 具有独立地引导到下电极7和上电极9的接触孔13的第二绝缘膜11，在接触孔13的底部接触下电极7和上电极9的扩散阻挡层17和形成在扩散阻挡层上的互连层15 在接触孔13的底部的扩散阻挡层17中，形成由粒状晶体构成的层状区域。

44. 发明授权

US5591663A Method of manufacturing ferroelectric capacitor with a hydrogen heat treatment 失效
标题翻译：用氢热处理制造铁电电容器的方法
公开(公告)号：US5591663A
公开(公告)日：1997-01-07
申请号：US388502
申请日：1995-02-14
申请人： Toru Nasu , Atsuo Inoue , Yoshihisa Nagano , Akihiro Matsuda , Koji Arita
发明人： Toru Nasu , Atsuo Inoue , Yoshihisa Nagano , Akihiro Matsuda , Koji Arita
IPC分类号： H01L23/522 , H01L21/768 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/04 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/115
CPC分类号： H01L27/11502
摘要： A manufacturing method of a semiconductor device comprises the steps:(a) forming a ferroelectric capacitor on a semiconductor substrate on which a MOS transistor is formed, (b) forming an interlayer insulating film which covers the whole semiconductor substrate, (c) forming first contact holes which reach diffusion layers of the MOS transistor, (d) after forming the first contact holes, providing a heat treatment in hydrogen atmosphere, (e) after the heat treatment, forming second contact holes which reach upper and lower electrodes of the ferroelectric capacitor on the interlayer insulating film, and (f) forming metal interconnection. Since the heat treatment in hydrogen atmosphere is provided before forming the second contact holes, a surface state density at interface between the semiconductor and a gate insulating film of the MOS transistor can be lowered without degrading the characteristics of ferroelectric capacitor.
摘要翻译：半导体器件的制造方法包括以下步骤：（a）在形成有MOS晶体管的半导体衬底上形成强电介质电容器，（b）形成覆盖整个半导体衬底的层间绝缘膜，（c）接触孔到达MOS晶体管的扩散层，（d）在形成第一接触孔之后，在氢气氛中进行热处理，（e）在热处理之后，形成到铁电体的上下电极的第二接触孔层间绝缘膜上的电容器，（f）形成金属互连。由于在形成第二接触孔之前提供氢气氛中的热处理，所以可以降低MOS晶体管的半导体与栅极绝缘膜之间的界面处的表面状态密度，而不降低铁电电容器的特性。

45. 发明申请

US20130137826A1 PROPYLENE-BASED POLYMER COMPOSITION AND USES THEREOF 有权
标题翻译：基于丙烯的聚合物组合物及其用途
公开(公告)号：US20130137826A1
公开(公告)日：2013-05-30
申请号：US13536590
申请日：2012-06-28
申请人： Naomi URAKAWA , Makoto Nakano , Yasuhiro Kitahara , Ryosuke Aburaki , Akihiro Matsuda
发明人： Naomi URAKAWA , Makoto Nakano , Yasuhiro Kitahara , Ryosuke Aburaki , Akihiro Matsuda
IPC分类号： C08L23/10
CPC分类号： C08L23/10 , B32B27/32 , B32B2270/00 , C08F4/65912 , C08F4/65927 , C08L23/0807 , C08L23/0815 , C08L23/0853 , C08L23/12 , C08L23/14 , C08L23/142 , C08L23/16 , C08L27/00 , C08L35/06 , C08L2205/02 , C08L2205/025 , C08F110/06 , C08F2500/16
摘要： The propylene-based polymer composition includes a specific amount of a propylene-based polymer (A) having a syndiotactic pentad fraction (rrrr fraction) of 85% or more and containing 90 to 100 mol % of a structural unit derived from propylene; a specific amount of a propylene-based copolymer (B) containing 40 to 89 mol % of a structural unit derived from propylene and 11 to 60 mol % of a structural unit derived from an α-olefin and satisfying a specific equation of intrinsic viscosity [η] and MFR; and specific amount(s) of at least one polymer of an olefin-based thermoplastic elastomer (C), a styrene-based elastomer (D), a propylene/ethylene/α-olefin copolymer (E) and an isotactic propylene-based polymer (F), and optionally an ethylene/vinyl acetate copolymer (G) and/or an ethylene-based polymer (H).
摘要翻译：丙烯类聚合物组合物包含特定量的间同立构五单元组分（rrrr分数）为85％以上且含有90〜100摩尔％来自丙烯的结构单元的丙烯类聚合物（A）特定量的丙烯系共聚物（B），含有40〜89摩尔％的来自丙烯的结构单元和11〜60摩尔％的来自α-烯烃的结构单元，并且满足特性粘度[ eta]和MFR; 和烯烃类热塑性弹性体（C），苯乙烯类弹性体（D），丙烯/乙烯/α-烯烃共聚物（E）和全同立构丙烯类聚合物的至少一种聚合物的特定量（F）和任选的乙烯/乙酸乙烯酯共聚物（G）和/或乙烯类聚合物（H）。

46. 发明申请

US20110152460A1 SYNDIOTACTIC PROPYLENE BASED POLYMER COMPOSITION, FORMED BODY, AND LAMINATED SHEET 审中-公开
标题翻译：基于聚丙烯的聚合物组合物，成型体和层压片
公开(公告)号：US20110152460A1
公开(公告)日：2011-06-23
申请号：US12973527
申请日：2010-12-20
申请人： Naomi URAKAWA , Yoshisada Tamo , Makoto Nakano , Takashi Nakagawa , Ryosuke Aburaki , Akihiro Matsuda
发明人： Naomi URAKAWA , Yoshisada Tamo , Makoto Nakano , Takashi Nakagawa , Ryosuke Aburaki , Akihiro Matsuda
IPC分类号： C08L31/04 , C08L23/06 , C08L23/12 , B32B37/06
CPC分类号： C08L23/0861 , B29K2023/12 , C08L23/08 , C08L23/10 , C08L23/142 , C08L2205/02 , Y10T156/10 , C08L2666/06
摘要： [Object] The object of the present invention is to develop a syndiotactic propylene based polymer composition, which has excellent calendering formability, which exhibits excellent abrasion resistance, scratch resistance, and the like and, in addition, which is suitable for a sheet for an artificial leather exhibiting improved smell, color migration, and the like.[Solution] The present invention relates to a syndiotactic propylene based polymer composition containing a syndiotactic propylene-a-olefin copolymer containing 50 percent by mole or more, and less than 90 percent by mole of repeating unit derived from propylene, a syndiotactic propylene polymer containing 90 to 100 percent by mole of repeating unit derived from propylene, ethylene-vinyl acetate copolymer, ethylene (co)polymer, and isotactic polypropylene, as well as a formed body and a laminated sheet.
摘要翻译：本发明的目的是开发间同立构丙烯基聚合物组合物，其具有优异的压延成形性，其表现出优异的耐磨性，耐刮擦性等，并且另外适用于表现出改善的气味，颜色迁移等的人造革。本发明涉及含有间同立构丙烯-α-烯烃共聚物的间同立构丙烯类聚合物组合物，该间同立构丙烯-α-烯烃共聚物含有50摩尔％以上，小于90摩尔％来源于丙烯的重复单元，含有衍生自丙烯，乙烯 - 乙酸乙烯酯共聚物，乙烯（共）聚合物和全同立构聚丙烯的重复单元90-100重量％，以及成形体和层压片。

47. 发明授权

US07622826B2 Flicker improvement effect evaluating system 有权
标题翻译：闪烁改善效果评估系统
公开(公告)号：US07622826B2
公开(公告)日：2009-11-24
申请号：US12121383
申请日：2008-05-15
申请人： Akihiro Matsuda
发明人： Akihiro Matsuda
IPC分类号： H02J3/24 , G05F1/70
CPC分类号： H02J3/1871
摘要： A flicker improvement effect evaluating system evaluates an effect of improvement of voltage flicker in a power system to which a static reactive power compensator is to be introduced. A system voltage operating unit operates a compensation current and a system impedance of the power system, based on actually measured data of system voltage and load current read from a data reading unit. Based on the results of operations and the actually measured data, a not-yet-improved system voltage at present and an improved system voltage attained when the static reactive power compensator is provided on a bus are simulated. By a flicker meter, flicker values of the not-yet-improved system voltage and improved system voltage amplified by an amplifying circuit are measured, and from the flicker values, the rate of improvement attained by the static reactive power compensator is operated.
摘要翻译：闪烁改善效果评估系统评估要引入静态无功功率补偿器的电力系统中的电压闪烁改善的效果。系统电压操作单元基于从数据读取单元读取的系统电压和负载电流的实际测量数据来操作电力系统的补偿电流和系统阻抗。基于操作结果和实际测量数据，模拟了当总线上提供静态无功功率补偿器时，目前还没有改进的系统电压和改善的系统电压。通过闪烁计测量，测量尚未改善的系统电压和由放大电路放大的改进的系统电压的闪烁值，并且根据闪烁值操作由静态无功功率补偿器获得的改进率。

48. 发明授权

US07584564B2 Internally illuminated sign 失效
标题翻译：内部照明标志
公开(公告)号：US07584564B2
公开(公告)日：2009-09-08
申请号：US10519748
申请日：2003-07-07
申请人： Akihiro Matsuda , Yutaka Hamada , Ikuo Mimura
发明人： Akihiro Matsuda , Yutaka Hamada , Ikuo Mimura
IPC分类号： G09F19/00
CPC分类号： G09F13/16 , G02B6/0053 , G09F13/04 , G09F13/14
摘要： The invention provides an internally illuminated sign comprising an information display section having at least one flat or curved surface which retroreflects light coming from the front of said sign and transmits light from the interior of said sign; an illuminator disposed behind the information display section; and a housing which encloses and holds said information display section and the illuminator. Those retroreflective elements used in said information display section are prismatic retroreflective elements according to the principle of total internal reflection, a large number of which are densely arranged to form a continuous retroreflective plane, at least the retroreflecting area of the back of said large number of prismatic retroreflective elements has no bonded area to other layer(s).
摘要翻译：本发明提供了一种内部照明标志，其包括信息显示部分，该信息显示部分具有至少一个平坦或弯曲的表面，该平面或弯曲表面回射来自所述标志的前面的光并透射来自所述标志的内部的光; 设置在所述信息显示部的后方的照明器; 以及包围并保持所述信息显示部和照明器的壳体。在所述信息显示部分中使用的那些回归反射元件是根据全内反射原理的棱镜回射元件，其中多个被紧密地布置以形成连续的回射平面，至少至少后述的后向反射区域棱镜式回射元件没有与其它层的接合区域。

49. 再颁专利

USRE40602E1 Semiconductor device having a ferroelectric TFT and a dummy element 有权
标题翻译：具有铁电TFT和虚拟元件的半导体器件
公开(公告)号：USRE40602E1
公开(公告)日：2008-12-09
申请号：US10611307
申请日：2003-07-01
申请人： Akihiro Matsuda , Yoshihisa Nagano , Yasuhiro Uemoto
发明人： Akihiro Matsuda , Yoshihisa Nagano , Yasuhiro Uemoto
IPC分类号： H01L21/70
CPC分类号： H01L27/11502 , H01L27/11507
摘要： The present invention provides a semiconductor device including a semiconductor element and a dummy semiconductor element adjacent to the semiconductor element. When the semiconductor element is a capacitor element including a bottom electrode, a top electrode and a dielectric layer between the electrodes, a dummy capacitor element also has dummy electrodes and a dummy dielectric layer between the dummy electrodes. The dummy electrode is located so that a space between the top electrode of the capacitor element ad the dummy top electrode is in a predetermined range (e.g. 0.3 μm to 14 μm). The dummy capacitor element prevents the capacitor dielectric layer from degrading since the collisions of the etching ions with the capacitor dielectric layer in a dry etching process is suppressed.
摘要翻译：本发明提供一种包括半导体元件和与半导体元件相邻的虚设半导体元件的半导体器件。当半导体元件是包括底部电极，顶部电极和电极之间的电介质层的电容器元件时，虚拟电容器元件在虚拟电极之间也具有虚拟电极和虚设电介质层。虚拟电极被定位成使得电容器元件的顶部电极和虚拟顶部电极之间的空间处于预定范围（例如，0.3μm至14μm）。由于在干式蚀刻工艺中蚀刻离子与电容器电介质层的碰撞被抑制，所以虚拟电容器元件防止电容器介电层降解。

50. 发明授权

US07338337B2 Aging method of plasma display panel 失效
标题翻译：等离子显示面板老化方法
公开(公告)号：US07338337B2
公开(公告)日：2008-03-04
申请号：US10510984
申请日：2004-02-16
申请人： Masaaki Yamauchi , Takashi Aoki , Akihiro Matsuda , Koji Akiyama
发明人： Masaaki Yamauchi , Takashi Aoki , Akihiro Matsuda , Koji Akiyama
IPC分类号： H01J9/44 , G09G3/10 , G09G3/28
CPC分类号： H01J9/445 , H01J2217/49
摘要： In the aging process performed by applying a voltage having an alternating voltage component between a scan electrode and a sustain electrode, an erase discharge occurs in succession to an aging discharge. According to the aging method, an erase discharge-suppressing voltage is applied to at least any one of the scan electrode, the sustain electrode, and the data electrode. Although the erase discharge repeatedly occurs in the wake of the aging discharge, the erase discharge-suppressing voltage suppresses the ones that occur when the scan electrode has voltage level higher than the sustain electrode.
摘要翻译：在通过在扫描电极和维持电极之间施加具有交流电压分量的电压进行的老化处理中，与老化放电相继发生擦除放电。根据老化方法，对扫描电极，维持电极和数据电极中的至少任一个施加擦除放电抑制电压。虽然在老化放电之后重复发生擦除放电，但是擦除放电抑制电压抑制当扫描电极具有比维持电极高的电压电平时的擦除放电抑制电压。

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