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41. 发明授权

US5956616A Method of depositing thin films by plasma-enhanced chemical vapor deposition 失效
标题翻译：通过等离子体增强化学气相沉积法沉积薄膜的方法
公开(公告)号：US5956616A
公开(公告)日：1999-09-21
申请号：US863298
申请日：1997-05-27
申请人： Shigeru Mizuno , Manabu Tagami , Shinya Hasegawa , Yoichiro Numasawa , Masahito Ishihara , Kiyoshi Nashimoto , Nobuyuki Takahashi
发明人： Shigeru Mizuno , Manabu Tagami , Shinya Hasegawa , Yoichiro Numasawa , Masahito Ishihara , Kiyoshi Nashimoto , Nobuyuki Takahashi
IPC分类号： C23C16/34 , C23C16/42 , C23C16/50 , H01L21/28 , H01L21/285 , H01L21/768 , H01L21/44
CPC分类号： H01L21/76843 , H01L21/28556
摘要： A method of depositing a thin film on a substrate by plasma-enhanced CVD is provided. The method includes introducing H.sub.2 or H.sub.2 and N.sub.2 into a plasma-enhanced CVD reactor; generating a plasma in the reactor; introducing a reaction gas comprising TiCl.sub.4, silane, and either H.sub.2 or H.sub.2 and N.sub.2 into the reactor; and depositing a Ti film or a TiN film containing Si on a substrate in the reactor.
摘要翻译：提供了通过等离子体增强CVD在衬底上沉积薄膜的方法。该方法包括将H2或H2和N2引入等离子体增强型CVD反应器中; 在反应器中产生等离子体; 将包含TiCl 4，硅烷，以及H 2或H 2和N 2的反应气体引入反应器中; 并在反应器中在衬底上沉积含有Si的Ti膜或TiN膜。

42. 发明授权

US5893962A Electrode unit for in-situ cleaning in thermal CVD apparatus 失效
标题翻译：用于在热CVD装置中进行原位清洗的电极单元
公开(公告)号：US5893962A
公开(公告)日：1999-04-13
申请号：US711204
申请日：1996-09-09
申请人： Shigeru Mizuno , Manabu Tagami , Takanori Yoshimura
发明人： Shigeru Mizuno , Manabu Tagami , Takanori Yoshimura
IPC分类号： H05H1/46 , C23C16/44 , H01J37/32 , H01L21/205 , H01L21/285 , H01L21/302 , H01L21/304 , H01L21/3065 , C23C16/00
CPC分类号： H01J37/32862 , C23C16/4405 , Y10S156/916
摘要： An electrode unit of a thermal CVD apparatus is used to generate plasma discharge for an in-situ cleaning process. The electrode unit is configured by a substrate holder and a shield member connected to a high frequency power supply, the gas supply section electrically grounded, and an auxiliary electrode disposed in the gas supply section. In a film deposition process, a reactive gas is supplied from the gas supply section, and the reactive gas is excited in a space in front of a substrate to deposit a thin film onto the substrate. In a periodical in-situ cleaning process, a cleaning gas is supplied from the gas supply section and a cleaning discharge is generated to remove unwanted films deposited on the substrate holder and the shield member. The auxiliary electrode causes the cleaning discharge to be concentrated in a space around unwanted films.
摘要翻译：热CVD装置的电极单元用于产生用于原位清洗工艺的等离子体放电。电极单元由基板保持器和连接到高频电源的屏蔽构件构成，气体供给部电接地，以及设置在气体供给部中的辅助电极。在成膜工序中，由气体供给部供给反应气体，在基板前方的空间内激发反应性气体，在基板上析出薄膜。在周期性的原位清洗过程中，从气体供应部分提供清洁气体，并且产生清洁排放物以去除沉积在基板保持器和屏蔽构件上的不需要的膜。辅助电极使得清洁放电集中在不期望的膜周围的空间中。

43. 发明授权

US5840366A Method of forming thin film 失效
标题翻译：薄膜形成方法
公开(公告)号：US5840366A
公开(公告)日：1998-11-24
申请号：US520298
申请日：1995-08-28
申请人： Shigeru Mizuno , Akihiko Koura
发明人： Shigeru Mizuno , Akihiko Koura
IPC分类号： C23C16/02 , C23C16/14 , H01L21/285
CPC分类号： H01L21/28556 , C23C16/0281 , C23C16/14
摘要： A W film having good surface morphology and high reflectance is formed while avoiding any degradation of the characteristics such as specific resistivity. The method for forming a thin film is carried out by depositing a W film on a heated substrate using CVD. The raw material gas is WF.sub.6, and the reducing gases are SiH.sub.4 and H.sub.2. In the first stage of the film formation, the reaction between WF.sub.6 and SiH.sub.4 forms nuclei on the surface of the substrate. In the second stage, following the first stage, the reaction between WF.sub.6 and H.sub.2 forms the W film. The second stage is controlled to form crystal grains of a predetermined size. The first stage and the second stage are alternately repeated as many times as necessary.
摘要翻译：形成具有良好的表面形态和高反射率的W膜，同时避免诸如电阻率等特性的任何劣化。形成薄膜的方法是通过使用CVD在加热的基板上沉积W膜来进行的。原料气为WF6，还原气为SiH4和H2。在成膜的第一阶段，WF6和SiH4之间的反应在基材的表面上形成核。在第二阶段，在第一阶段之后，WF6和H2之间的反应形成W膜。控制第二阶段以形成预定尺寸的晶粒。第一阶段和第二阶段根据需要交替重复多次。

44. 发明授权

US5494494A Integrated module multi-chamber CVD processing system and its method for processing substrates 失效
公开(公告)号：US5494494A
公开(公告)日：1996-02-27
申请号：US280117
申请日：1994-07-25
申请人： Shigeru Mizuno , Yoshihiro Katsumata , Nobuyuki Takahashi
发明人： Shigeru Mizuno , Yoshihiro Katsumata , Nobuyuki Takahashi
IPC分类号： C23C16/44 , C23C16/455 , C23C16/458 , C23C16/54 , B21F41/00
CPC分类号： C23C16/45519 , C23C16/4401 , C23C16/45521 , C23C16/4585 , C23C16/54 , Y10S414/135 , Y10S438/908
摘要： In a CVD processing system for depositing a blanket tungsten film, a distinct shadow is formed without causing any micro-peeling when the substrate fixture is separated from the substrate so as to prevent any blanket tungsten from being deposited on SiO.sub.2, thus reducing the occurrence of fine dust particles. A CVD processing system for depositing a blanket tungsten film, includes a susceptor (4); a ring chuck (9) for affixing the peripheral portion of a substrate (3) on the susceptor; reactive gas supply mechanisms (17, 18 and 19) for supplying reactive gas; and an exhaust mechanism (2) for exhausting unreacted gas and the like, wherein: the ring chuck has at least three point contact members (10) in contact with the peripheral portion of the substrate; the point contact members are provided at positions outside the inner periphery of the ring chuck; a gap (11) is formed at the point contact members between the ring chuck and the substrate; and purge gas supply mechanisms (20 and 21) are provided to blow off purge gas through the gap in order to prevent reactive gas from entering the gap (11). A ratio of the size of the gap to the flow rate of purge gas is set to such an optimum value as to satisfy a condition in which the position of the peripheral portion of the thin film coincides with the position of the inner periphery of the ring chuck.

45. 发明授权

US5270250A Method of fabricating semiconductor substrate having very shallow impurity diffusion layer 失效
标题翻译：制造具有非常浅的杂质扩散层的半导体衬底的方法
公开(公告)号：US5270250A
公开(公告)日：1993-12-14
申请号：US812483
申请日：1991-12-23
申请人： Tsuyoshi Murai , Shigeaki Nakamura , Toshinori Konaka , Shigeru Mizuno
发明人： Tsuyoshi Murai , Shigeaki Nakamura , Toshinori Konaka , Shigeru Mizuno
IPC分类号： H01L21/265 , H01L21/00 , H01L21/223 , H01L21/26 , H01C21/265
CPC分类号： H01L21/67103 , H01L21/2236
摘要： A method of fabricating a semiconductor substrate is characterized in that a semiconductor wafer is disposed between a pair of opposite electrodes provided in an atmosphere of inert gas containing impurity gas which is held at a low pressure, a low-frequency alternating current is applied between the electrodes to induce plasma, and impurity ions are implanted into the surface of the semiconductor wafer to form a very shallow impurity diffusion layer.

46. 发明申请

US20170267483A1 SHEET PROCESSING APPARATUS AND IMAGE FORMING SYSTEM 审中-公开
公开(公告)号：US20170267483A1
公开(公告)日：2017-09-21
申请号：US15613583
申请日：2017-06-05
申请人： Ken SAWADA , Shigeru MIZUNO , Hiroyuki KUNO , Takuya FUKUHARA
发明人： Ken SAWADA , Shigeru MIZUNO , Hiroyuki KUNO , Takuya FUKUHARA
IPC分类号： B65H45/14
CPC分类号： B65H45/14 , B65H2220/08 , B65H2511/224 , B65H2801/27
摘要： A sheet processing apparatus that forms a folding line on a sheet includes first and second folding rollers that form a folding line on the sheet by rotating a bent sheet while pinching from sheet surfaces and a first pressing unit that presses the second folding roller against the first folding roller in an arbitrary portion in a rotating shaft direction of the second folding roller.

47. 发明授权

US07935393B2 Method and system for improving sidewall coverage in a deposition system 有权
标题翻译：用于改善沉积系统中侧壁覆盖度的方法和系统
公开(公告)号：US07935393B2
公开(公告)日：2011-05-03
申请号：US11835210
申请日：2007-08-07
申请人： Shigeru Mizuno , Takashi Sakuma , Yasushi Mizusawa
发明人： Shigeru Mizuno , Takashi Sakuma , Yasushi Mizusawa
IPC分类号： C23C14/00 , H05H1/24
CPC分类号： H01J37/32568 , H01J37/32091
摘要： Embodiments of a method and system for improving the consistency of a layer or a plurality of layers with a desired profile in a deposition system are generally described herein. Other embodiments may be described and claimed.
摘要翻译：这里一般地描述了用于在沉积系统中改善具有所需轮廓的层或多个层的稠度的方法和系统的实施例。可以描述和要求保护其他实施例。

48. 发明申请

US20100248473A1 SELECTIVE DEPOSITION OF METAL-CONTAINING CAP LAYERS FOR SEMICONDUCTOR DEVICES 有权
标题翻译：用于半导体器件的金属包层的选择性沉积
公开(公告)号：US20100248473A1
公开(公告)日：2010-09-30
申请号：US12414917
申请日：2009-03-31
申请人： Tadahiro Ishizaka , Shigeru Mizuno , Satohiko Hoshino , Hiroyuki Nagai , Yuki Chiba , Frank M. Cerio, JR.
发明人： Tadahiro Ishizaka , Shigeru Mizuno , Satohiko Hoshino , Hiroyuki Nagai , Yuki Chiba , Frank M. Cerio, JR.
IPC分类号： H01L21/768 , H01L21/3205
CPC分类号： H01L21/76849 , H01L21/02063 , H01L21/02074 , H01L21/3105 , H01L21/76814 , H01L21/76826 , H01L21/76828 , H01L21/76846 , H01L21/76856 , H01L21/76859 , H01L21/76883
摘要： A method for integrating metal-containing cap layers into copper (Cu) metallization of semiconductor devices. In one embodiment, the method includes providing a patterned substrate containing metal surfaces and dielectric layer surfaces, and modifying the dielectric layer surfaces by exposure to a reactant gas containing a hydrophobic functional group, where the modifying substitutes a hydrophilic functional group in the dielectric layer surfaces with a hydrophobic functional group. The method further includes depositing metal-containing cap layers selectively on the metal surfaces by exposing the modified dielectric layer surfaces and the metal surfaces to a deposition gas containing metal-containing precursor vapor.
摘要翻译：一种用于将含金属盖层整合到半导体器件的铜（Cu）金属化中的方法。在一个实施例中，该方法包括提供含有金属表面和电介质层表面的图案化衬底，以及通过暴露于含有疏水官能团的反应气体来修饰电介质层表面，其中修饰取代介电层表面中的亲水性官能团具有疏水官能团。该方法还包括通过将改性的介电层表面和金属表面暴露于含有金属的前体蒸气的沉积气体中，将金属含有的盖层选择性地沉积在金属表面上。

49. 发明授权

US07791857B2 Electrostatic chuck device 有权
公开(公告)号：US07791857B2
公开(公告)日：2010-09-07
申请号：US12318488
申请日：2008-12-30
申请人： Shigeru Mizuno , Masahito Ishihara , Sunil Wickramanayaka , Naoki Miyazaki
发明人： Shigeru Mizuno , Masahito Ishihara , Sunil Wickramanayaka , Naoki Miyazaki
IPC分类号： H01T23/00
CPC分类号： H01L21/6875 , H01L21/6833 , H02N13/00
摘要： An electrostatic chuck device provided with a dielectric plate with a surface embossed to give it a plurality of projections, an electrode, and an external power source, wherein substrate supporting surfaces of the plurality of projections are covered by conductor wiring and the conductor wiring electrically connects the substrate supporting surfaces of the plurality of projections. At the time of substrate processing, when the embossed projections contact the back of the substrate, the back of the substrate and the conductor wiring is made the same in potential due to the migration of the charges, the generation of force between the back of the substrate and the conductor wiring being in contact with the same is prevented, and a rubbing state between the two is prevented. Due to this, the electrostatic chuck device reduces the generation of particles, easily and stably removes and conveys substrates, and realizes a high yield and system operating rate.

50. 发明授权

US07750484B2 Semiconductor device with flip-chip connection that uses gallium or indium as bonding material 有权
标题翻译：具有使用镓或铟作为接合材料的倒装芯片连接的半导体器件
公开(公告)号：US07750484B2
公开(公告)日：2010-07-06
申请号：US12146003
申请日：2008-06-25
申请人： Shigeru Mizuno , Takashi Kurihara
发明人： Shigeru Mizuno , Takashi Kurihara
IPC分类号： H01L23/498
CPC分类号： H01L24/81 , H01L2224/1134 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/73204 , H01L2224/81193 , H01L2224/81203 , H01L2224/81405 , H01L2224/81825 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/3511 , H01L2924/00 , H01L2924/00014
摘要： A method of manufacturing a semiconductor device in which a semiconductor element 10 is mounted on a substrate 20 through a flip-chip connection, includes the steps of cladding gallium as a bonding material 30 to a connecting pad 22 formed on a surface of the substrate 20, diffusing copper from the connecting pad 22 formed of the copper into the bonding material 30 through heating under vacuum, thereby bringing a state of a solid solution of the gallium and the copper, and aligning a connecting bump 12 formed on the semiconductor element 10 with the connecting pad 22 and bonding the connecting bump 12 to the connecting pad 22 through the bonding material 30 in a state of a solid solution under heating.
摘要翻译：通过倒装芯片连接将半导体元件10安装在基板20上的半导体器件的制造方法包括以下步骤：将形成在基板20的表面上的连接焊盘22作为接合材料30包覆镓通过在真空下加热将铜从铜连接焊盘22扩散到接合材料30中，从而使镓和铜的固溶状态，并使形成在半导体元件10上的连接凸块12与形成在半导体元件10上的连接凸块12与连接焊盘22，并且在加热下处于固溶状态下，通过接合材料30将连接凸块12接合到连接焊盘22。

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