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    • 49. 发明申请
    • DATA READING CIRCUIT
    • 数据读取电路
    • US20100208531A1
    • 2010-08-19
    • US12705791
    • 2010-02-15
    • Kotaro Watanabe
    • Kotaro Watanabe
    • G11C7/00G11C7/10
    • G11C16/26
    • There is provided a data reading circuit which is low in current consumption. In a read period, a signal (φ2) is low, and hence an NMOS transistor (14) turns off. Accordingly, no current flows in the NMOS transistor (14). Further, data (D2) is high, and hence an output voltage of an inverter (23) becomes low, and an NMOS transistor (32) turns off. Accordingly, no current flows in the NMOS transistor (32). Further, in a PMOS transistor (31), a power supply voltage (VDD) is applied to a source and a drain thereof, and hence no current flows. As a result, no current flows in the data reading circuit during a read period after a data holding operation of a latch circuit (21) has been completed (after time (t4)), and hence the current consumption of the data reading circuit is reduced accordingly.
    • 提供了一种电流消耗低的数据读取电路。 在读取期间,信号(&phgr。2)为低电平,因此NMOS晶体管(14)截止。 因此,在NMOS晶体管(14)中没有电流流动。 此外,数据(D2)高,逆变器(23)的输出电压变低,NMOS晶体管(32)截止。 因此,在NMOS晶体管(32)中没有电流流动。 此外,在PMOS晶体管(31)中,向源极和漏极施加电源电压(VDD),因此不会流过电流。 结果,在锁存电路(21)的数据保持操作已经完成(在时间(t4)之后)的读取周期期间,在数据读取电路中没有电流流动,因此数据读取电路的电流消耗为 相应减少。