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41. 发明授权

US06586822B1 Integrated core microelectronic package 有权
标题翻译：集成核心微电子封装
公开(公告)号：US06586822B1
公开(公告)日：2003-07-01
申请号：US09658819
申请日：2000-09-08
申请人： Quat T. Vu , Jian Li , Qing Ma , Maria V. Henao , Xiao-Chun Mu
发明人： Quat T. Vu , Jian Li , Qing Ma , Maria V. Henao , Xiao-Chun Mu
IPC分类号： H01L2302
CPC分类号： H01L24/19 , H01L21/568 , H01L23/532 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/20 , H01L2224/92 , H01L2224/97 , H01L2924/01005 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/18162 , H01L2924/19041 , Y10T29/4935 , H01L2224/96 , H01L2224/82 , H01L2924/00
摘要： A microelectronic package including a microelectronic die disposed within an opening in a microelectronic packaging core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic die. Build-up layers of dielectric materials and conductive traces are then fabricated on the microelectronic die, the encapsulant material, and the microelectronic package core to form the microelectronic package.
摘要翻译：一种微电子封装，包括设置在微电子封装芯中的开口内的微电子管芯，其中封装材料设置在不被微电子管芯占据的开口部分内。然后在微电子管芯，密封剂材料和微电子封装芯上制造介电材料和导电迹线的堆积层以形成微电子封装。

42. 发明授权

US06461895B1 Process for making active interposer for high performance packaging applications 失效
标题翻译：制造高性能封装应用的主动插入器的工艺
公开(公告)号：US06461895B1
公开(公告)日：2002-10-08
申请号：US09606871
申请日：2000-06-29
申请人： Chunlin Liang , Larry E. Mosley , Xiao Chun Mu
发明人： Chunlin Liang , Larry E. Mosley , Xiao Chun Mu
IPC分类号： H01L2144
CPC分类号： H01L25/18 , G11C7/02 , H01L23/49827 , H01L23/5387 , H01L25/0657 , H01L2224/16225 , H01L2225/06517 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06586 , H01L2924/00014 , H01L2924/01078 , H01L2924/15174 , H01L2924/15311 , H01L2924/15312 , H01L2924/19106 , H01L2924/3025 , H05K1/185 , H05K3/4614 , H05K3/4623 , H01L2224/0401
摘要： An integrated circuit (IC) package process is provided that includes forming a first via hole in a first substrate. Patterning signal lines on a first surface and a second surface of the first substrate. Attaching a second substrate to the first surface of the first substrate. Electronically connecting a portion of the signal lines of the first substrate and the second substrate. Attaching an electrical element to the first surface of the first substrate. Forming a via hole in a third substrate. Introducing conductive material over a first surface and a second surface of the third substrate. Forming a second circuit pattern on the first surface and the second surface of the third substrate. Additionally, attaching the third substrate to the first substrate with a second layer of adhesive. In an alternative embodiment, a process includes forming a via hole in a first substrate. Introducing conductive material over a first surface and a second of the first substrate, wherein the introducing conductive material over the first surface and the second surface of the first substrate fills the via hole to form a via and a through hole. Forming a first circuit pattern on the first surface and the second surface of the first substrate. Forming solder pads on the first circuit pattern. Attaching a second substrate to the first substrate. Attaching an electrical element to the first substrate. Forming a via hole in a second substrate. Introducing conductive material over a first surface and a second of the second substrate. Forming a second circuit pattern on the first surface and the second surface of the second substrate, and attaching the first substrate to the second substrate.
摘要翻译：提供了一种集成电路（IC）封装工艺，其包括在第一衬底中形成第一通孔。在第一基板的第一表面和第二表面上形成信号线。将第二衬底附接到第一衬底的第一表面。电连接第一基板和第二基板的信号线的一部分。将电气元件附接到第一基板的第一表面。在第三基板中形成通孔。在第三基板的第一表面和第二表面上引入导电材料。在第三基板的第一表面和第二表面上形成第二电路图案。另外，用第二层粘合剂将第三衬底附接到第一衬底。在替代实施例中，一种方法包括在第一衬底中形成通孔。在第一衬底的第一表面和第二衬底上引入导电材料，其中在第一衬底的第一表面和第二表面上的引入导电材料填充通孔以形成通孔和通孔。在第一基板的第一表面和第二表面上形成第一电路图案。在第一个电路图案上形成焊盘。将第二衬底附接到第一衬底。将电气元件附接到第一基板。在第二基板中形成通孔。在第二基板的第一表面和第二基板上引入导电材料。在第二基板的第一表面和第二表面上形成第二电路图案，并将第一基板附接到第二基板。

43. 发明授权

US06423570B1 Method to protect an encapsulated die package during back grinding with a solder metallization layer and devices formed thereby 失效
标题翻译：在用焊料金属化层和由此形成的器件的背面研磨期间保护封装的模头封装的方法
公开(公告)号：US06423570B1
公开(公告)日：2002-07-23
申请号：US09691738
申请日：2000-10-18
申请人： Qing Ma , Xiao-Chun Mu , Quat T. Vu
发明人： Qing Ma , Xiao-Chun Mu , Quat T. Vu
IPC分类号： H01L2144
CPC分类号： H01L24/97 , H01L21/561 , H01L21/568 , H01L23/16 , H01L23/3128 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L2224/0401 , H01L2224/04026 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/16227 , H01L2224/20 , H01L2224/24227 , H01L2224/274 , H01L2224/32188 , H01L2224/32245 , H01L2224/73267 , H01L2224/9222 , H01L2224/97 , H01L2924/01013 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15174 , H01L2924/15311 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/351 , H01L2224/82 , H01L2924/00
摘要： A microelectronic package including a microelectronic die having an active surface and at least one side. An encapsulation material is disposed adjacent the microelectronic die side(s). A portion of the encapsulation material is removed to expose a back surface of the microelectronic die which has a metallization layer disposed thereon. A protective layer is disposed on the metallization layer prior to encapsulation, such that when the portion of the encapsulation material is removed, the protective layer prevents the metallization layer from being damaged. After the portion of the encapsulation material is removed, the protective layer is removed and the metallization layer is exposed. A heat spreader may then be attached to the microelectronic die by abutting the heat spreader against the metallization layer and reflowing the metallization layer.
摘要翻译：一种微电子封装，其包括具有活性表面和至少一个侧面的微电子管芯。封装材料邻近微电子管芯侧设置。去除包封材料的一部分以露出其上设置有金属化层的微电子管芯的背面。在封装之前，保护层设置在金属化层上，使得当去除封装材料的部分时，保护层防止金属化层被损坏。在去除封装材料的部分之后，去除保护层并暴露金属化层。然后可以通过使散热器抵靠金属化层并且回流金属化层而将散热器附接到微电子管芯。

44. 发明授权

US5755443A Dart game controller that adjusts one score to effect other scores 失效
标题翻译： Dart游戏控制器调整一个分数以实现其他分数
公开(公告)号：US5755443A
公开(公告)日：1998-05-26
申请号：US677885
申请日：1996-07-10
申请人： Chun-Mu Huang
发明人： Chun-Mu Huang
IPC分类号： F41J3/00 , F41J5/14
CPC分类号： F41J3/00
摘要： The present invention is related to a controller for controlling the proceeding of a dart game provided for a plurality of players. The controller is mounted in an electronic dartboard and includes a calculator for calculating and storing respective scores of the plurality of players; a comparator electrically connected to the calculator for comparing a newly calculated score of the respective player with each of the other scores stored in the calculator, and then generating an adjusting signal when any of the compared results shows a predetermined relationship; and an arbitrator electrically connected to the calculator and the comparator for adjusting concerned scores in response to the adjusting signal.
摘要翻译：本发明涉及一种用于控制为多个玩家提供的镖游戏的进行的控制器。控制器安装在电子飞镖板中，并包括用于计算和存储多个玩家的各个分数的计算器; 电子连接到所述计算器的比较器，用于将存储在所述计算器中的每个所述其他得分的新计算得分进行比较，然后当所述比较结果中的任何一个显示预定关系时产生调整信号; 以及电连接到所述计算器和所述比较器的仲裁器，用于响应于所述调整信号调整相关分数。

45. 发明授权

US5612254A Methods of forming an interconnect on a semiconductor substrate 失效
标题翻译：在半导体衬底上形成互连的方法
公开(公告)号：US5612254A
公开(公告)日：1997-03-18
申请号：US905473
申请日：1992-06-29
申请人： Xiao-Chun Mu , Srinivasan Sivaram , Donald S. Gardner , David B. Fraser
发明人： Xiao-Chun Mu , Srinivasan Sivaram , Donald S. Gardner , David B. Fraser
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532 , H01L21/44
CPC分类号： H01L21/76843 , H01L21/76801 , H01L21/76807 , H01L21/76877 , H01L23/5226 , H01L23/5329 , H01L2221/1036 , H01L2924/0002
摘要： A device and methods of forming an interconnection within a prepatterned channel in a semiconductor device are described. The present invention includes a method of forming an interconnect channel within a semiconductor device. A first dielectric layer is deposited over a substrate and patterned to form a contact opening that is subsequently filled with a contact plug. A second dielectric layer is deposited over the patterned first dielectric layer and the contact plug. The second dielectric layer is patterned to form the interconnect channel, wherein the first dielectric layer acts as an etch stop to prevent etching of the substrate. The present invention also includes a method of forming an interconnect. A dielectric layer is deposited over a substrate and patterned to form an interconnect chapel. A metal layer is deposited over the patterned dielectric layer and within the interconnect channel. The metal layer is polished with an alkaline solution to remove the metal layer that does not lie within the interconnect chapel to form an interconnect. The present invention further includes a method of forming an interconnect over a silicon nitride layer. The silicon nitride layer is deposited over a semiconductor substrate and patterned to form a contact opening that is subsequently filled with a conductive material. A metal layer is deposited on the patterned silicon nitride layer and the contact plug and patterned to form the interconnect such that all of the interconnect lies on the contact plug and part of the patterned silicon nitride layer.
摘要翻译：描述了在半导体器件中的预制图形通道内形成互连的装置和方法。本发明包括在半导体器件内形成互连通道的方法。第一电介质层沉积在衬底上并被图案化以形成随后用接触插塞填充的接触开口。在图案化的第一介电层和接触插塞上沉积第二介电层。图案化第二电介质层以形成互连通道，其中第一介电层用作蚀刻停止件以防止蚀刻基板。本发明还包括形成互连的方法。将电介质层沉积在衬底上并图案化以形成互连教堂。金属层沉积在图案化的介电层上并且在互连通道内。金属层用碱性溶液抛光以除去不在互连教堂内的金属层以形成互连。本发明还包括在氮化硅层上形成互连的方法。氮化硅层沉积在半导体衬底上并被图案化以形成随后用导电材料填充的接触开口。金属层沉积在图案化的氮化硅层和接触插塞上，并被图案化以形成互连，使得所有互连都位于接触插塞和图案化的氮化硅层的一部分上。

46. 发明授权

US5481901A Device for demonstrating and testing electronic meters for bicycles 失效
标题翻译：用于示范和测试自行车电子表的装置
公开(公告)号：US5481901A
公开(公告)日：1996-01-09
申请号：US412586
申请日：1995-03-29
申请人： Chun-Mu Huang
发明人： Chun-Mu Huang
IPC分类号： G01C22/00 , G01P21/02
CPC分类号： G01P21/02 , G01C22/002 , G01P1/07
摘要： A device for demonstrating and testing electronic meters for bicycles including a body portion having a slot, a rod mounted on the body portion, a plurality of seats mounted on the rod, a first magnet fitted on the body portion, a handwheel partially pivotally fitted in the slot of the body portion, a second magnet fitted on a the handwheel, and an electronic testing device disposed within the body portion and operatively connected with the seats, whereby the device can be used for demonstrating as well as testing electronic meters for bicycles.
摘要翻译：一种用于示出和测试用于自行车的电子表的装置，包括具有槽的主体部分，安装在主体部分上的杆，安装在杆上的多个座，安装在主体部分上的第一磁体，部分地枢转地装配在其中的手轮主体部分的狭槽，安装在手轮上的第二磁体，以及设置在主体部分内并可操作地与座椅连接的电子测试装置，由此该装置可以用于示范以及测试用于自行车的电子计量表。

47. 发明授权

US5343524A Intelligent security device 失效
标题翻译：智能安全设备
公开(公告)号：US5343524A
公开(公告)日：1994-08-30
申请号：US718603
申请日：1991-06-21
申请人： Xiao-Chun Mu , Kai J. Chin , Feiying Chen
发明人： Xiao-Chun Mu , Kai J. Chin , Feiying Chen
IPC分类号： G06F21/00 , H04L9/04
CPC分类号： G06F21/123 , G06F2221/2137
摘要： An intelligent security device (10) is disclosed for protecting computer software from unauthorized use. The security device (10) is a hardware device having within a microprocessor (36) for interacting with a host computer (32) such that protected software may not be operated unless the security device (10) is in place. Physical duplication of the security device (10) will not result in a workable copy, due to the nature of the microprocessor (36), which is such that information is encoded therein and further such that encryption codes are also stored therein and cannot be discovered after the microprocessor (36) is locked by any known means. A system clock (21) within the microprocessor (36) is adaptable to the purpose of permitting use of the protected software only within limited time parameters.
摘要翻译：公开了一种用于保护计算机软件免于未经授权的使用的智能安全装置（10）。安全装置（10）是具有在微处理器（36）内的用于与主计算机（32）进行交互的硬件装置，使得受保护的软件可能不被操作，除非安全装置（10）就位。由于微处理器（36）的性质，安全设备（10）的物理复制将不会导致可工作的复制，这就使得信息被编码在其中并且进一步使得加密代码也被存储在其中并且不能被发现在微处理器（36）被任何已知的方式锁定之后。微处理器（36）内的系统时钟（21）适用于仅在有限的时间参数内允许使用受保护的软件的目的。

48. 外观设计

USD342211S Bicycle computer 失效
公开(公告)号：USD342211S
公开(公告)日：1993-12-14
申请号：US812380
申请日：1991-12-23
申请人： Chun-Mu Huang
设计人： Chun-Mu Huang

49. 外观设计

USD937772S1 Charger for medical transmitter 有权
公开(公告)号：USD937772S1
公开(公告)日：2021-12-07
申请号：US29719133
申请日：2019-12-31
申请人： Chun-Mu Huang , Chieh-Hsing Chen , Hsueh-Chuan Chang
设计人： Chun-Mu Huang , Chieh-Hsing Chen , Hsueh-Chuan Chang

50. 发明授权

US09052306B2 Coding module, bio measuring meter and system for operating bio measuring meter 有权
标题翻译：编码模块，生物测量仪和操作生物测量仪的系统
公开(公告)号：US09052306B2
公开(公告)日：2015-06-09
申请号：US11690407
申请日：2007-03-23
申请人： Chun-Mu Huang , Mao-Sung Huang , Cheng-Chieh Chuang
发明人： Chun-Mu Huang , Mao-Sung Huang , Cheng-Chieh Chuang
IPC分类号： G01N33/50 , G01N33/487
CPC分类号： G01N33/48771
摘要： A bio-measuring meter is provided. The bio-measuring meter includes a receptacle receiving a sample strip for the bio-measuring meter; and a figured piece identifying device comprising plural switches for receiving a figured piece, wherein at least one of the plural switches is switched by the figured piece to generate a current signal, and a datum of the sample strip is adjusted by a predefined respective parameter for the current signal.
摘要翻译：提供生物测量仪。生物测量计包括容纳用于生物测量计的样品条的容器; 以及包括多个用于接收图形片的开关的花纹片识别装置，其中，所述多个开关中的至少一个由所述成形件切换以产生电流信号，并且通过预定义的相应参数来调整所述样品条的基准，当前信号。

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