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    • 33. 发明申请
    • DATA OUTPUT CIRCUIT OF A SEMICONDUCTOR APPARATUS
    • 半导体器件的数据输出电路
    • US20150280692A1
    • 2015-10-01
    • US14325563
    • 2014-07-08
    • SK hynix Inc.
    • Hae Kang JUNG
    • H03K3/015H03K3/011
    • H03K3/015H03K3/011H03K19/0005H03K19/018585
    • A data output circuit of a semiconductor apparatus includes a pull-up driver including a plurality of leg units configured to be controlled in respective resistance values in response to code signals, be controlled in an entire resistance value as one or more of the plurality of leg units are selectively activated in response to selection signals, and configured to apply an output voltage with an output voltage level selected according to a control of the entire resistance value among a plurality of output voltage levels, to a data output pad; a control block configured to generate the selection signals in response to mode register signals; and a code generator configured to generate the code signals according to an external resistor.
    • 半导体装置的数据输出电路包括上拉驱动器,该上拉驱动器包括响应于代码信号被配置为被控制在相应的电阻值中的多个支脚单元,作为多个支路中的一个或多个的整个电阻值被控制 单元被选择性地响应于选择信号激活,并且被配置为将具有根据多个输出电压电平中的整个电阻值的控制选择的输出电压电平的输出电压施加到数据输出焊盘; 配置成响应于模式寄存器信号产生选择信号的控制块; 以及代码发生器,被配置为根据外部电阻产生代码信号。
    • 37. 发明授权
    • Circuit arrangement to generate squarewave signals with constant duty
cycle
    • 产生具有恒定占空比的方波信号的电路布置
    • US4736118A
    • 1988-04-05
    • US935080
    • 1986-11-24
    • Helmut Fischer
    • Helmut Fischer
    • H03K3/015H03K3/017H03K3/023H03K3/0232H03K5/22
    • H03K3/023H03K3/015H03K3/017H03K3/0232G05B2219/24032
    • The circuit arrangement generates square-wave signals whose recurrence frequency coincides with the recurrence frequency of input signals supplied to it and whose duty cycle is constant, irrespective of the recurrence frequency. The circuit arrangement contains a flip-flop set by each input signal and reset by reset signals. The square-wave signals are emitted at the output of the flip-flop. A first integrator circuit of relatively great time constant is discharged or charged when the flip-flop is set or reset, respectively. Another integrator circuit is charged whenever the flip-flop is set. The instantaneous voltages at outputs of integrator circuits are compared with each other, and when they are the same the comparator generates the reset signal. In addition, the second integrator circuit is discharged, and renewed charging is prevented as long as the flip-flop is reset.
    • 电路布置产生方波信号,其复发频率与提供给它的输入信号的重复频率一致,并且其占空比是恒定的,而不管再现频率如何。 该电路装置包含由每个输入信号设置的触发器,并由复位信号复位。 方波信号在触发器的输出端发射。 当触发器分别设置或复位时,相对较大时间常数的第一积分电路被放电或充电。 每当触发器置位时,另一个积分器电路被充电。 将积分电路输出的瞬时电压相互比较,当相同时,比较器产生复位信号。 此外,第二积分器电路被放电,并且只要触发器被复位,就防止更新的充电。
    • 40. 发明授权
    • Drive circuit and semiconductor apparatus
    • 驱动电路和半导体装置
    • US09559668B2
    • 2017-01-31
    • US14684764
    • 2015-04-13
    • TOYOTA JIDOSHA KABUSHIKI KAISHA
    • Yosuke Osanai
    • H03K3/015H03K17/60
    • H03K3/015H03K17/60
    • A drive circuit includes a gate drive node, a power source node, and an output transistor connected between the gate drive node and the power source node that flows a current into the gate drive node. The drive circuit further includes an input transistor smaller than the output transistor that forms a current mirror with the output transistor. The drive circuit further includes an operational amplifier that outputs a control voltage depending on a potential difference between a voltage of the gate drive node and a constant voltage lower than a voltage of the power source node. The drive circuit further includes a control transistor including a control electrode receiving an output of the operational amplifier that is connected in series with the input transistor. The drive circuit further includes a constant current source connected in series with the control transistor.
    • 驱动电路包括栅极驱动节点,电源节点和连接在栅极驱动节点和将电流流入栅极驱动节点的电源节点之间的输出晶体管。 驱动电路还包括小于与输出晶体管形成电流镜的输出晶体管的输入晶体管。 驱动电路还包括运算放大器,其输出取决于栅极驱动节点的电压与低于电源节点的电压的恒定电压之间的电位差的控制电压。 驱动电路还包括控制晶体管,该控制晶体管包括接收与输入晶体管串联连接的运算放大器的输出的控制电极。 驱动电路还包括与控制晶体管串联连接的恒流源。