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31. 发明申请

US20140170812A1 METHOD AND APPARATUS FOR MANUFACTURING CHIP PACKAGE 有权
标题翻译：制造芯片包装的方法和装置
公开(公告)号：US20140170812A1
公开(公告)日：2014-06-19
申请号：US13846640
申请日：2013-03-18
申请人： SK HYNIX INC.
发明人： Cheol Ho JOH
IPC分类号： H01L21/50
CPC分类号： H01L24/85 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/05553 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49175 , H01L2224/73265 , H01L2224/78301 , H01L2224/787 , H01L2224/78745 , H01L2224/789 , H01L2224/83191 , H01L2224/85181 , H01L2224/85186 , H01L2224/92247 , H01L2225/0651 , H01L2225/06562 , H01L2924/00014 , H01L2924/10161 , Y10T29/53178 , H01L2224/45099 , H01L2924/00012 , H01L2224/29099 , H01L2924/00 , H01L2224/4554
摘要： There are proposed a method and apparatus for manufacturing a chip package in which bonding wires are coupled with contact pads in which an overhang holder holds and fixes portions of a surface adjacent to portions where the contact pads are located.
摘要翻译：提出了一种用于制造芯片封装的方法和装置，其中，接合线与接触焊盘耦合，其中突出支架保持并固定与接触垫所在部分相邻的表面的部分。

32. 发明申请

US20140105717A1 PNP APPARATUS WITH PICK-UP TIP AND RELATED METHODS 有权
标题翻译： PNP装置及其相关方法
公开(公告)号：US20140105717A1
公开(公告)日：2014-04-17
申请号：US13651562
申请日：2012-10-15
申请人： STMICROELECTRONICS ASIA PACIFIC PTE LTD
发明人： Hk LOOI , Cheng-hai CHEH , HaiKin TOH
IPC分类号： B25J15/06
CPC分类号： B25J15/0616 , H05K13/0404 , H05K13/0408 , H05K13/0409 , Y10S901/40 , Y10T29/53178 , Y10T29/53191
摘要： A PNP apparatus may include a robotic arm, and a PNP tool head carried by the robotic arm. The PNP tool head may include a body configured to apply bonding pressure to a first area of an electronic device, and a pick-up tip movable between an extended position and a retracted position relative to the body as the pick-up tip rests against a second area of the electronic device. The pick-up tip may define a vacuum passageway therethrough to couple a vacuum source to the second area of the electronic device.
摘要翻译： PNP装置可以包括机器人臂和由机器人手臂承载的PNP工具头。 PNP工具头可以包括构造成将粘合压力施加到电子设备的第一区域的主体，以及拾取尖端，当拾取尖端抵靠在主体上时，拾取尖端可相对于主体在延伸位置和缩回位置之间移动电子设备的第二区域。拾取尖端可以限定穿过其中的真空通道以将真空源耦合到电子设备的第二区域。

33. 发明授权

US08697494B2 Method of manufacturing a flip chip package and apparatus to attach a semiconductor chip used in the method 有权
标题翻译：制造倒装芯片封装的方法和用于附接在该方法中使用的半导体芯片的装置
公开(公告)号：US08697494B2
公开(公告)日：2014-04-15
申请号：US13241517
申请日：2011-09-23
申请人： Chang-Seong Jeon , Ho-Geon Song , Mitsuo Umemoto , Sang-Sick Park
发明人： Chang-Seong Jeon , Ho-Geon Song , Mitsuo Umemoto , Sang-Sick Park
IPC分类号： H01L21/00
CPC分类号： H01L24/74 , H01L21/67 , H01L23/16 , H01L23/3128 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/75 , H01L24/81 , H01L24/83 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/13025 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/32151 , H01L2224/32225 , H01L2224/73204 , H01L2224/7501 , H01L2224/7515 , H01L2224/7525 , H01L2224/75252 , H01L2224/75804 , H01L2224/75824 , H01L2224/759 , H01L2224/7598 , H01L2224/7901 , H01L2224/81011 , H01L2224/81193 , H01L2224/81815 , H01L2224/831 , H01L2224/8385 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/01033 , H01L2924/01047 , H01L2924/014 , H01L2924/15311 , H01L2924/181 , Y10T29/53178 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： A method and apparatus to manufacture a flip chip package includes dotting a flux on a first preliminary bump of a package substrate, attaching a preliminary bump of a first semiconductor chip to the first preliminary bump of the package substrate via the flux, dotting a flux on a second preliminary bump of the package substrate, and attaching a preliminary bump of a second semiconductor chip to the second preliminary bump of the package substrate via the flux. Accordingly, an evaporation of the flux on the preliminary bump of the package substrate may be suppressed.
摘要翻译：制造倒装芯片封装的方法和装置包括将焊剂点到封装衬底的第一预备凸块上，通过焊剂将第一半导体芯片的初步凸点附着到封装衬底的第一初步凸块上，点焊焊剂封装衬底的第二初步凸块，以及通过焊剂将第二半导体芯片的预备凸块附接到封装衬底的第二初级凸块。因此，可以抑制在封装衬底的初步凸块上的焊剂的蒸发。

34. 发明授权

US08683683B2 Method for positioning and mounting an LED assembly as well as a positioning body for this purpose 有权
标题翻译：用于定位和安装LED组件以及用于此目的的定位体的方法
公开(公告)号：US08683683B2
公开(公告)日：2014-04-01
申请号：US12739042
申请日：2008-10-02
申请人： Franz Knoll , Michael Maryschka , Gregor Svobodnik , Boris Thaller
发明人： Franz Knoll , Michael Maryschka , Gregor Svobodnik , Boris Thaller
IPC分类号： H05K3/30 , B23P19/00
CPC分类号： F21V19/005 , F21S41/141 , F21S41/143 , F21S41/192 , F21S43/14 , F21S43/195 , F21S45/47 , F21S45/49 , F21V7/0083 , F21V17/005 , F21V17/06 , F21V17/16 , F21V17/164 , F21V29/763 , F21Y2103/10 , F21Y2105/10 , F21Y2113/00 , F21Y2115/10 , H05K3/0061 , H05K3/386 , H05K7/20509 , H05K2201/2036 , H05K2203/0195 , H05K2203/166 , H05K2203/167 , Y10T29/4913 , Y10T29/49133 , Y10T29/53174 , Y10T29/53178 , Y10T29/53183
摘要： In a method for positioning and mounting, on a carrier body (6), an LED assembly (1) preassembled on a circuit board (4), the circuit board (4) having the LED assembly (1) is placed and glued onto the carrier body (6), the LED assembly (1) being brought into the prescribed position relative to the carrier body (6) after being placed on the carrier body (6) by a positioning body (11) having centering elements (17) that contact the LED assembly (1) on one side and the carrier body (6) on the other, wherein the circuit board (4) having the LED assembly (1) is aligned with the carrier body (6). The positioning body (11) has a leg (15, 16) extending from a connecting part (12) and having centering elements (17) for contacting the LED assembly (1) on one side and the carrier body (6) on the other side.
摘要翻译：在一种用于定位和安装的方法中，在载体主体（6）上，预先组装在电路板（4）上的LED组件（1），具有LED组件（1）的电路板（4）被放置并粘合到（6），在通过具有定心元件（17）的定位体（11）放置在承载体（6）上之后，LED组件（1）相对于承载体（6）进入规定位置，将一侧的LED组件（1）和另一个的载体主体（6）接触，其中具有LED组件（1）的电路板（4）与载体主体（6）对准。定位体（11）具有从连接部分（12）延伸并具有定心元件（17）的腿部（15,16），用于在一侧接触LED组件（1）并且在另一侧上与承载体（6）接触侧。

35. 发明申请

US20140069697A1 METHOD AND APPARATUS FOR ASSEMBLING ELECTRIC COMPONENTS ON A FLEXIBLE SUBSTRATE AS WELL AS ASSEMBLY OF AN ELECTRIC COMPONENT WITH A FLEXIBLE SUBSTRATE 有权
标题翻译：用于组装柔性基板上的电气部件的方法和装置，以便组装具有柔性基板的电气部件
公开(公告)号：US20140069697A1
公开(公告)日：2014-03-13
申请号：US13990823
申请日：2011-12-02
申请人： Jeroen Van Den Brand , Roel Henry Louis Kusters , Andreas Heinrich Dietzel
发明人： Jeroen Van Den Brand , Roel Henry Louis Kusters , Andreas Heinrich Dietzel
IPC分类号： H05K3/32 , H05K1/02
CPC分类号： H05K3/32 , H01L23/4985 , H01L24/24 , H01L24/76 , H01L24/82 , H01L2224/2405 , H01L2224/24051 , H01L2224/24226 , H01L2224/25171 , H01L2224/25175 , H01L2224/76155 , H01L2224/76261 , H01L2224/766 , H01L2224/767 , H01L2224/82102 , H01L2224/82104 , H01L2224/82106 , H01L2224/82874 , H01L2224/9202 , H01L2224/92144 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0106 , H01L2924/01079 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H05K1/0283 , H05K1/189 , H05K3/12 , H05K3/305 , H05K2201/10674 , H05K2203/107 , H05K2203/1469 , H05K2203/1545 , H05K2203/175 , Y10T29/49133 , Y10T29/53178 , H01L2924/00
摘要： A method is presented for assembling a component (30) with a flexible substrate (10), the component having electric contacts (31). The method comprises the steps of placing the component (30) on a first main side (11) of the substrate, applying a machine vision step to estimate a position of the electric contacts, depositing one or more layers (32) of an electrically conductive material or a precursor thereof, said layer extending over an area of the substrate defined by the component to laterally beyond said area, calculating partitioning lines depending on the estimated position of the electric contacts, partitioning the layer into mutually insulated areas (32d) by locally removing material from said layer along said partitioning lines. Also an apparatus is presented that is suitable for carrying out the method.In addition an assembly is present that can be obtained by the method and the apparatus according to the invention.
摘要翻译：提出了一种用于将组件（30）与柔性基板（10）组装的方法，该部件具有电触点（31）。该方法包括以下步骤：将组件（30）放置在衬底的第一主侧（11）上，施加机器视觉步骤以估计电触点的位置，沉积导电的一个或多个层（32）材料或其前体，所述层在由所述部件限定的衬底的区域上延伸到横向超过所述区域，根据所述电触点的估计位置计算划分线，通过局部将所述层划分为相互绝缘的区域（32d）沿着所述分隔线从所述层去除材料。还提出了适合于执行该方法的装置。此外，存在可以通过根据本发明的方法和装置获得的组件。

36. 发明授权

US08667670B2 Electronic component mounting apparatus 有权
标题翻译：电子元件安装装置
公开(公告)号：US08667670B2
公开(公告)日：2014-03-11
申请号：US13430277
申请日：2012-03-26
申请人： Keisuke Ishida
发明人： Keisuke Ishida
IPC分类号： B23P19/00
CPC分类号： H05K13/0452 , H05K13/041 , Y10T29/49124 , Y10T29/4913 , Y10T29/49133 , Y10T29/53039 , Y10T29/53174 , Y10T29/53178 , Y10T29/53183
摘要： A mounting apparatus includes a first placing unit and a second placing unit each configured to thrust an electronic component that is held toward a substrate, place the electronic component on the substrate, and leave the substrate, and a controller configured to set an inhibit period during which, while one placing unit of the first placing unit and the second placing unit thrusts the electronic component or leaves the substrate, at least one of a thrusting operation of the electronic component and an operation of leaving the substrate by another placing unit is inhibited so that the other placing unit does not execute the at least one of the thrusting operation and the operation of leaving the substrate.
摘要翻译：安装装置包括第一放置单元和第二放置单元，每个第一放置单元和第二放置单元均构造成推动保持在基板上的电子部件，将电子部件放置在基板上并离开基板;以及控制器，其被配置为在当第一放置单元和第二放置单元的一个放置单元推动电子部件或离开基板时，电子部件的推进操作和由另一个放置单元离开基板的操作中的至少一个被抑制，另一个放置单元不执行推出操作和离开基板的操作中的至少一个。

37. 发明申请

US20140011153A1 PEDESTAL CONSTRUCTION WITH LOW COEFFICIENT OF THERMAL EXPANSION TOP 有权
标题翻译：具有低膨胀系数的PEDESTAL结构
公开(公告)号：US20140011153A1
公开(公告)日：2014-01-09
申请号：US13836373
申请日：2013-03-15
申请人： Watlow Electric Manufacturing Company
发明人： Jacob R. Lindley
IPC分类号： H01L21/683
CPC分类号： H01L21/683 , C23C16/4581 , C23C16/4586 , H01L21/67103 , H01L21/6831 , H01L21/68742 , H01L21/68785 , H01L21/68792 , H05B3/143 , H05B3/26 , H05B3/265 , H05B2203/002 , H05B2203/013 , H05B2203/017 , Y10T29/49002 , Y10T29/53178
摘要： A support assembly for use in semiconductor processing includes an application substrate, a heater layer disposed directly onto the application substrate, an insulation layer disposed onto the heater layer, and a second substrate disposed onto the insulation layer. The heater layer is directly disposed onto the application substrate by a layered process such that the heater layer is in direct contact with the application substrate. The application substrate defines a material having a relatively low coefficient of thermal expansion that is matched to a coefficient of thermal expansion of the heater layer.
摘要翻译：用于半导体处理的支撑组件包括施加衬底，直接设置在应用衬底上的加热器层，设置在加热器层上的绝缘层和设置在绝缘层上的第二衬底。加热器层通过分层工艺直接设置在施加衬底上，使得加热器层与施加衬底直接接触。应用衬底限定了具有与加热器层的热膨胀系数匹配的相对低的热膨胀系数的材料。

38. 发明申请

US20130242461A1 MULTI LAYER CHIP CAPACITOR, AND METHOD AND APPARATUS FOR MANUFACTURING THE SAME 审中-公开
标题翻译：多层芯片电容器及其制造方法和装置
公开(公告)号：US20130242461A1
公开(公告)日：2013-09-19
申请号：US13874373
申请日：2013-04-30
申请人： SEHYANG INDUSTRIAL CO., LTD.
发明人： Jae-Ho HA
IPC分类号： H01G4/06
CPC分类号： H01G4/06 , H01G4/008 , H01G4/012 , H01G4/085 , H01G4/232 , H01G4/30 , H01G4/306 , H01G13/00 , Y10T29/43 , Y10T29/435 , Y10T29/49144 , Y10T29/5313 , Y10T29/53174 , Y10T29/53178
摘要： A method of manufacturing a multi-layer chip capacitor by depositing a dielectric layer and a conductor layer in the form of multi-layer chip, while a width of the conductor layer is narrower than a width of the dielectric layer including adjusting and setting a distance between a single shadow mask installed to a mask set to be rotated and revolved and having a plurality of slits, positioning a dielectric layer deposition source to be perpendicular to the single shadow mask and a conductor layer deposition source to be oblique to the single shadow mask, and forming the dielectric layer and the conductor layer in the vacuum deposition while controlling the mask set to move along the X-, Y-, and Z-axes (the X-axis is the width direction, the Y-axis is the longitudinal direction, and the Z-axis is the height direction).
摘要翻译：通过以多层芯片的形式沉积介电层和导体层制造多层片状电容器的方法，而导体层的宽度比电介质层的宽度窄，包括调节和设定距离在安装到要旋转和旋转的掩模的单个荫罩之间并具有多个狭缝，将介电层沉积源定位成垂直于单个荫罩和导体层沉积源以倾斜于单个荫罩并且在真空沉积中形成电介质层和导体层，同时控制掩模组沿X，Y轴和Z轴移动（X轴是宽度方向，Y轴是纵向的方向，Z轴为高度方向）。

39. 发明申请

US20130232775A1 DIE BOND SYSTEM 有权
标题翻译： DIE BOND系统
公开(公告)号：US20130232775A1
公开(公告)日：2013-09-12
申请号：US13719240
申请日：2012-12-19
申请人： HON HAI PRECISION INDUSTRY CO., LTD.
发明人： CHIH-CHEN LAI
IPC分类号： H05K13/04
CPC分类号： H05K13/04 , H01L21/67144 , H01L21/67259 , H01L21/6838 , Y10T29/53 , Y10T29/53087 , Y10T29/53174 , Y10T29/53178 , Y10T29/53183 , Y10T29/53191 , Y10T29/53261
摘要： A die bonding system for bonding a die on a substrate is provided. The die bonding system includes a supporting base for the substrate, a die pickup device for picking up the die, and an alerting device. The supporting base includes a number of conductive and height-adjustable upper portions. The upper portions are spaced from each other. The alerting device includes a power source and an alerting element electrically connected to the power source. Two electrodes of the power source are electrically connected to the die pickup device and the upper portions, and the alerting element generates different alerts according to different contacting status of the upper portions and the die pickup device.
摘要翻译：提供了一种用于在基板上接合管芯的管芯接合系统。芯片接合系统包括用于基板的支撑基座，用于拾取模具的芯片拾取装置和报警装置。支撑底座包括多个导电且高度可调节的上部。上部彼此间隔开。警报装置包括电源和电连接到电源的警报元件。电源的两个电极电连接到芯片拾取装置和上部，并且警报元件根据上部和芯片拾取装置的不同接触状态产生不同的警报。

40. 发明申请

US20130207250A1 CHIP ATTACH FRAME 失效
公开(公告)号：US20130207250A1
公开(公告)日：2013-08-15
申请号：US13396207
申请日：2012-02-14
申请人： Martin Eckert , Otto Torreiter , Quintino L. Trianni
发明人： Martin Eckert , Otto Torreiter , Quintino L. Trianni
IPC分类号： H01L23/495 , H01L21/58
CPC分类号： H01L24/75 , G01R1/0466 , G01R1/0483 , H01L21/4853 , H01L21/67144 , H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/131 , H01L2224/16225 , H01L2224/75252 , H01L2224/75301 , H01L2224/75315 , H01L2224/75316 , H01L2224/75501 , H01L2224/757 , H01L2224/75754 , H01L2224/75756 , H01L2224/759 , H01L2224/81121 , H01L2224/81136 , H01L2224/81191 , H01L2224/81203 , H01L2224/8121 , H01L2224/81815 , H01L2224/81908 , H05K13/0413 , Y10T29/53178 , H01L2924/00014 , H01L2924/014 , H01L2924/00012
摘要： A chip attach frame is used to align pins of an integrated circuit chip with pads on a chip carrier. A frame block has a socket defining two alignment edges that form a reference corner. The chip is lowered into the socket, and the chip carrier is inclined while it supports the frame block and chip until the chip moves under force of gravity to the reference corner. Once located at the reference corner, the chip position is carefully adjusted by moving the frame block in the x- and y-directions until the pins are aligned with the pads. The frame block is spring biased against movement in the x- and y-directions, and the position of the frame block is adjusted using thumbscrews. A plunger mechanism can be used to secure the integrated circuit chip in forcible engagement with the chip carrier once the pins are aligned with the pads.

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