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31. 发明授权

US3564355A Semiconductor device employing a p-n junction between induced p- and n- regions 失效
标题翻译：使用诱导的P-和N-区域之间的P-N结的半导体器件
公开(公告)号：US3564355A
公开(公告)日：1971-02-16
申请号：US3564355D
申请日：1968-08-02
申请人： SPRAGUE ELECTRIC CO
发明人： LEHOVOC KURT
IPC分类号： B01J7/02 , H01L29/00 , H01L29/423 , H01L29/768 , H01L31/00 , H01L33/00 , H01L11/14
CPC分类号： H01L33/0041 , B01J7/02 , H01L29/00 , H01L29/42396 , H01L29/768 , H01L31/00 , H01L33/00
摘要： SEMICONDUCTOR DEVICES ARE FORMED BY THE INDUCTION OF P- AND N-REGIONS INTO A HIGH RESISTIVITY OR SEMI-INSULATINGSEMICONDUCTING FILM BY MEANS OF ELECTRIC FIELDS APPLIED PERPENDICULAR TO THE SEMICONDUCTOR FILM. BY CHANGING THE FIELD MAGNITUDE AND/OR POLARITY, THE LOCATION AND CONDUCTIVITY OF THE P- AND N-REGIONS CAN BE VARIED THEREBY VARYING THE CHARACTERISTICS OF THE DEVICE.

32. 发明公开

US20230240077A1 MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND WRAPPED DATA LINE STRUCTURE 审中-公开
公开(公告)号：US20230240077A1
公开(公告)日：2023-07-27
申请号：US18126679
申请日：2023-03-27
申请人： Micron Technology, Inc.
发明人： Kamal M. Karda , Eric S. Carman , Karthik Sarpatwari , Durai Vishak Nirmal Ramaswamy , Richard E. Fackenthal , Haitao Liu
IPC分类号： H10B43/50 , H01L29/423 , H01L29/10
CPC分类号： H10B43/50 , H01L29/1062 , H01L29/42396
摘要： Some embodiments include apparatuses and methods forming the apparatuses. One of the apparatuses includes a first transistor including a first channel region, and a charge storage structure separated from the first channel region; a second transistor including a second channel region formed over the charge storage structure; and a data line formed over and contacting the first channel region and the second channel region, the data line including a portion adjacent the first channel region and separated from the first channel region by a dielectric material.

33. 发明申请

US20160099286A1 SEMICONDUCTOR DEVICE INCLUDING IMAGE PICK UP DEVICE 审中-公开
标题翻译：包含图像拾取器件的半导体器件
公开(公告)号：US20160099286A1
公开(公告)日：2016-04-07
申请号：US14970345
申请日：2015-12-15
申请人： RENESAS ELECTRONICS CORPORATION
发明人： Yuki YAMAMOTO , Yukio NISHIDA , Tomohiro YAMASHITA
IPC分类号： H01L27/146
CPC分类号： H01L27/14689 , H01L21/265 , H01L21/324 , H01L21/76897 , H01L27/10876 , H01L27/14609 , H01L27/14614 , H01L27/14616 , H01L27/14641 , H01L27/14812 , H01L27/14831 , H01L27/14887 , H01L29/1091 , H01L29/42396
摘要： The performance of a semiconductor device is improved by preventing 1/f noise from being generated in a peripheral transistor, in the case where the occupation area of photodiodes, which are included in each of a plurality of pixels that form an image pickup device, is expanded. In the semiconductor device, the gate electrode of an amplification transistor is formed by both a gate electrode part over an active region and a large width part that covers the boundary between the active region and an element isolation region and the active region near the boundary and that has a gate length larger than that of the gate electrode part.
摘要翻译：在包括在形成图像拾取装置的多个像素中的每一个中的光电二极管的占有面积为（...）的情况下，通过防止在外围晶体管中产生1 / f噪声来提高半导体器件的性能扩大了在半导体器件中，放大晶体管的栅电极由有源区上的栅电极部分和覆盖有源区和元件隔离区之间的边界的大宽度部分和边界附近的有源区两者形成，其栅极长度大于栅电极部分的栅极长度。

34. 发明申请

US20030151075A1 Solid-state image pick-up device 失效
标题翻译：固态摄像装置
公开(公告)号：US20030151075A1
公开(公告)日：2003-08-14
申请号：US10366672
申请日：2003-02-14
发明人： Makoto Shizukuishi
IPC分类号： H01L027/148
CPC分类号： H01L27/14812 , H01L27/14831 , H01L27/14843 , H01L29/42396
摘要： A honeycomb CCD, whose light receiving portion and a certain light receiving portion 105 adjoining thereto are arranged at a position to be shifted by half a pixel pitch in line and row directions, has charge transfer electrodes 111-114 formed of double-layered polysilicon electrode, a metal wiring 125, having smaller resistivity thereto, which is arranged in the longitudinal direction along each VCCD to intersect and cross over the charge transfer electrodes 111-114 being connected by a contact hole 126, by which electrical resistance of the polysilicon layer of the charge transfer electrodes can be lowered without increasing thickness thereof.
摘要翻译：将其光接收部分和与其相邻的特定光接收部分105布置在行和行方向上偏移半个像素间距的蜂窝CCD具有由双层多晶硅电极形成的电荷转移电极111-114 具有较小的电阻率的金属布线125沿着每个VCCD在纵向方向上布置以交叉并交叉通过接触孔126连接的电荷转移电极111-114，由此，多晶硅层的电阻可以在不增加电荷转移电极的厚度的情况下降低电荷转移电极。

35. 发明授权

US06558985B2 Charge coupled device and method of fabricating the same 有权
公开(公告)号：US06558985B2
公开(公告)日：2003-05-06
申请号：US10086520
申请日：2002-03-04
申请人： Seo Kyu Lee
发明人： Seo Kyu Lee
IPC分类号： H01L2714
CPC分类号： H01L29/42396 , H01L27/14831
摘要： A CCD and method of fabricating the same, which reads signal charges completely and increases the fill factor of its pixel, to improve the sensitivity. The CCD having photodiodes in matrix form, includes a first interlevel insulating layer and first transfer gate sequentially formed between the photodiodes arranged in the row direction, a block insulating layer formed along the center of the first transfer gate, a second interlevel insulating layer formed on the first transfer gate, second and third transfer gates formed on the first transfer gate, being isolated from each other on the block insulating layer, a third interlevel insulating layer formed on the second and third transfer gates, and a fourth transfer gate formed on the third interlevel insulating layer, being placed on the second and third transfer gates.

36. 发明授权

US06218686B1 Charge coupled devices 有权
标题翻译：电荷耦合器件
公开(公告)号：US06218686B1
公开(公告)日：2001-04-17
申请号：US09405492
申请日：1999-09-24
申请人： Jung-Hyun Nam
发明人： Jung-Hyun Nam
IPC分类号： H01L2976
CPC分类号： H01L27/14812 , H01L29/42396 , H01L29/76841
摘要： A charge coupled device has a transfer electrode portion having a first gate electrode, a second gate electrode having an end portion partially overlapping an end portion of the first gate electrode, and a third gate electrode having one end portion partially overlapping the other end portion of the first gate electrode. The charge coupled device also has a charge transfer portion located in a semiconductor substrate under the first, second and third gate electrodes, which includes a first potential area formed in the semiconductor substrate under the second gate electrode and a second potential area formed in the semiconductor substrate under the third gate electrode. The charge coupled device further has a clock portion which includes a first clock terminal connected to the first and third gate electrodes, and a second clock terminal connected to the second gate electrode. This charge coupled device may prevent unnecessary local potential barriers or wells produced by a misalignment, and thus may provide increased charge transfer efficiency.
摘要翻译：电荷耦合器件具有转移电极部分，该转移电极部分具有第一栅电极，第二栅电极具有部分与第一栅电极的端部重叠的端部，以及第三栅电极，第一栅电极。电荷耦合器件还具有位于第一，第二和第三栅电极下的半导体衬底中的电荷转移部分，其包括形成在第二栅电极下的半导体衬底中的第一电位区域和形成在半导体中的第二电势区域衬底在第三栅电极下。电荷耦合器件还具有一个时钟部分，该时钟部分包括连接到第一和第三栅极的第一时钟端子和连接到第二栅电极的第二时钟端子。该电荷耦合器件可以防止由于未对准而产生的不必要的局部势垒或阱，从而可以提供增加的电荷转移效率。

37. 发明授权

US5986295A Charge coupled device 失效
标题翻译：电荷耦合器件
公开(公告)号：US5986295A
公开(公告)日：1999-11-16
申请号：US772183
申请日：1996-12-19
申请人： Jung-hyun Nam
发明人： Jung-hyun Nam
IPC分类号： H01L21/339 , H01L27/148 , H01L29/423 , H01L29/762 , H01L29/768
CPC分类号： H01L29/42396 , H01L27/14812 , H01L29/76841
摘要： A charge coupled device and a manufacturing method therefor are provided. The charge coupled device has a transfer electrode portion having a first gate electrode, a second gate electrode having an end portion partially overlapping an end portion of the first gate electrode, and a third gate electrode having one end portion partially overlapping the other end portion of the first gate electrode and the other end portion thereof partially overlapping the other end portion of the second gate electrode. The charge coupled device also has a charge transfer portion located in a semiconductor substrate under the first, second and third gate electrodes, which includes a first potential area formed in the semiconductor substrate under the second gate electrode and a second potential area formed in the semiconductor substrate under the third gate electrode. The charge coupled device further has a clock portion which includes a first clock terminal connected to the first and third gate electrodes, and a second clock terminal connected to the second gate electrode. This charge coupled device may prevent unnecessary local potential barriers or wells produced by a misalignment, and thus may provide increased charge transfer efficiency.
摘要翻译：提供了一种电荷耦合器件及其制造方法。电荷耦合器件具有转移电极部分，该转移电极部分具有第一栅电极，第二栅电极具有与第一栅电极的端部部分重叠的端部，第三栅电极具有部分与第一栅电极的另一端部分重叠的第三栅电极第一栅电极和另一端部分与第二栅电极的另一端部重叠。电荷耦合器件还具有位于第一，第二和第三栅电极下的半导体衬底中的电荷转移部分，其包括形成在第二栅电极下的半导体衬底中的第一电位区域和形成在半导体中的第二电势区域衬底在第三栅电极下。电荷耦合器件还具有一个时钟部分，该时钟部分包括连接到第一和第三栅极的第一时钟端子和连接到第二栅电极的第二时钟端子。该电荷耦合器件可以防止由于未对准而产生的不必要的局部势垒或阱，从而可以提供增加的电荷转移效率。

38. 发明授权

US5904494A Fabrication process for solid-state image pick-up device with CCD register 失效
标题翻译：具有CCD寄存器的固态摄像装置的制作工艺
公开(公告)号：US5904494A
公开(公告)日：1999-05-18
申请号：US835412
申请日：1997-04-09
申请人： Yasuaki Hokari , Chihiro Ogawa
发明人： Yasuaki Hokari , Chihiro Ogawa
IPC分类号： H01L21/26 , H01L21/316 , H01L21/339 , H01L27/148 , H01L29/423 , H01L29/762 , H01L31/18 , H01L21/00
CPC分类号： H01L29/42396 , H01L27/148 , H01L27/14831 , H01L31/1864 , Y02E10/50
摘要： At first, first transfer electrodes are formed selectively on a semiconductor substrate. Then, the surface of the first transfer electrodes are thermally oxidized at a temperature of 850.degree. to 950.degree. C. to form thermal oxide layers. After depositing a polycrystalline silicon layer over the substrate, rapid annealing is performed the first transfer electrodes, the thermal oxide layers and the polycrystalline silicon layer by a halogen lamp. Thus, after forming the polycrystalline silicon layer to be second transfer electrodes, annealing is performed by heating by lamp. Therefore, the thermal oxide layers can be efficiently heated by the irradiation heat from the polycrystalline silicon layer located upper side thereof and also from the first electrodes located at backside. Accordingly, the tolerance voltage of the thermal oxide layer can be improved and the thickness of the thermal oxide layer can be made thinner.
摘要翻译：首先，在半导体基板上选择性地形成第一转印电极。然后，将第一转印电极的表面在850〜950℃的温度下热氧化，形成热氧化层。在衬底上沉积多晶硅层之后，通过卤素灯对第一转移电极，热氧化物层和多晶硅层进行快速退火。因此，在将多晶硅层形成为第二转移电极之后，通过灯加热进行退火。因此，可以通过位于其上侧的多晶硅层的照射热以及位于背面的第一电极来有效地加热热氧化物层。因此，可以提高热氧化物层的公差电压，并且可以使热氧化物层的厚度更薄。

39. 发明授权

US5731601A Four-phase driving CCD solid-state imaging device with a two-layer transfer gate electrode 失效
标题翻译：具有双层传输栅电极的四相驱动CCD固态成像器件
公开(公告)号：US5731601A
公开(公告)日：1998-03-24
申请号：US769380
申请日：1996-12-19
申请人： Yoshiyuki Shioyama , Hidenori Shibata
发明人： Yoshiyuki Shioyama , Hidenori Shibata
IPC分类号： H01L27/148 , H01L29/423 , H04N5/335 , H04N5/341 , H04N5/359 , H04N5/369 , H04N5/3728 , H01L29/768
CPC分类号： H01L27/14812 , H01L29/42396
摘要： According to the present invention, there is provided a solid-state imaging device that has a two-layer transfer electrode structure and is based on a four-phase driving all-pixel reading scheme. The transfer gate electrodes for taking the signal charges out of the photodiode PD and transferring them vertically are formed so that the polysilicon electrodes of a first layer and the polysilicon electrodes of a second layer may each have a specific gate length and be in contact with the gate insulating film on a silicon substrate. If four-phase transfer clocks are .phi.1 to .phi.4, the clocks will be applied to the transfer gate electrodes 31, 32 repeatedly in this order for a single pixel (photodiode PD): the second-layer electrode (.phi.2)--the second-layer electrode (.phi.3)--the first-layer electrode (.phi.4)--the first-layer electrode (.phi.1).
摘要翻译：根据本发明，提供了一种具有双层转移电极结构并且基于四相驱动全像素读取方案的固态成像装置。用于将信号电荷从光电二极管PD中垂直转移的传输栅电极形成为使得第一层的多晶硅电极和第二层的多晶硅电极可以各自具有特定的栅极长度并且与栅极绝缘膜在硅衬底上。如果四相传输时钟为phi 1至phi 4，则时钟将按顺序反复施加到传输栅电极31,32，用于单个像素（光电二极管PD）：第二层电极（phi 2）第二层电极（phi 3） - 第一层电极（phi 4） - 第一层电极（phi 1）。

40. 发明授权

US5652442A Charge coupled device and imaging device having a charge coupled device 失效
标题翻译：电荷耦合器件和具有电荷耦合器件的成像器件
公开(公告)号：US5652442A
公开(公告)日：1997-07-29
申请号：US493045
申请日：1995-06-21
申请人： Edwin Roks
发明人： Edwin Roks
IPC分类号： H01L27/148 , G11C19/28 , G11C27/04 , H01L21/339 , H01L29/423 , H01L29/762 , H01L29/768
CPC分类号： G11C27/04 , G11C19/282 , H01L29/42396
摘要： The invention relates to a charge coupled device with a buried channel in which charge is detected by a MOST (MOS transistor) incorporated in the channel and having a surface channel of the conductivity type opposed to that of the charge coupled device. The source zone is situated in the centre of the CCD channel and is formed simultaneously with the channel bounding zone. The gate electrode comprises two portions situated on either side of the source zone, which portions, seen at the surface, do not overlap the source and drain zones. Below the gate electrode, a zone is formed of the same conductivity type as but with a higher doping than the CCD channel, which zone forms a charge storage region for the charge packet to be read out during the reading-out process. The source and drain zones are connected to the MOST channel region by means of extensions. The detector can be manufactured in a self-aligned manner, has a high charge storage capacity, a good noise behaviour, and a high speed.
摘要翻译：本发明涉及具有埋入通道的电荷耦合器件，其中电荷由并入通道中的MOST（MOS晶体管）检测，并具有与电荷耦合器件相反的导电类型的表面沟道。源区位于CCD通道的中心，与通道边界区同时形成。栅电极包括位于源极区两侧的两个部分，在表面看到的部分不与源区和漏区重叠。在栅极电极下面，与CCD通道相比，具有相同导电类型的掺杂区域，该区域形成用于在读出过程期间读出的电荷分组的电荷存储区域。源区和漏区通过扩展连接到MOST通道区。检测器可以以自对准方式制造，具有高电荷存储容量，良好的噪声特性和高速度。

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