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31. 发明申请

US20080197340A1 MULTIPLE-WAVELENGTH OPTO-ELECTRONIC DEVICE INCLUDING A SUPERLATTICE 有权
标题翻译：多波长光电设备，包括超声波
公开(公告)号：US20080197340A1
公开(公告)日：2008-08-21
申请号：US11675833
申请日：2007-02-16
申请人： Robert J. Mears , Robert John Stephenson , Marek Hytha , Ilija Dukovski , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Xiangyang Huang
发明人： Robert J. Mears , Robert John Stephenson , Marek Hytha , Ilija Dukovski , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Xiangyang Huang
IPC分类号： H01L31/00 , H01L33/00
CPC分类号： H01L31/035236 , B82Y20/00 , H01L29/15 , H01L31/076 , H01L33/06 , H01L33/08 , H01L33/28 , H01S5/3072 , Y02E10/548
摘要： A multiple-wavelength opto-electronic device may include a substrate and a plurality of active optical devices carried by the substrate and operating at different respective wavelengths. Each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.
摘要翻译：多波长光电器件可以包括衬底和由衬底承载并在不同的相应波长下操作的多个有源光学器件。每个光学器件可以包括超晶格，其包括多个堆叠的层组，并且每组层可以包括限定基极半导体部分和其上的至少一个非半导体单层的多个堆叠的半导体单层。

32. 发明授权

US07288457B2 Method for making semiconductor device comprising a superlattice with upper portions extending above adjacent upper portions of source and drain regions 有权
标题翻译：一种用于制造半导体器件的方法，该半导体器件包括超晶格，上部部分在源极和漏极区域的相邻上部之上延伸
公开(公告)号：US07288457B2
公开(公告)日：2007-10-30
申请号：US10940594
申请日：2004-09-14
申请人： Scott A. Kreps
发明人： Scott A. Kreps
IPC分类号： H01L21/336
CPC分类号： H01L29/1054 , H01L21/823807 , H01L29/155 , H01L29/7833
摘要： A method for making a semiconductor device may include providing a semiconductor substrate and forming at least one MOSFET by forming spaced apart source and drain regions and a superlattice on the substrate so that the superlattice is between the source and drain regions. The superlattice may include a plurality of stacked groups of layers. The superlattice may have upper portions extending above adjacent upper portions of the source and drain regions, and lower portions contacting the source and drain regions so that a channel is defined in lower portions of the superlattice. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor. The method may further include forming a gate overlying the superlattice.
摘要翻译：制造半导体器件的方法可以包括提供半导体衬底并且通过在衬底上形成间隔开的源极和漏极区域和超晶格来形成至少一个MOSFET，使得超晶格位于源极和漏极区域之间。超晶格可以包括多个堆叠的层组。超晶格可以具有在源极和漏极区域的相邻上部之上延伸的上部，以及接触源极和漏极区域的下部，使得在超晶格的下部限定沟道。超晶格的每组层可以包括在其上限定基极半导体部分和能带改性层的多个堆叠的基底半导体单层。能带修改层可以包括约束在相邻基极半导体的晶格内的至少一个非半导体单层。该方法还可以包括形成覆盖超晶格的栅极。

33. 发明申请

US20070238274A1 METHODS OF MAKING SPINTRONIC DEVICES WITH CONSTRAINED SPINTRONIC DOPANT 有权
标题翻译：制造具有约束的旋转体的旋转装置的方法
公开(公告)号：US20070238274A1
公开(公告)日：2007-10-11
申请号：US11687430
申请日：2007-03-16
申请人： Xiangyang HUANG , Samed HALILOV , Jean Chan Sow Fook YIPTONG , Ilija DUKOVSKI , Marek HYTHA , Robert MEARS
发明人： Xiangyang HUANG , Samed HALILOV , Jean Chan Sow Fook YIPTONG , Ilija DUKOVSKI , Marek HYTHA , Robert MEARS
IPC分类号： H01L21/22
CPC分类号： B82Y10/00 , B82Y25/00 , B82Y40/00 , H01F1/401 , H01F1/405 , H01F10/3213 , H01F10/3268 , H01F41/301 , H01L29/1054 , H01L29/15 , H01L29/66984
摘要： A method is for making a spintronic device and may include forming at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. The spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. In some embodiments, the repeating structure of a superlattice may not be needed.
摘要翻译：一种制造自旋电子器件的方法可包括形成至少一个超晶格和至少一个耦合到其上的电触点，所述至少一个超晶格包括多组层。每组层可以包括多个层叠的基底半导体单层，其限定具有晶格的基底半导体部分，约束在相邻的基底半导体部分的晶格内的至少一个非半导体单层，以及自旋电子掺杂剂。所述自旋电子掺杂剂可以通过所述至少一个非半导体单层约束在所述基底半导体部分的晶格内。在一些实施例中，可能不需要超晶格的重复结构。

34. 发明申请

US20070161138A1 METHOD FOR MAKING AN ELECTRONIC DEVICE INCLUDING A POLED SUPERLATTICE HAVING A NET ELECTRICAL DIPOLE MOMENT 有权
标题翻译：用于制造电子设备的方法，包括具有网络电动机的波形超声波
公开(公告)号：US20070161138A1
公开(公告)日：2007-07-12
申请号：US11614513
申请日：2006-12-21
申请人： Samed Halilov , Xiangyang Huang , Ilija Dukovski , Jean Augustin Yiptong , Robert Mears , Marek Hytha , Robert Stephenson
发明人： Samed Halilov , Xiangyang Huang , Ilija Dukovski , Jean Augustin Yiptong , Robert Mears , Marek Hytha , Robert Stephenson
IPC分类号： H01L21/00
CPC分类号： B82Y10/00 , H01L21/28291 , H01L29/151 , H01L29/78391 , H01L41/183 , H01L41/314
摘要： A method for making an electronic device may include forming a poled superlattice comprising a plurality of stacked groups of layers and having a net electrical dipole moment. Each group of layers of the poled superlattice may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include coupling at least one electrode to the poled superlattice.
摘要翻译：制造电子设备的方法可以包括形成包括多个堆叠的层组并且具有净电偶极矩的极化超晶格。极化超晶格的每组层可以包括限定基极半导体部分和其上的至少一个非半导体单层的多个堆叠的半导体单层。至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内，并且来自相对的基极半导体部分的至少一些半导体原子可以通过其间的至少一个非半导体单层化学地结合在一起。该方法还可以包括将至少一个电极耦合到极化的超晶格。

35. 发明申请

US20070012910A1 Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer 审中-公开
标题翻译：包括具有非半导体层单层的通道的半导体器件
公开(公告)号：US20070012910A1
公开(公告)日：2007-01-18
申请号：US11457299
申请日：2006-07-13
申请人： Robert Mears , Marek Hytha , Scott Kreps
发明人： Robert Mears , Marek Hytha , Scott Kreps
IPC分类号： H01L29/06
CPC分类号： H01L29/152 , H01L29/1054 , H01L29/78
摘要： A semiconductor device may include a semiconductor substrate, and at least one metal oxide semiconductor field-effect transistor (MOSFET) thereon. The MOSFET may include spaced-apart source and drain regions, a channel between the source and drain regions, and a gate overlying the channel defining an interface therewith. The gate may include a gate dielectric overlying the channel and a gate electrode overlying the gate dielectric. The channel may include a plurality of stacked base semiconductor monolayers, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor monolayers. The at least one non-semiconductor monolayer may be positioned at depth of about 4-100 monolayers relative to the interface between the channel and the gate dielectric.
摘要翻译：半导体器件可以包括半导体衬底和至少一个金属氧化物半导体场效应晶体管（MOSFET）。 MOSFET可以包括间隔开的源极和漏极区域，源极和漏极区域之间的沟道，以及覆盖通道的栅极，其限定与其的界面。栅极可以包括覆盖沟道的栅极电介质和覆盖栅极电介质的栅电极。通道可以包括多个层叠的基底半导体单层，以及约束在相邻的基底半导体单层的晶格内的至少一个非半导体单层。至少一个非半导体单层可以相对于沟道和栅极电介质之间的界面位于约4-100个单层的深度处。

36. 发明申请

US20060292765A1 Method for Making a FINFET Including a Superlattice 审中-公开
标题翻译：制造包含超晶格的FINFET的方法
公开(公告)号：US20060292765A1
公开(公告)日：2006-12-28
申请号：US11426976
申请日：2006-06-28
申请人： Richard Blanchard , Kalipatnam Rao , Scott Kreps
发明人： Richard Blanchard , Kalipatnam Rao , Scott Kreps
IPC分类号： H01L21/84 , H01L21/336
CPC分类号： H01L29/1054 , B82Y10/00 , H01L21/823807 , H01L29/1083 , H01L29/151 , H01L29/152 , H01L29/155 , H01L29/66795 , H01L29/7833 , H01L29/785
摘要： A method for making a semiconductor device may include forming at least one fin field-effect transistor (FINFET) comprising a fin, source and drain regions adjacent opposite sides of the fin, and a gate overlying the fin. The fin may include at least one superlattice including a plurality of stacked groups of layers Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
摘要翻译：制造半导体器件的方法可以包括形成至少一个鳍状场效应晶体管（FINFET），其包括与鳍片相对的两侧相邻的翅片，源极和漏极区域以及覆盖鳍片的栅极。翅片可以包括至少一个超晶格，其包括多个层叠的层组。每组层可以包括限定基极半导体部分的多个堆叠的基底半导体单层，以及约束在相邻的晶体的晶格内的至少一个非半导体单层基极半导体部分。

37. 发明申请

US20060261327A1 SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR-ON-INSULATOR CONFIGURATION AND A SUPERLATTICE 有权
标题翻译：具有半导体绝缘体构造和超导体的半导体器件
公开(公告)号：US20060261327A1
公开(公告)日：2006-11-23
申请号：US11381835
申请日：2006-05-05
申请人： Scott Kreps , Kalipatnam Rao
发明人： Scott Kreps , Kalipatnam Rao
IPC分类号： H01L29/06
CPC分类号： H01L21/28273 , H01L29/1054 , H01L29/155 , H01L29/665 , H01L29/66636 , H01L29/66825 , H01L29/78696 , H01L29/7881
摘要： A semiconductor device may include a substrate, an insulating layer adjacent the substrate, and a semiconductor layer adjacent a face of the insulating layer opposite the substrate. The device may further include source and drain regions on the semiconductor layer, a superlattice adjacent the semiconductor layer and extending between the source and drain regions to define a channel, and a gate overlying the superlattice. The superlattice may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy band-modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
摘要翻译：半导体器件可以包括衬底，与衬底相邻的绝缘层，以及邻近与衬底相对的绝缘层的表面的半导体层。器件还可以包括半导体层上的源极和漏极区域，邻近半导体层并且在源极和漏极区域之间延伸以限定沟道的超晶格和覆盖超晶格的栅极。超晶格可以包括多个堆叠的层组，其中每组层包括限定基底半导体部分和其上的能带修饰层的多个层叠的基底半导体单层。能带修饰层可以包括约束在相邻的基底半导体部分的晶格内的至少一个非半导体单层。

38. 发明授权

US07071119B2 Method for making a semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure 有权
标题翻译：制造半导体器件的方法，包括具有3 / 1-5 / 1锗层结构的带状工程超晶格
公开(公告)号：US07071119B2
公开(公告)日：2006-07-04
申请号：US10992422
申请日：2004-11-18
申请人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
发明人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
IPC分类号： H01L31/109
CPC分类号： H01L29/152 , B82Y10/00 , H01L21/823807 , H01L29/1054 , H01L29/155 , H01L29/7833
摘要： A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.
摘要翻译：半导体器件包括超晶格，其又包括多个堆叠的层组。该装置还可以包括用于使载流子相对于堆叠的层组在平行方向上通过超晶格的运送的区域。每个超晶格组可以包括限定基极半导体部分和其上的能带修饰层的多个层叠的基底半导体单层。此外，能带修改层可以包括约束在相邻的基底半导体部分的晶格内的至少一个非半导体单层。因此，超晶格可以在平行方向上具有比否则将存在的更高的载流子迁移率。

39. 发明授权

US07033437B2 Method for making semiconductor device including band-engineered superlattice 有权
标题翻译：制造半导体器件的方法，包括带状工程超晶格
公开(公告)号：US07033437B2
公开(公告)日：2006-04-25
申请号：US10717370
申请日：2003-11-19
申请人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
发明人： Robert J. Mears , Jean Augustin Chan Sow Fook Yiptong , Marek Hytha , Scott A. Kreps , Ilija Dukovski
IPC分类号： C30B25/02
CPC分类号： H01L29/155 , H01L21/823807 , H01L29/1054 , H01L29/7833
摘要： A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.
摘要翻译：一种通过形成超晶格来制造半导体器件的方法，该超晶格又包括多个堆叠的层组。该方法还可以包括形成区域，用于使电荷载体相对于层叠的层组在平行方向上通过超晶格。每个超晶格组可以包括限定基极半导体部分和其上的能带修饰层的多个层叠的基底半导体单层。能带修改层可以包括限制在相邻基极半导体部分的晶格内的至少一个非半导体单层，使得超晶格可以在平行方向上具有比否则发生的更高的载流子迁移率。超晶格也可以具有共同的能带结构。

40. 发明授权

US07018900B2 Method for making a semiconductor device comprising a superlattice channel vertically stepped above source and drain regions 有权
标题翻译：一种用于制造半导体器件的方法，该半导体器件包括在源极和漏极区域之上垂直阶梯形的超晶格沟道
公开(公告)号：US07018900B2
公开(公告)日：2006-03-28
申请号：US10940418
申请日：2004-09-14
申请人： Scott A. Kreps
发明人： Scott A. Kreps
IPC分类号： H01L29/80 , H01L31/112
CPC分类号： H01L29/1054 , H01L21/823807 , H01L29/155 , H01L29/7833
摘要： A method for making a semiconductor device may include providing a semiconductor substrate and forming at least one metal oxide semiconductor field-effect transistor (MOSFET). The at least one MOSFET may be formed by forming a superlattice channel including a plurality of stacked groups of layers on the semiconductor substrate. Each group of layers of the superlattice channel may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor. The method may further include forming a gate overlying the superlattice channel, and forming source and drain regions in the semiconductor substrate on opposing sides of the superlattice channel so that the superlattice channel has upper surface portions vertically stepped above adjacent upper surface portions of the source and drain regions.
摘要翻译：制造半导体器件的方法可以包括提供半导体衬底并形成至少一个金属氧化物半导体场效应晶体管（MOSFET）。可以通过在半导体衬底上形成包括多个层叠层的超晶格沟道来形成至少一个MOSFET。超晶格通道的每组层可以包括在其上限定基极半导体部分和能带修饰层的多个层叠的基底半导体单层。能带修改层可以包括约束在相邻基极半导体的晶格内的至少一个非半导体单层。该方法还可以包括形成覆盖超晶格沟道的栅极，以及在超晶格沟道的相对侧上的半导体衬底中形成源极和漏极区域，使得超晶格沟道具有在源极的相邻上表面部分上方的上表面部分，漏区。

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