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31. 发明授权

US07482668B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07482668B2
公开(公告)日：2009-01-27
申请号：US11829087
申请日：2007-07-27
申请人： Chao-Ching Hsieh , Chun-Chieh Chang , Tzung-Yu Hung
发明人： Chao-Ching Hsieh , Chun-Chieh Chang , Tzung-Yu Hung
IPC分类号： H01L31/07
CPC分类号： H01L29/7833 , H01L21/823807 , H01L21/823864 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7843
摘要： A semiconductor device is provided. A transistor is formed on a substrate, and a metal silicide layer is formed on the surface of a gate conductor layer and a source/drain region. Next, a surface treatment process is performed to selectively form a protection layer on the surface of the metal silicide layer. Then, a spacer of the transistor is partially removed using the protection layer as a mask, so as to reduce the width of the spacer. Then, a stress layer is formed on the substrate.
摘要翻译：提供一种半导体器件。在基板上形成晶体管，在栅极导体层和源极/漏极区域的表面上形成金属硅化物层。接下来，进行表面处理工艺以在金属硅化物层的表面上选择性地形成保护层。然后，使用保护层作为掩模来部分地去除晶体管的间隔物，以便减小间隔物的宽度。然后，在基板上形成应力层。

32. 发明申请

US20080076213A1 METHOD OF FABRICATING A SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20080076213A1
公开(公告)日：2008-03-27
申请号：US11309740
申请日：2006-09-21
申请人： Chao-Ching Hsieh , Chun-Chieh Chang , Tzung-Yu Hung
发明人： Chao-Ching Hsieh , Chun-Chieh Chang , Tzung-Yu Hung
IPC分类号： H01L21/8234
CPC分类号： H01L29/7833 , H01L21/823807 , H01L21/823864 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7843
摘要： A method of fabricating semiconductor device is provided. A transistor is formed on a substrate, and a metal suicide layer is formed on the surface of a gate conductor layer and a source/drain region. Next, a surface treatment process is performed to selectively form a protection layer on the surface of the metal silicide layer. Then, a spacer of the transistor is partially removed using the protection layer as a mask, so as to reduce the width of the spacer. Then, a stress layer is formed on the substrate.
摘要翻译：提供一种制造半导体器件的方法。在基板上形成晶体管，在栅极导体层和源极/漏极区域的表面上形成金属硅化物层。接下来，进行表面处理工艺以在金属硅化物层的表面上选择性地形成保护层。然后，使用保护层作为掩模来部分地去除晶体管的间隔物，以便减小间隔物的宽度。然后，在基板上形成应力层。

33. 发明申请

US20080073727A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20080073727A1
公开(公告)日：2008-03-27
申请号：US11829087
申请日：2007-07-27
申请人： Chao-Ching Hsieh , Chun-Chieh Chang , Tzung-Yu Hung
发明人： Chao-Ching Hsieh , Chun-Chieh Chang , Tzung-Yu Hung
IPC分类号： H01L29/78
CPC分类号： H01L29/7833 , H01L21/823807 , H01L21/823864 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7843
摘要： A semiconductor device is provided. A transistor is formed on a substrate, and a metal silicide layer is formed on the surface of a gate conductor layer and a source/drain region. Next, a surface treatment process is performed to selectively form a protection layer on the surface of the metal silicide layer. Then, a spacer of the transistor is partially removed using the protection layer as a mask, so as to reduce the width of the spacer. Then, a stress layer is formed on the substrate.
摘要翻译：提供半导体器件。在基板上形成晶体管，在栅极导体层和源极/漏极区域的表面上形成金属硅化物层。接下来，进行表面处理工艺以在金属硅化物层的表面上选择性地形成保护层。然后，使用保护层作为掩模来部分地去除晶体管的间隔物，以便减小间隔物的宽度。然后，在基板上形成应力层。

34. 发明授权

US07670438B2 Method of removing particles from wafer 有权
标题翻译：从晶片去除颗粒的方法
公开(公告)号：US07670438B2
公开(公告)日：2010-03-02
申请号：US11866746
申请日：2007-10-03
申请人： Yi-Wei Chen , Bao-Tzeng Huang , An-Chi Liu , Chao-Ching Hsieh , Nien-Ting Ho , Kuo-Chih Lai
发明人： Yi-Wei Chen , Bao-Tzeng Huang , An-Chi Liu , Chao-Ching Hsieh , Nien-Ting Ho , Kuo-Chih Lai
IPC分类号： B08B3/04
CPC分类号： B08B3/08 , H01L21/02068 , H01L21/67051
摘要： A method of removing particles from a wafer is provided. The method is adopted after a process for removing unreactive metal of a salicide process or after a salicide process and having oxide residue remaining on a wafer or after a chemical vapor deposition (CVD) process that resulted with particles on a wafer. The method includes performing at least two cycles (stages) of intermediate rinse process. Each cycle of the intermediate rinse process includes conducting a procedure of rotating the wafer at a high speed first, and then conducting a procedure of rotating the wafer at a low speed.
摘要翻译：提供了从晶片去除颗粒的方法。在除去自对准硅化物工艺的非反应性金属或自对准硅化物工艺之后并且在晶片上残留氧化物残余物或在晶片上产生颗粒的化学气相沉积（CVD）工艺之后，采用该方法。该方法包括进行中间漂洗过程的至少两个循环（阶段）。中间漂洗过程的每个循环包括首先进行高速旋转晶片的步骤，然后进行以低速旋转晶片的步骤。

35. 发明申请

US20090090395A1 METHOD OF REMOVING PARTICLES FROM WAFER 有权
标题翻译：从颗粒中去除颗粒的方法
公开(公告)号：US20090090395A1
公开(公告)日：2009-04-09
申请号：US11866746
申请日：2007-10-03
申请人： Yi-Wei Chen , Bao-Tzeng Huang , An-Chi Liu , Chao-Ching Hsieh , Nien-Ting Ho , Kuo-Chih Lai
发明人： Yi-Wei Chen , Bao-Tzeng Huang , An-Chi Liu , Chao-Ching Hsieh , Nien-Ting Ho , Kuo-Chih Lai
IPC分类号： B08B3/04
CPC分类号： B08B3/08 , H01L21/02068 , H01L21/67051
摘要： A method of removing particles from a wafer is provided. The method is adopted after a process for removing unreactive metal of a salicide process or after a salicide process and having oxide residue remaining on a wafer or after a chemical vapor deposition (CVD) process that resulted with particles on a wafer. The method includes performing at least two cycles (stages) of intermediate rinse process. Each cycle of the intermediate rinse process includes conducting a procedure of rotating the wafer at a high speed first, and then conducting a procedure of rotating the wafer at a low speed.
摘要翻译：提供了从晶片去除颗粒的方法。在除去自对准硅化物工艺的非反应性金属或自对准硅化物工艺之后并且在晶片上残留氧化物残余物或在晶片上产生颗粒的化学气相沉积（CVD）工艺之后，采用该方法。该方法包括进行中间漂洗过程的至少两个循环（阶段）。中间漂洗过程的每个循环包括首先进行高速旋转晶片的步骤，然后进行以低速旋转晶片的步骤。

36. 发明申请

US20110104895A1 METHOD FOR FORMING A PLUG STRUCTURE 有权
标题翻译：形成插管结构的方法
公开(公告)号：US20110104895A1
公开(公告)日：2011-05-05
申请号：US13006358
申请日：2011-01-13
申请人： Chao-Ching Hsieh
发明人： Chao-Ching Hsieh
IPC分类号： H01L21/768
CPC分类号： H01L21/76814 , H01L21/76844 , H01L21/76877
摘要： A method for forming a plug structure includes the following steps. A substrate is provided. The substrate includes a MOS device with a source/drain region, a dielectric layer disposed on the MOS device, an opening defined in the dielectric layer, and a first glue layer disposed on a sidewall and a bottom of the opening. A portion of the first glue layer disposed at the bottom of the opening is punched through to expose the source/drain region. A barrier layer is formed over the substrate after the first glue layer is punched through. The opening is filled with a conductive structure, wherein the barrier layer disposed at the bottom of the opening is remained when the conductive structure is filled into the opening.
摘要翻译：形成插塞结构的方法包括以下步骤。提供基板。衬底包括具有源极/漏极区域的MOS器件，设置在MOS器件上的电介质层，限定在电介质层中的开口，以及设置在开口的侧壁和底部上的第一胶合层。设置在开口底部的第一胶合层的一部分被穿孔以暴露源/漏区。在穿过第一胶层之后，在衬底上形成阻挡层。开口填充有导电结构，其中当导电结构填充到开口中时，设置在开口底部的阻挡层保留。

37. 发明申请

US20060240666A1 METHOD OF FORMING SILICIDE 审中-公开
标题翻译：形成硅酮的方法
公开(公告)号：US20060240666A1
公开(公告)日：2006-10-26
申请号：US10907891
申请日：2005-04-20
申请人： Chao-Ching Hsieh , Yi-Yiing Chiang , Chien-Chung Huang , Po-Chao Tsou , Kirk Hsu , Tony Lin , Le-Tien Jung
发明人： Chao-Ching Hsieh , Yi-Yiing Chiang , Chien-Chung Huang , Po-Chao Tsou , Kirk Hsu , Tony Lin , Le-Tien Jung
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/76889
摘要： A method of forming silicide is described. A layer of refractory metal is deposited on a substrate, and then a first annealing process is performed to form silicide, followed by removal of unreacted metal. Next, a species implanting process is carried out to implant species of neutral atoms into the silicide to break up lattice structure of the silicide, so that the problem of junction leakage induced by spiking and piping diffusion under high temperature during a subsequent second annealing process is avoided.
摘要翻译：描述了形成硅化物的方法。将难熔金属层沉积在基材上，然后进行第一退火工艺以形成硅化物，随后除去未反应的金属。接下来，进行物种植入工艺以将中性原子的种类植入到硅化物中以破坏硅化物的晶格结构，从而在随后的第二退火过程中由高温引起的尖峰和管道扩散引起的结漏电的问题是避免。

38. 发明授权

US08431487B2 Method for forming a plug structure 有权
标题翻译：形成插头结构的方法
公开(公告)号：US08431487B2
公开(公告)日：2013-04-30
申请号：US13006358
申请日：2011-01-13
申请人： Chao-Ching Hsieh
发明人： Chao-Ching Hsieh
IPC分类号： H01L21/44 , H01L21/4763
CPC分类号： H01L21/76814 , H01L21/76844 , H01L21/76877
摘要： A method for forming a plug structure includes the following steps. A substrate is provided. The substrate includes a MOS device with a source/drain region, a dielectric layer disposed on the MOS device, an opening defined in the dielectric layer, and a first glue layer disposed on a sidewall and a bottom of the opening. A portion of the first glue layer disposed at the bottom of the opening is punched through to expose the source/drain region. A barrier layer is formed over the substrate after the first glue layer is punched through. The opening is filled with a conductive structure, wherein the barrier layer disposed at the bottom of the opening is remained when the conductive structure is filled into the opening.
摘要翻译：形成插塞结构的方法包括以下步骤。提供基板。衬底包括具有源极/漏极区域的MOS器件，设置在MOS器件上的电介质层，限定在电介质层中的开口，以及设置在开口的侧壁和底部上的第一胶合层。设置在开口底部的第一胶合层的一部分被穿孔以暴露源/漏区。在穿过第一胶层之后，在衬底上形成阻挡层。开口填充有导电结构，其中当导电结构填充到开口中时，设置在开口底部的阻挡层保留。

39. 发明授权

US07951662B2 Method of fabricating strained silicon transistor 有权
标题翻译：制造应变硅晶体管的方法
公开(公告)号：US07951662B2
公开(公告)日：2011-05-31
申请号：US12176409
申请日：2008-07-20
申请人： Chao-Ching Hsieh
发明人： Chao-Ching Hsieh
IPC分类号： H01L21/8238
CPC分类号： H01L21/823807 , H01L21/324 , H01L29/6659 , H01L29/7833 , H01L29/7847
摘要： A method of fabricating a strained silicon transistor is provided. Amorphous silicon is formed below the transistor region before the transistor is formed. By using the tensile/compressive strainer, amorphous silicon is recrystallized to form a strained silicon layer. In addition, the dopants in the well can be driven in and activated by using the same annealing process with the amorphous silicon recrystallization.
摘要翻译：提供一种制造应变硅晶体管的方法。在形成晶体管之前，晶体管区域的下方形成无定形硅。通过使用拉伸/压缩过滤器，将非晶硅重结晶以形成应变硅层。此外，可以通过使用与非晶硅重结晶相同的退火工艺来驱动和激活阱中的掺杂剂。

40. 发明授权

US07915127B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07915127B2
公开(公告)日：2011-03-29
申请号：US12509623
申请日：2009-07-27
申请人： Chun-Hsien Lin , Chao-Ching Hsieh
发明人： Chun-Hsien Lin , Chao-Ching Hsieh
IPC分类号： H01L21/336
CPC分类号： H01L29/7843 , H01L29/4966 , H01L29/517 , H01L29/66545 , H01L29/66583 , H01L29/7833
摘要： A method of forming a semiconductor device is described. First, a substrate is provided. Thereafter, a gate structure including, from bottom to top, a high-k layer, a work function metal layer, a wetting layer, a polysilicon layer and a mask layer is formed on the substrate. Afterwards, a spacer is formed on the sidewall of the gate structure. Source/drain regions are then formed in the substrate beside the gate structure. Further, an interlayer dielectric layer is formed over the substrate. Thereafter, a portion of the interlayer dielectric layer is removed to expose the surface of the mask layer. Afterwards, the mask layer and the polysilicon layer are sequentially removed to expose the surface of the wetting layer. A selective chemical vapor deposition process is then performed, so as to bottom-up deposit a metal layer from the surface of the wetting layer.
摘要翻译：描述形成半导体器件的方法。首先，提供基板。此后，在基板上形成从底部到顶部包括高k层，功函数金属层，润湿层，多晶硅层和掩模层的栅极结构。之后，在栅极结构的侧壁上形成间隔物。然后在栅极结构旁边的衬底中形成源/漏区。此外，在衬底上形成层间电介质层。此后，去除部分层间电介质层以暴露掩模层的表面。然后，依次去除掩模层和多晶硅层以露出润湿层的表面。然后进行选择性化学气相沉积工艺，以便从底层向下从润湿层的表面沉积金属层。

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