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31. 发明授权

US07474290B2 Semiconductor device and testing method thereof 失效
标题翻译：半导体器件及其测试方法
公开(公告)号：US07474290B2
公开(公告)日：2009-01-06
申请号：US10981715
申请日：2004-11-05
申请人： Masami Makuuchi , Norio Chujo , Kengo Imagawa , Ritsuro Orihashi , Yoshitomo Arai
发明人： Masami Makuuchi , Norio Chujo , Kengo Imagawa , Ritsuro Orihashi , Yoshitomo Arai
IPC分类号： G09G3/36
CPC分类号： G09G3/006 , G09G3/3688
摘要： A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+ΔV) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.
摘要翻译：根据本发明的半导体器件具有液晶驱动电路，并且当其灰度电压被测试时，在其中提供的灰度级电压发生器电路中产生的灰度电压（Vx）与参考电压（例如，用于测试灰度电压而生成的Vx + DeltaV）和测试结果作为来自半导体器件的外部端子的二值化电压输出。即使在液晶驱动电路中较高的灰度级或半导体器件的输出端数量增加的情况下，也可以加快灰度电压测试。因此，可以减少测试所需的时间和成本。

32. 发明申请

US20080265944A1 Output Buffer Circuit and Differential Output Buffer Circuit, and Transmission Method 有权
标题翻译：输出缓冲电路和差分输出缓冲电路及传输方式
公开(公告)号：US20080265944A1
公开(公告)日：2008-10-30
申请号：US11686560
申请日：2007-03-15
申请人： SATOSHI MURAOKA , Norio Chujo , Ritsuro Orihashi
发明人： SATOSHI MURAOKA , Norio Chujo , Ritsuro Orihashi
IPC分类号： H03K19/0185 , H03K19/0175
CPC分类号： H03K19/018521
摘要： In an output buffer circuit including Inverter 1 to Inverter 3, Delay Circuit 1 to Delay Circuit 3 for delaying an input signal for a specific time, Buffer 1 to Buffer 3, and a function for transmitting a logic signal to a transmission path and in accordance with an amount of signal attenuation in the transmission path, creating at a transmission side a waveform including four or more kinds of signal voltages, the preemphasis amount is made variable and the ON resistance Rs of the buffer is made constant. Selector circuit 1 to Selector circuit 3 are situated before the buffers, the inverter, capable of selecting through selector logic a signal to be inputted to the buffer, inverts a data signal, and the preemphasis amount and the number of preemphasis taps are adjusted through a selection signal for the selector logic.
摘要翻译：在包括变频器1至变频器3的输出缓冲电路中，延迟电路1至延迟电路3用于将输入信号延迟特定时间，缓冲器1至缓冲器3，以及用于将逻辑信号发送到传输路径的功能在传输路径中具有一定量的信号衰减，在发送侧产生包括四种或更多种信号电压的波形，使预加重量变为可变，并使缓冲器的导通电阻Rs保持恒定。选择器电路1至选择器电路3位于缓冲器之前，反相器能够通过选择器逻辑选择要输入到缓冲器的信号，反转数据信号，并且预加重量和预加重数量通过一个选择器逻辑的选择信号。

33. 发明授权

US07443373B2 Semiconductor device and the method of testing the same 有权
标题翻译：半导体器件及其测试方法相同
公开(公告)号：US07443373B2
公开(公告)日：2008-10-28
申请号：US11002143
申请日：2004-12-03
申请人： Kengo Imagawa , Masami Makuuchi , Norio Chujo , Ritsuro Orihashi , Yoshitomo Arai
发明人： Kengo Imagawa , Masami Makuuchi , Norio Chujo , Ritsuro Orihashi , Yoshitomo Arai
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/006 , G09G2310/0289
摘要： A problem, which one of the inventions included in the present application solves, is to provide a semiconductor device that can simultaneously test a plurality of output pins by less channels of a semiconductor test equipment in number than the integrated output pins of the semiconductor device. Representative one of the inventions has such a configuration that an LCD driver, which is the semiconductor device having a function of driving a gate line of a liquid crystal display panel, comprises: an exclusive-OR circuit for inverting polarities of positive and negative voltages for driving the gate line; a tri-state type inverter circuit capable of changing and controlling, to a high-impedance state, an output circuit for driving the gate line; and at least one of test control terminals TEST for controlling the exclusive-OR circuit and the tri-state type inverter circuit. When a test is conducted, only one terminal of the gate output outputs a positive voltage VGH or negative voltage VGL and the other terminal is set to a high-impedance state, whereby the plurality of gate outputs are simultaneously tested.
摘要翻译：包括在本申请中的发明中的一个解决的问题是提供一种半导体器件，其可以通过半导体测试设备的数量少于半导体器件的集成输出引脚的较少通道同时测试多个输出引脚。代表性的发明之一具有这样的结构，即作为具有驱动液晶显示面板的栅极线的功能的半导体器件的LCD驱动器包括：用于将正和负电压的极性反转的异或电路，驾驶门线; 能够改变和控制高阻抗状态的用于驱动栅极线的输出电路的三态逆变器电路; 以及用于控制异或电路和三态逆变器电路的测试控制端子TEST中的至少一个。当进行测试时，仅栅极输出的一个端子输出正电压VGH或负电压VGL，另一个端子被设置为高阻抗状态，从而同时测试多个栅极输出。

34. 发明申请

US20080056336A1 Transmitter and receiver using forward clock overlaying link information 有权
标题翻译：发射机和接收机使用正向时钟叠加链路信息
公开(公告)号：US20080056336A1
公开(公告)日：2008-03-06
申请号：US11826300
申请日：2007-07-13
申请人： Hidehiro Toyoda , Tatsuya Saito , Hiroki Yamashita , Norio Chujo
发明人： Hidehiro Toyoda , Tatsuya Saito , Hiroki Yamashita , Norio Chujo
IPC分类号： H04B1/38
CPC分类号： H04L7/0337
摘要： A transmitting and receiving technique in which a load on data signal lines is reduced while maintaining a communication quality, thereby making it possible to improve the throughput of data channels. In a transceiver, a transmitter side has an encoder circuit that transmits a bit sequence obtained by encoding link information to a clock signal line, and a receiver side has a clock and data recovery circuit 17 that extracts a clock component from a signal received from the clock signal line, a decoder circuit 19 that decodes the extracted signal to reproduce the link information, and a bit deskew circuit 21 that adjusts a skew that is lower than one bit on the basis of a clock component.
摘要翻译：一种在保持通信质量的同时减少数据信号线上的负载的发送和接收技术，从而可以提高数据信道的吞吐量。在收发机中，发射机侧具有将通过对链路信息进行编码而获得的比特序列发送到时钟信号线的编码器电路，并且接收机侧具有时钟和数据恢复电路17，时钟和数据恢复电路17从从时钟信号线，对所提取的信号进行解码以再现链接信息的解码器电路19以及基于时钟分量来调整低于1比特的歪斜的位歪斜电路21。

35. 发明申请

US20050122297A1 Semiconductor device and the method of testing the same 有权
标题翻译：半导体器件及其测试方法相同
公开(公告)号：US20050122297A1
公开(公告)日：2005-06-09
申请号：US11002143
申请日：2004-12-03
申请人： Kengo Imagawa , Masami Makuuchi , Norio Chujo , Ritsuro Orihashi , Yoshitomo Arai
发明人： Kengo Imagawa , Masami Makuuchi , Norio Chujo , Ritsuro Orihashi , Yoshitomo Arai
IPC分类号： G01R31/28 , G02F1/1345 , G09G3/00 , G09G3/20 , G09G3/36
CPC分类号： G09G3/3677 , G09G3/006 , G09G2310/0289
摘要： A problem, which one of the inventions included in the present application solves, is to provide a semiconductor device that can simultaneously test a plurality of output pins by less channels of a semiconductor test equipment in number than the integrated output pins of the semiconductor device. Representative one of the inventions has such a configuration that an LCD driver, which is the semiconductor device having a function of driving a gate line of a liquid crystal display panel, comprises: an exclusive-OR circuit for inverting polarities of positive and negative voltages for driving the gate line; a tri-state type inverter circuit capable of changing and controlling, to a high-impedance state, an output circuit for driving the gate line; and at least one of test control terminals TEST for controlling the exclusive-OR circuit and the tri-state type inverter circuit. When a test is conducted, only one terminal of the gate output outputs a positive voltage VGH or negative voltage VGL and the other terminal is set to a high-impedance state, whereby the plurality of gate outputs are simultaneously tested.
摘要翻译：包括在本申请中的发明中的一个解决的问题是提供一种半导体器件，其可以通过半导体测试设备的数量少于半导体器件的集成输出引脚的较少通道同时测试多个输出引脚。代表性的发明之一具有这样的结构，即作为具有驱动液晶显示面板的栅极线的功能的半导体器件的LCD驱动器包括：用于将正和负电压的极性反转的异或电路，驾驶门线; 能够改变和控制高阻抗状态的用于驱动栅极线的输出电路的三态逆变器电路; 以及用于控制异或电路和三态逆变器电路的测试控制端子TEST中的至少一个。当进行测试时，仅栅极输出的一个端子输出正电压VGH或负电压VGL，另一个端子被设置为高阻抗状态，从而同时测试多个栅极输出。

36. 发明授权

US06894489B2 TESTING APPARATUS FOR CONDUCTING A TEST ON A MAGNETIC RECORDING MEDIUM OR A MAGNETIC HEAD, THROUGH RECORDING TEST DATA ON THE MAGNETIC RECORDING MEDIUM AND REPRODUCING RECORDED TEST DATA THEREFROM BY MEANS OF THE MAGNETIC HEAD 失效
标题翻译：用于对磁记录介质或磁头进行测试的测试装置，通过磁记录介质上的记录测试数据，并通过磁头重现记录的测试数据
公开(公告)号：US06894489B2
公开(公告)日：2005-05-17
申请号：US10735909
申请日：2003-12-16
申请人： Masami Makuuchi , Ritsurou Orihashi , Norio Chujo , Masayoshi Takahashi , Yoshihiko Hayashi , Shinji Homma
发明人： Masami Makuuchi , Ritsurou Orihashi , Norio Chujo , Masayoshi Takahashi , Yoshihiko Hayashi , Shinji Homma
IPC分类号： G01R33/12 , G11B5/00 , G11B5/012 , G11B5/455 , G11B20/10 , G11B20/18 , G11B27/36
CPC分类号： G01R33/1207 , G11B5/00 , G11B5/012 , G11B5/455 , G11B20/10009 , G11B27/36 , G11B2005/001 , G11B2220/20
摘要： A testing apparatus of a magnetic recording medium for conducting a test on the magnetic recording medium by using reproduced data obtained through reproduction of the magnetic medium, including a plurality of conversion means for converting the reproduced data into digital data, holding means for holding the digital data converted by the plurality of conversion means, data processing means for performing a calculation process on the digital data held by the holding means in relation to a magnetic characteristic of the magnetic recording medium, and analysis processing means for performing an analysis to determine whether or not information obtained by the data processing means satisfies a certain condition.
摘要翻译：一种用于通过使用通过再现磁介质获得的再现数据在磁记录介质上进行测试的磁记录介质的测试装置，包括用于将再现数据转换为数字数据的多个转换装置，用于保持数字由多个转换装置转换的数据，用于对由保持装置保持的数字数据相对于磁记录介质的磁特性执行计算处理的数据处理装置;以及分析处理装置，用于执行分析以确定是否或不是由数据处理装置获得的信息不满足一定条件。

37. 发明授权

US06829441B2 Driver circuit and optical-transmission module 失效
标题翻译：驱动电路和光传输模块
公开(公告)号：US06829441B2
公开(公告)日：2004-12-07
申请号：US10455411
申请日：2003-06-06
申请人： Norio Chujo , Yoshihiko Hayashi , Akio Osaki , Naohiko Baba
发明人： Norio Chujo , Yoshihiko Hayashi , Akio Osaki , Naohiko Baba
IPC分类号： H04B1004
CPC分类号： H04L25/0282 , H04B10/504 , H04B10/564
摘要： A driver circuit comprises a first differential-amplifier circuit having a pair of first transistors with emitters thereof connected to each other and a first resistor provided between an emitter connection point of the first transistors and a first power supply. Different electric potentials are applied to the bases of the pair of the first transistors to set a ratio of a current flowing through one of the pair of the first transistors to a current flowing through the other first transistor at about 1/100 or smaller. An amplitude of an output current is controlled by the higher of the electric potentials applied to the base of one of the first transistors.
摘要翻译：驱动器电路包括具有一对第一晶体管的第一差分放大器电路，其中发射极彼此连接，第一电阻器设置在第一晶体管的发射极连接点与第一电源之间。不同的电位被施加到一对第一晶体管的基极，以将流过一对第一晶体管中的电流的电流与流过另一个第一晶体管的电流的比率约为1/100或更小。输出电流的幅度由施加到第一晶体管之一的基极的较高电位来控制。

38. 发明授权

US06606177B1 Driver circuit and optical-transmission module 失效
公开(公告)号：US06606177B1
公开(公告)日：2003-08-12
申请号：US09392566
申请日：1999-09-09
申请人： Norio Chujo , Yoshihiko Hayashi , Akio Osaki , Naohiko Baba
发明人： Norio Chujo , Yoshihiko Hayashi , Akio Osaki , Naohiko Baba
IPC分类号： H04B1004
CPC分类号： H04L25/0282 , H04B10/504 , H04B10/564
摘要： A driver circuit comprises a first differential-amplifier circuit having a pair of first transistors with emitters thereof connected to each other and a first resistor provided between an emitter connection point of the first transistors and a first power supply. Different electric potentials are applied to the bases of the pair of the first transistors to set a ratio of a current flowing through one of the pair of the first transistors to a current flowing through the other first transistor at about {fraction (1/100)} or smaller. An amplitude of an output current is controlled by the higher of the electric potentials applied to the base of one of the first transistors.

39. 发明授权

US06229832B1 Optical wavelength stability control apparatus, optical transmitter and multiple wavelength transmitter 有权
标题翻译：光波长稳定控制装置，光发射机和多波长发射机
公开(公告)号：US06229832B1
公开(公告)日：2001-05-08
申请号：US09188364
申请日：1998-11-10
申请人： Naohiko Baba , Hideyuki Serizawa , Akihiro Hayami , Tadashi Hatano , Yasuhiro Yamada , Norio Chujo
发明人： Naohiko Baba , Hideyuki Serizawa , Akihiro Hayami , Tadashi Hatano , Yasuhiro Yamada , Norio Chujo
IPC分类号： H01S300
CPC分类号： H01S5/06808 , H01S5/0035 , H01S5/02415 , H01S5/0612 , H01S5/0687
摘要： An optical transmitter includes a plurality of optical wavelength stability control apparatuses, each of which is capable of compensating for a wavelength drift by varying a laser diode drive current. Each of the optical wavelength stability control apparatuses detects a laser diode drive current, which is controlled by an auto power control circuit, by using a laser diode drive current detector. The laser diode drive current is normalized by a laser diode drive current increase/decrease normalization unit. A laser diode temperature control target value is generated at a compensated reference voltage generator, in response to the normalized laser diode drive current, to control a current value applied to a thermoelectric cooler so that an output value of a temperature monitor circuit approaches a predetermined laser diode temperature control target value.
摘要翻译：光发射机包括多个光波长稳定性控制装置，每个光波长稳定性控制装置能够通过改变激光二极管驱动电流来补偿波长漂移。每个光波长稳定性控制装置通过使用激光二极管驱动电流检测器来检测由自动功率控制电路控制的激光二极管驱动电流。激光二极管驱动电流通过激光二极管驱动电流增加/减少归一化单位进行归一化。激光二极管温度控制目标值响应于归一化激光二极管驱动电流在补偿参考电压发生器处产生，以控制施加到热电冷却器的电流值，使得温度监视电路的输出值接近预定激光器二极管温度控制目标值。

40. 发明授权

US5541553A Amplifier with a function for switching on and off the output signal 失效
标题翻译：具有打开和关闭输出信号功能的放大器
公开(公告)号：US5541553A
公开(公告)日：1996-07-30
申请号：US398678
申请日：1995-03-06
申请人： Norio Chujo , Yoshihiko Hayashi , Akio Osaki
发明人： Norio Chujo , Yoshihiko Hayashi , Akio Osaki
IPC分类号： G01R31/28 , G01R31/319 , H03F1/52 , H03F3/72 , H03K17/615 , H03K17/687 , H03F3/04 , G01R31/02
CPC分类号： H03K17/687 , H03F1/52 , H03F3/72 , H03K17/615
摘要： An amplifier which performs the function of switching on and off its output signal includes an inverted Darlington circuit made up of an input transistor and an output transistor, a first switching circuit connected across the base and the emitter of the output transistor, and a second switching circuit connected between the emitter of the input transistor and the collector of the output transistor. Amplifier also includes means for opening the first switching circuit and closing the second switching circuit to send out an output signal, and for closing the first switching circuit and opening the second switching circuit to stop the output signal. The input and output transistors may be fabricated using vipolar or MOSFET technology because current of a small magnitude flows through the switching circuits, the switching circuits can be formed from elements that are small in size and which have small parasitic capacitance. Consequently, amplifier is capable of operating at high speeds but with low power demands. In addition, amplifier can be miniaturized or formed on a single IC chip.
摘要翻译：执行打开和关闭其输出信号的功能的放大器包括由输入晶体管和输出晶体管组成的反向达林顿电路，连接在输出晶体管的基极和发射极之间的第一开关电路，以及第二开关连接在输入晶体管的发射极和输出晶体管的集电极之间的电路。放大器还包括用于打开第一开关电路并闭合第二开关电路以输出输出信号的装置，并且用于闭合第一开关电路并打开第二开关电路以停止输出信号。输入和输出晶体管可以使用vipolar或MOSFET技术制造，因为小幅度的电流流过开关电路，开关电路可以由尺寸小且具有小寄生电容的元件形成。因此，放大器能够以高速度运行但具有低功率需求。此外，放大器可以在单个IC芯片上小型化或形成。

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