专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明授权

US08627190B2 Memory device, circuit board, liquid receptacle, method of controlling a nonvolatile data memory section, and system including a memory device detachably connectable to a host circuit 有权
标题翻译：存储器件，电路板，液体容器，非易失性数据存储器部分的控制方法以及包括可拆卸地连接到主机电路的存储器件的系统
公开(公告)号：US08627190B2
公开(公告)日：2014-01-07
申请号：US12750859
申请日：2010-03-31
申请人： Noboru Asauchi
发明人： Noboru Asauchi
IPC分类号： G06F11/00
CPC分类号： B41J2/17513 , B41J2/1752 , B41J2/17523 , B41J2/1753 , B41J2/17546 , B41J2/17553
摘要： A memory device electrically connectable to a host circuit receives, from the host circuit, data including a first actual data to be written into the first memory area; acquires first parity data associated with the first actual data; generates second actual data that is a copy of the first actual data, and second parity that is a copy of the first parity data; writes the first actual data and the first parity data into the first memory area, and writes the second actual data and the second parity data into the second memory area; and reads the first actual data, the first parity data, the second actual data, and the second parity data from the data memory section for transmission to the host circuit.
摘要翻译：电连接到主机电路的存储装置从主机电路接收包括要写入第一存储区域的第一实际数据的数据; 获取与第一实际数据相关联的第一奇偶校验数据; 生成作为第一实际数据的副本的第二实际数据，以及作为第一奇偶校验数据的副本的第二奇偶校验; 将第一实际数据和第一奇偶校验数据写入第一存储器区域，并将第二实际数据和第二奇偶校验数据写入第二存储器区域; 并从数据存储器部分读取第一实际数据，第一奇偶校验数据，第二实际数据和第二奇偶校验数据，以传输到主机电路。

32. 发明授权

US08434851B2 Printing apparatus 有权
标题翻译：印刷装置
公开(公告)号：US08434851B2
公开(公告)日：2013-05-07
申请号：US13224162
申请日：2011-09-01
申请人： Noboru Asauchi
发明人： Noboru Asauchi
IPC分类号： B41J29/393
CPC分类号： B41J2/17546 , B41J2/17513 , B41J2/1752 , B41J2/1753 , B41J2/17553
摘要： A mounting detection circuit of a printing apparatus outputs a first mounting inspection signal to one of first terminals and outputs a second mounting inspection signal to one of second terminals thereby performing a mounting inspection for determining whether or not printing materials are mounted depending on whether or not second mounting response signal is received, and examines at least one of whether or not the second mounting response signal is influenced by the first mounting inspection signal and whether or not a first mounting response signal is influenced by the second mounting inspection signal thereby performing a leakage inspection for determining whether or not there is a leakage between the first and second terminals.
摘要翻译：打印装置的安装检测电路将第一安装检查信号输出到第一端子之一，并将第二安装检查信号输出到第二端子之一，由此进行安装检查，以确定是否根据是否安装打印材料接收第二安装响应信号，并且检查第二安装响应信号是否受到第一安装检查信号的影响和第一安装响应信号是否受到第二安装检查信号的影响中的至少一个，从而执行泄漏用于确定第一和第二端子之间是否存在泄漏的检查。

33. 发明申请

US20120127239A1 CIRCUIT SUBSTRATE 有权
标题翻译：电路基板
公开(公告)号：US20120127239A1
公开(公告)日：2012-05-24
申请号：US13300386
申请日：2011-11-18
申请人： Hisanori Maruyama , Noboru Asauchi
发明人： Hisanori Maruyama , Noboru Asauchi
IPC分类号： B41J2/14
CPC分类号： B41J2/1753 , B41J2/1752 , B41J2/17523 , B41J2/17546 , B41J2/17553 , B41J29/13
摘要： A circuit substrate includes a first terminal connected to a storage device, a second terminal to which voltage higher than voltage which is applied to the first terminal is applied, and a third terminal. The third terminal is disposed adjacent to the first terminal and the second terminal and connected to an overvoltage detection section provided in a printer. A convex portion is provided on a substrate surface between the first terminal and the second terminal, and a configuration is made such that a liquid droplet easily spreads from the second terminal to the third terminal rather than the liquid droplet spreading from the second terminal to the first terminal.
摘要翻译：电路基板包括连接到存储装置的第一端子，施加到施加到第一端子的电压高于的电压的第二端子和第三端子。第三端子与第一端子和第二端子相邻设置并连接到设置在打印机中的过电压检测部分。在第一端子和第二端子之间的衬底表面上设置凸部，并且使得液滴容易从第二端子扩散到第三端子，而不是液滴从第二端子扩展到第二端子第一个终端。

34. 发明申请

US20120047410A1 STORAGE DEVICE, CIRCUIT BOARD, LIQUID RESERVOIR AND SYSTEM 有权
标题翻译：存储设备，电路板，液体储存器和系统
公开(公告)号：US20120047410A1
公开(公告)日：2012-02-23
申请号：US13215130
申请日：2011-08-22
申请人： Jun Sato , Shuichi Nakano , Noboru Asauchi
发明人： Jun Sato , Shuichi Nakano , Noboru Asauchi
IPC分类号： G06F12/00 , G06F11/22 , G11C29/52
CPC分类号： G06F3/1203 , B41J2/1753 , B41J2/17546 , G06F3/121 , G06F3/1229 , G06F3/1234 , G06K15/4075
摘要： A storage device according to some aspects of the invention includes a communication unit configured to perform processing for communication with a host apparatus; a storage unit configured to have a first memory area and a second memory area that store therein received data from the host apparatus, and memory area selection information; a memory control unit configured to select one of the first memory area and the second memory area as a memory area for reading, select the other one thereof as a memory area for writing, and perform control of reading and writing; and an increment determination unit configured to compare a value of data having been read out from the memory area for reading by the memory control unit and a value of the received data to determine a magnitude relation therebetween.
摘要翻译：根据本发明的一些方面的存储装置包括：通信单元，被配置为执行与主机设备通信的处理; 存储单元，被配置为具有存储来自所述主机装置的接收数据的第一存储区域和第二存储区域以及存储区域选择信息; 存储器控制单元，被配置为选择第一存储区域和第二存储器区域中的一个作为用于读取的存储区域，选择其中的另一个作为用于写入的存储区域，并执行读取和写入的控制; 以及增量确定单元，被配置为将从存储器区域读出的数据的值与存储器控制单元的读取值和所接收的数据的值进行比较，以确定其间的幅度关系。

35. 发明申请

US20110292102A1 STORAGE DEVICE, BOARD, LIQUID CONTAINER, METHOD OF RECEIVING DATA WHICH ARE TO BE WRITTEN IN DATA STORAGE UNIT FROM HOST CIRCUIT, AND SYSTEM INCLUDING STORAGE DEVICE WHICH IS ELECTRICALLY CONNECTABLE TO HOST CIRCUIT 有权
标题翻译：存储装置，板，液体容纳器，接收来自主机电路的数据存储单元中记录的数据的方法，以及包括与电路电连接的存储装置的系统
公开(公告)号：US20110292102A1
公开(公告)日：2011-12-01
申请号：US13113859
申请日：2011-05-23
申请人： Noboru Asauchi
发明人： Noboru Asauchi
IPC分类号： B41J29/38 , G11C7/00
CPC分类号： B41J2/17546
摘要： A storage device electrically connected to a host circuit includes a data receiving unit, determination unit, and a data transmitting unit. The data receiving unit receives data including first data which are to be written in a memory array and second data which are generated based on the first data from the host circuit. The determination unit determines consistency between the first data and the second data. The data transmitting unit transmits a result of the determination to the host circuit.
摘要翻译：电连接到主机电路的存储装置包括数据接收单元，确定单元和数据发送单元。数据接收单元接收包括要写入存储器阵列的第一数据和基于来自主机电路的第一数据产生的第二数据的数据。确定单元确定第一数据和第二数据之间的一致性。数据发送单元将确定结果发送给主机电路。

36. 发明授权

US07499372B2 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US07499372B2
公开(公告)日：2009-03-03
申请号：US11420603
申请日：2006-05-26
申请人： Noboru Asauchi , Eitaro Otsuka
发明人： Noboru Asauchi , Eitaro Otsuka
IPC分类号： G11C8/00
CPC分类号： G11C16/10 , G11C16/3454 , G11C2216/14
摘要： When writing 16-bit write data to the memory array 100 which can store data of 8 bits per 1 row, the semiconductor memory device 10 first writes the upper 8 bits to the 1st write restricted row of the memory array 100. The increment controller 150 determines whether or not the value of the existing data written to the memory array 100 and the write data used for writing latched to the 8-bit latch register 170 match. When the existing data and the write data match, the increment controller 150 outputs the write enable signal WEN1 to the write/read controller 140 and executes the writing of the lower 8 bits of write data to the memory array 100.
摘要翻译：当向可存储每1行8位数据的存储器阵列100写入16位写入数据时，半导体存储器件10首先将高8位写入存储器阵列100的第1写入限制行。增量控制器150 确定写入存储器阵列100的现有数据的值和用于写入到8位锁存寄存器170的写入数据是否匹配。当现有数据和写入数据匹配时，增量控制器150将写入使能信号WEN1输出到写入/读取控制器140，并将写入数据的低8位写入存储器阵列100。

37. 发明授权

US07433260B2 Memory device and print recording material receptacle providing memory device 有权
标题翻译：存储装置和打印记录材料插座提供存储装置
公开(公告)号：US07433260B2
公开(公告)日：2008-10-07
申请号：US11516941
申请日：2006-09-06
申请人： Noboru Asauchi
发明人： Noboru Asauchi
IPC分类号： G11C8/00
CPC分类号： G06F12/1433 , G11C7/24
摘要： The operation code decoder 204 having received an access enable signal EN acquires and decodes the command, and sends the decoded command to the read/write controller 206. In the event that the received command is a write command, the read/write controller 206 acquires access control information from the fourth address following the head address of the memory array 201. In the event that the acquired access control information indicates that write operations are prohibited, the read/write controller 206 does not send the write command received from the operation code decoder 204 to the I/O controller 205.
摘要翻译：已经接收到访问使能信号EN的操作码解码器204获取并解码该命令，并且将解码的命令发送到读/写控制器206。在接收到的命令是写命令的情况下，读/写控制器206从存储器阵列201的头地址之后的第四地址获取访问控制信息。在获取的访问控制信息指示禁止写入操作的情况下，读/写控制器206不将从操作码解码器204接收到的写命令发送到I / O控制器205。

38. 发明申请

US20080212379A1 Semiconductor Memory Device 失效
标题翻译：半导体存储器件
公开(公告)号：US20080212379A1
公开(公告)日：2008-09-04
申请号：US11420603
申请日：2006-05-26
申请人： Noboru Asauchi , Eitaro Otsuka
发明人： Noboru Asauchi , Eitaro Otsuka
IPC分类号： G11C7/00
CPC分类号： G11C16/10 , G11C16/3454 , G11C2216/14
摘要： When writing 16-bit write data to the memory array 100 which can store data of 8 bits per 1 row, the semiconductor memory device 10 first writes the upper 8 bits to the 1st write restricted row of the memory array 100. The increment controller 150 determines whether or not the value of the existing data written to the memory array 100 and the write data used for writing latched to the 8-bit latch register 170 match. When the existing data and the write data match, the increment controller 150 outputs the write enable signal WEN1 to the write/read controller 140 and executes the writing of the lower 8 bits of write data to the memory array 100.
摘要翻译：当将16位写数据写入可存储每1行8位数据的存储器阵列100时，半导体存储器件10首先将高8位写入存储器阵列100的第一写限制行。增量控制器150确定写入存储器阵列100的现有数据的值和用于写入到8位锁存寄存器170的写入数据是否匹配。当现有数据和写入数据匹配时，增量控制器150将写入使能信号WEN 1输出到写/读控制器140，并且执行写入数据的低8位的写入到存储器阵列100。

39. 发明授权

US07232209B2 Non-contact communication between a device and its expendable container 失效
标题翻译：设备与其消耗性容器之间的非接触通信
公开(公告)号：US07232209B2
公开(公告)日：2007-06-19
申请号：US10816167
申请日：2004-04-02
申请人： Noboru Asauchi
发明人： Noboru Asauchi
IPC分类号： B41J2/175 , G08B13/14 , G03G15/00
CPC分类号： B41J2/17546
摘要： An expendable container of the present invention includes a memory circuit. The memory circuit has a memory, an antenna being capable of establishing non-contact communication with an external receiver transmitter, and a controller controlling the non-contact communication and an access to the memory. The memory circuit has a plurality of modes including ID information confirmation mode and low power consumption mode. The memory circuit is capable of shifting to the low power consumption mode in response to a completion of confirmation of the ID information of the expendable container.
摘要翻译：本发明的消耗性容器包括存储器电路。存储器电路具有存储器，能够与外部接收器发送器建立非接触通信的天线以及控制非接触通信和对存储器的访问的控制器。存储电路具有ID信息确认模式和低功耗模式的多种模式。响应于完成对消耗性容器的ID信息的确认，存储电路能够转换到低功耗模式。

40. 发明申请

US20070030508A1 Access to printing material container 有权
标题翻译：进入打印材料容器
公开(公告)号：US20070030508A1
公开(公告)日：2007-02-08
申请号：US11542113
申请日：2006-10-04
申请人： Noboru Asauchi
发明人： Noboru Asauchi
IPC分类号： G06K15/00
CPC分类号： B41J2/17546 , B41J13/103 , B41J29/393 , B41J2202/17 , G06K15/00
摘要： The present invention provides a storage device that enables identification data to be readily rewritten and ensures normal completion of a data writing operation in a short time period. In the storage device of the invention, an ID comparator determines whether or not identification data transmitted from a host computer coincides with identification data stored in a memory array. In the case of coincidence, the ID comparator sends an access enable signal EN to an operation code decoder. The operation code decoder analyzes a write/read command, switches over a direction of data transfer with regard to the memory array based on a result of the analysis, and requires an I/O controller to change a high impedance setting of a signal line connecting with a data terminal DT. This series of processing allows access to an address in the memory array specified by a count on an address counter.
摘要翻译：本发明提供一种能够容易地重写识别数据并确保在短时间内正常完成数据写入操作的存储装置。在本发明的存储装置中，ID比较器确定从主计算机发送的识别数据是否与存储在存储器阵列中的识别数据一致。在符合的情况下，ID比较器向操作码解码器发送访问使能信号EN。操作码解码器分析写入/读取命令，基于分析结果切换关于存储器阵列的数据传输方向，并且需要I / O控制器来改变连接的信号线的高阻抗设置与数据终端DT。该系列处理允许访问由地址计数器上的计数指定的存储器阵列中的地址。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式