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    • 40. 发明授权
    • Nonvolatile memory device and nonvolatile memory system employing same
    • 非易失性存储器件和采用它的非易失性存储器系统
    • US08432741B2
    • 2013-04-30
    • US13419732
    • 2012-03-14
    • Seung-Jae LeeDae-Seok ByeonHyun-Chul Ha
    • Seung-Jae LeeDae-Seok ByeonHyun-Chul Ha
    • G11C11/34G11C16/04G11C16/06
    • G11C16/28G11C16/0408
    • A nonvolatile memory device comprises a memory cell array, a row selection circuit and a voltage generator. The memory cell array comprises a first dummy memory cell, a second dummy memory cell, and a NAND string comprising a plurality of memory cells coupled in series between a string selection transistor and a ground selection transistor through the first dummy memory cell and the second dummy memory cell. During a read-out operation mode, a dummy read-out voltage is applied to a first dummy wordline coupled to the first dummy memory cell, and to a second dummy wordline coupled to the second dummy memory cell. The dummy read-out voltage has a lower magnitude than a read-out voltage applied to an unselected memory cell during the read-out operation mode.
    • 非易失性存储器件包括存储单元阵列,行选择电路和电压发生器。 存储单元阵列包括第一虚拟存储单元,第二虚拟存储单元和NAND串,其包括通过第一虚拟存储单元和第二虚拟存储单元串联耦合在串选择晶体管和接地选择晶体管之间的多个存储单元 记忆单元 在读出操作模式期间,将虚拟读出电压施加到耦合到第一虚拟存储器单元的第一伪字线以及耦合到第二虚拟存储单元的第二虚拟字线。 在读出操作模式期间,虚拟读出电压具有比在未选择存储单元上施加的读出电压更低的量值。