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    • 40. 发明授权
    • Information processing system, enciphering/deciphering system, system LSI, and electronic apparatus
    • 信息处理系统,加密/解密系统,系统LSI和电子设备
    • US06557020B1
    • 2003-04-29
    • US09367234
    • 1999-10-13
    • Kazuhiko AmanoTsugio NakamuraHiroshi KasaharaTatsuya Shimoda
    • Kazuhiko AmanoTsugio NakamuraHiroshi KasaharaTatsuya Shimoda
    • G06F738
    • G06F7/57G06F7/535G06F7/723G06F21/72G06F2207/3816G06F2207/5353G06F2221/2149
    • An information processing system that is configured in such a manner that computational processing is performed on input data in accordance with a processing sequence, for outputting data, comprises: a plurality of arithmetic units (7-1 to 7-x), each computing at an arithmetic precision 2m bits (where m is a natural number) based on the processing sequence; and a plurality of cascade connection terminals for cascading these arithmetic units each other. When the maximum arithmetic precision that is required during computational processing is 2n bits (where n is a natural number and is fixed), x numbers of (where x is a natural number) the arithmetic units are cascaded in a manner such that the inequality x≧2n/2m is satisfied. When an arithmetic precision of 2n1 bits (where n1≦n, and n1 is variable) is necessary during computational processing, x1 numbers of the arithmetic units are cascaded in a manner such that the inequality x1≧2n1/2m (where x1 is a natural number and is variable) is satisfied. This makes it possible to easily implement an information processing system for performing computations to any desired precision in a hardware manner, and also makes it possible to support a simple hardware-based method of expanding the arithmetic precision.
    • 一种信息处理系统,其被配置为使得根据用于输出数据的处理序列对输入数据进行计算处理的方式包括:多个运算单元(7-1至7-x),每个运算单元 基于处理顺序的算术精度为2m比特(其中m为自然数) 以及用于将这些算术单元彼此级联的多个级联连接端子。 当计算处理期间所需的最大算术精度是2n位(其中n是自然数并且是固定的)时,运算单元的x数(其中x是自然数)是以不等式x > = 2n / 2m。 当计算处理期间需要2n1位(其中n1 <= n和n1是可变的)的算术精度时,以不等式x1> = 2n1 / 2m(其中x1为 自然数和变量)是满足的。 这使得可以容易地实现用于以硬件方式执行任何期望精度的计算的信息处理系统,并且还可以支持扩展算术精度的简单的基于硬件的方法。