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31. 发明授权

US08545025B2 Image processing apparatus, projector, image processing method, and program 有权
标题翻译：图像处理装置，投影仪，图像处理方法和程序
公开(公告)号：US08545025B2
公开(公告)日：2013-10-01
申请号：US12893136
申请日：2010-09-29
申请人： Naoki Suzuki
发明人： Naoki Suzuki
IPC分类号： G03B21/14 , H04N3/23 , H04N3/22 , G06K9/40
CPC分类号： H04N9/3194 , H04N9/3185
摘要： An image processing apparatus includes: an image information input unit which receives input of first image information; and a sharpness adjustment unit which divides a screen image corresponding to the first image information into a plurality of areas and performs a sharpness adjustment for each of the divided areas to output second image information.
摘要翻译：一种图像处理装置，包括：图像信息输入单元，其接收第一图像信息的输入; 以及锐度调整单元，其将对应于第一图像信息的屏幕图像划分成多个区域，并且对每个分割区域执行清晰度调整以输出第二图像信息。

32. 发明授权

US08455331B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08455331B2
公开(公告)日：2013-06-04
申请号：US12246640
申请日：2008-10-07
申请人： Shunpei Yamazaki , Takeshi Shichi , Naoki Suzuki
发明人： Shunpei Yamazaki , Takeshi Shichi , Naoki Suzuki
IPC分类号： H01L21/10 , H01L21/46
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/66772
摘要： To realize high performance and low power consumption of a semiconductor device by controlling electric characteristics of a transistor in accordance with a required function. Further, to manufacture such a semiconductor device with high yield and high productivity without complicating a manufacturing process. An impurity element imparting one conductivity type is added to a semiconductor substrate in order to control the threshold voltage of a transistor included in the semiconductor device, before separating a semiconductor layer of the transistor from the semiconductor substrate and transferring the semiconductor layer to a supporting substrate that is a substrate having an insulating surface.
摘要翻译：通过根据所需功能控制晶体管的电特性来实现半导体器件的高性能和低功耗。此外，制造这种半导体器件的产率高，生产率高，而不会使制造工艺复杂化。在将半导体衬底的半导体层与半导体衬底分离并将半导体层转移到支撑衬底之前，向半导体衬底添加赋予一种导电类型的杂质元素，以便控制包括在半导体器件中的晶体管的阈值电压即具有绝缘面的基板。

33. 发明授权

US07875974B2 Laminated mounting structure and memory card 有权
标题翻译：层压安装结构和存储卡
公开(公告)号：US07875974B2
公开(公告)日：2011-01-25
申请号：US12337267
申请日：2008-12-17
申请人： Manabu Gokan , Akihisa Nakahashi , Naoki Suzuki , Haneo Iwamoto , Satoru Yuhaku
发明人： Manabu Gokan , Akihisa Nakahashi , Naoki Suzuki , Haneo Iwamoto , Satoru Yuhaku
IPC分类号： H01L23/34
CPC分类号： G11C5/02 , G11C5/04 , G11C5/063 , H01L23/5387 , H01L25/0657 , H01L2224/16225 , H01L2224/32225 , H01L2224/73253 , H01L2225/06517 , H01L2225/0652 , H01L2225/06572 , H01L2225/06579 , H01L2924/15311 , H01L2924/15331
摘要： To provide a stacked mounting structure in which the number of semiconductor chips that can be stacked is greater than conventionally, as well as a method for fabricating the same, each semiconductor chip has electrodes provided at least at one end in the stacked mounting structure, and a board holding the semiconductor chips at the one end is folded with at least two of the semiconductor chips being stacked so as to at least partially overlap with each other.
摘要翻译：为了提供其中可堆叠的半导体芯片的数量大于常规的堆叠安装结构以及其制造方法，每个半导体芯片具有设置在堆叠的安装结构中的至少一端，并且将一端保持半导体芯片的板折叠成至少两个半导体芯片被堆叠成至少部分地彼此重叠。

34. 发明申请

US20100154989A1 METHOD AND APPARATUS FOR MANUFACTURING A HEAD-GIMBAL ASSEMBLY 有权
标题翻译：用于制造头盔组件的方法和装置
公开(公告)号：US20100154989A1
公开(公告)日：2010-06-24
申请号：US12642178
申请日：2009-12-18
申请人： Hideto IMAI , Tatsumi Tsuchiya , Eiki Oosawa , Naoki Suzuki
发明人： Hideto IMAI , Tatsumi Tsuchiya , Eiki Oosawa , Naoki Suzuki
IPC分类号： B32B38/00 , B32B37/12
CPC分类号： G11B5/4826
摘要： A method for manufacturing a head-gimbal assembly. The head-gimbal assembly includes a head-slider bonded to a suspension. The method includes placing the head-slider and the suspension in a superposed manner with a photo-thermosetting adhesive applied between the head-slider and the suspension. The method also includes heating the suspension from a side of the suspension opposite to a side of the suspension in contact with the photo-thermosetting adhesive with a heated gas-stream. In addition, the method includes irradiating the photo-thermosetting adhesive with light at least partly in a time period during which the suspension is heated by the gas-stream.
摘要翻译：一种用于制造头部万向节组件的方法。头部万向节组件包括粘结到悬架上的头部滑块。该方法包括将头部滑块和悬架以叠加的方式放置在涂覆在头部滑块和悬架之间的光热固性粘合剂。该方法还包括将加热悬浮液从具有加热气流的与光热固性粘合剂接触的悬浮液侧面相反的一侧加热。此外，该方法包括至少部分地在悬浮液被气流加热的时间段内用光照射光热固性粘合剂。

35. 发明授权

US07638888B2 Semiconductor chip mounting substrate, semiconductor chip mounting body, semiconductor chip stacked module, and semiconductor chip mounting substrate manufacturing method 失效
标题翻译：半导体芯片安装基板，半导体芯片安装体，半导体芯片堆叠模块以及半导体芯片安装基板的制造方法
公开(公告)号：US07638888B2
公开(公告)日：2009-12-29
申请号：US12031363
申请日：2008-02-14
申请人： Naoki Suzuki , Akihisa Nakahashi , Yukihiro Maegawa
发明人： Naoki Suzuki , Akihisa Nakahashi , Yukihiro Maegawa
IPC分类号： H01L23/544
CPC分类号： H01L23/544 , H01L23/13 , H01L24/48 , H01L24/49 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L2223/5442 , H01L2223/54426 , H01L2224/45014 , H01L2224/4899 , H01L2224/4903 , H01L2224/49051 , H01L2225/0651 , H01L2225/06572 , H01L2225/06593 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/0106 , H01L2924/01078 , Y10T29/49128 , H01L2224/45099 , H01L2224/05599
摘要： There is provided a semiconductor chip mounting substrate including a substrate on which a mounting region for mounting a semiconductor chip and a connection region for interlayer connection of the semiconductor chip are formed, and a plurality of alignment marks for alignment at the time of stacking which are provided around or in the connection region on the substrate, wherein a reinforcing member as a reinforcing region for reinforcing a portion between the plurality of alignment marks is provided on the substrate.
摘要翻译：提供了一种半导体芯片安装基板，包括：基板，其上形成有用于安装半导体芯片的安装区域和用于半导体芯片的层间连接的连接区域;以及多个在堆叠时对准的对准标记，设置在基板的周围或连接区域中，其中，作为用于加强多个对准标记之间的部分的加强区域的加强构件设置在基板上。

36. 发明申请

US20080197471A1 SEMICONDUCTOR CHIP MOUNTING SUBSTRATE, SEMICONDUCTOR CHIP MOUNTING BODY, SEMICONDUCTOR CHIP STACKED MODULE, AND SEMICONDUCTOR CHIP MOUNTING SUBSTRATE MANUFACTURING METHOD 失效
标题翻译：半导体芯片安装基板，半导体芯片安装体，半导体芯片堆叠模块和半导体芯片安装基板制造方法
公开(公告)号：US20080197471A1
公开(公告)日：2008-08-21
申请号：US12031363
申请日：2008-02-14
申请人： Naoki Suzuki , Akihisa Nakahashi , Yukihiro Maegawa
发明人： Naoki Suzuki , Akihisa Nakahashi , Yukihiro Maegawa
IPC分类号： H01L23/48 , H01L23/544 , H05K3/00
CPC分类号： H01L23/544 , H01L23/13 , H01L24/48 , H01L24/49 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L2223/5442 , H01L2223/54426 , H01L2224/45014 , H01L2224/4899 , H01L2224/4903 , H01L2224/49051 , H01L2225/0651 , H01L2225/06572 , H01L2225/06593 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/0106 , H01L2924/01078 , Y10T29/49128 , H01L2224/45099 , H01L2224/05599
摘要： There is provided a semiconductor chip mounting substrate including a substrate on which a mounting region for mounting a semiconductor chip and a connection region for interlayer connection of the semiconductor chip are formed, and a plurality of alignment marks for alignment at the time of stacking which are provided around or in the connection region on the substrate, wherein a reinforcing member as a reinforcing region for reinforcing a portion between the plurality of alignment marks is provided on the substrate.
摘要翻译：提供了一种半导体芯片安装基板，包括：基板，其上形成有用于安装半导体芯片的安装区域和用于半导体芯片的层间连接的连接区域;以及多个在堆叠时对准的对准标记，设置在基板的周围或连接区域中，其中，作为用于加强多个对准标记之间的部分的加强区域的加强构件设置在基板上。

37. 发明申请

US20070188853A1 Optical amplifier and gain control method 失效
标题翻译：光放大器和增益控制方法
公开(公告)号：US20070188853A1
公开(公告)日：2007-08-16
申请号：US10591872
申请日：2004-05-26
申请人： Naoki Suzuki , Junichi Nakagawa
发明人： Naoki Suzuki , Junichi Nakagawa
IPC分类号： H01S3/00 , H04B10/12
CPC分类号： H01S3/06754 , H01S3/0064 , H01S3/094003 , H01S3/0941 , H01S3/10015 , H01S3/1305 , H04B10/2942
摘要： An input monitoring unit monitors full input light and outputs an input monitor signal. An output monitoring unit monitors full output light and outputs an output monitor signal. An ASE compensating circuit compensates for an ASE component contained in the output monitor signal. A gain-variation-level compensating circuit calculates a target average setup gain that is determined based on a signal intensity of the input monitor signal. A constant gain control circuit performs a gain control based on an output signal from the ASE compensating circuit and the target average setup gain.
摘要翻译：输入监视单元监视全输入光并输出输入监视信号。输出监控单元监视全输出光并输出输出监视信号。 ASE补偿电路补偿输出监视器信号中包含的ASE分量。增益变化电平补偿电路基于输入监视信号的信号强度来计算目标平均设定增益。恒定增益控制电路基于来自ASE补偿电路的输出信号和目标平均设置增益来执行增益控制。

38. 发明申请

US20060177996A1 Doping method and method of manufacturing field effect transistor 有权
标题翻译：掺杂方法和制造场效应晶体管的方法
公开(公告)号：US20060177996A1
公开(公告)日：2006-08-10
申请号：US11346378
申请日：2006-02-03
申请人： Junichi Koezuka , Naoki Suzuki
发明人： Junichi Koezuka , Naoki Suzuki
IPC分类号： H01L21/26 , H01L21/42
CPC分类号： H01L29/78621 , H01L21/26513 , H01L29/66757
摘要： A doping method comprising the steps of; obtaining a proportion X of ions of a compound including a donor or an acceptor impurity in total ions from mass spectrum by using a first source gas of a first concentration; analyzing a peak concentration Y of the compound in a first processing object which is doped by using a second source gas of a second concentration equal to or lower than the first concentration, referring to a dose amount of total ions as Do and setting an acceleration voltage at a value, obtaining a dose amount D1 of total ions from a expression, Y=(D1/D0)(aX+b), and doping a second processing object with the donor or the acceptor impurity by a ion doping apparatus using a third source gas, wherein a dose amount of total ions is set at D1, and an acceleration voltage is set at the value.
摘要翻译：一种掺杂方法，包括以下步骤：通过使用第一浓度的第一源气体从质谱获得包含供体或受体杂质的化合物的离子的比例X; 分析通过使用等于或低于第一浓度的第二浓度的第二源气体掺杂的第一处理对象中的化合物的峰浓度Y，参考总离子的剂量为Do并设定加速电压从表达式获得总离子的剂量D D 1，其中Y =（D 1 / D O 0）（aX + b），并且通过使用第三源气体的离子掺杂装置用施主或受体杂质掺杂第二处理对象，其中总离子的剂量量设定为D 1，加速度电压设定在该值。

39. 发明授权

US5351658A Intake system for engine 失效
标题翻译：发动机进气系统
公开(公告)号：US5351658A
公开(公告)日：1994-10-04
申请号：US166385
申请日：1993-12-13
申请人： Naoki Suzuki
发明人： Naoki Suzuki
IPC分类号： F02B75/22 , F02M35/10 , F02M35/116
CPC分类号： F02M35/10144 , F02M35/10045 , F02M35/116 , F02B75/22 , Y02T10/14
摘要： An intake pipe is connected to an upstream side of a throttle valve of an engine having first and second cylinder banks of a cylinder block formed in a V-like configuration. An intake path is branched, at its intermediate part on a downstream side of the throttle valve, into first and second branch paths by a branch tube, and the first and second branch paths are provided at their downstream end portions with first and second surge tanks, respectively. The first and second surge tanks are connected to each other through a communication pipe. An upper portion of the intake pipe is disposed between the first and second surge tank and under the communication pipe and is firmly secured directly to the communication pipe.
摘要翻译：进气管连接到具有V形构造的气缸体的第一和第二气缸组的发动机的节流阀的上游侧。进气道在节流阀的下游侧的中间部分被分支，通过分支管分支成第一和第二分支路径，并且第一和第二分支路径在其下游端部设置有第一和第二调压罐，分别。第一和第二缓冲罐通过连通管相互连接。进气管的上部设置在第一和第二缓冲罐之间并在连通管下方，并且被牢固地固定在连通管上。

40. 发明授权

US5202095A Microwave plasma processor 失效
标题翻译：微波等离子体处理器
公开(公告)号：US5202095A
公开(公告)日：1993-04-13
申请号：US861179
申请日：1992-03-27
申请人： Ryuzoh Houchin , Naoki Suzuki
发明人： Ryuzoh Houchin , Naoki Suzuki
IPC分类号： H01J37/32 , H05B6/72
CPC分类号： H01J37/3222 , H01J37/32192 , H05B6/72
摘要： A microwave plasma processor comprising a vacuum chamber with a gas introduction inlet, an exhaust port, a sample table for loading thereon a sample, a plurality of microwave radiation antennas, and a corresponding plurality of microwave energy introduction inlets thereby enabling a large area substrate to be uniformly plasma-processed at high speed.
摘要翻译：一种微波等离子体处理器，包括具有气体引入入口的真空室，排气口，用于在其上装载样品的样品台，多个微波辐射天线和相应的多个微波能量引入入口，从而使得大面积基板能够可以高速均匀等离子体处理。

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